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9442 Commits

Author SHA1 Message Date
Cameron Esfahani
441c557708 Clean up some usage of Triple. The base class has methods for determining if the target is iOS and Linux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189604 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-29 20:23:14 +00:00
Elena Demikhovsky
4edfa2278a AVX-512: added extend and truncate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189580 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-29 11:56:53 +00:00
Kevin Enderby
e54726a87a The darwin integrated assembler for X86 in 64-bit mode is not rejecting 
32-bit absolute addressing in instructions likei this:

	mov $_f, %rsi

which is not supported in 64-bit mode.

rdar://8827134


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189543 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-29 00:19:03 +00:00
Elena Demikhovsky
2fb982aa72 AVX-512: added SQRT, VRSQRT14, VCOMISS, VUCOMISS, VRCP14, VPABS 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189472 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-28 11:21:58 +00:00
Eric Christopher
6b6345f016 Remove support for the .debug_inlined section. No known software 
in use supports it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189439 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-28 04:04:28 +00:00
NAKAMURA Takumi
5be1752dcd X86JITInfo.cpp: Apply x64 version of X86CompilationCallback() to Cygwin64. 
For now, (defined(X86_64_JIT) && defined(__CYGWIN__)) satisfies Cygwin64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189437 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-28 03:04:09 +00:00
NAKAMURA Takumi
6a15b6a269 X86Subtarget.h: Recognize x86_64-cygwin. 
In the LLVM side, x86_64-cygwin is almost as same as x86_64-mingw32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189436 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-28 03:04:02 +00:00
David Majnemer
7cde9d0286 [ms-inline asm] Support offsets after segment registers 
Summary: MASM let's you do stuff like 'MOV FS:20, EAX' and 'MOV EAX, FS:20'

Reviewers: craig.topper, rnk

Reviewed By: rnk

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D1470

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189407 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-27 21:56:17 +00:00
Elena Demikhovsky
d371d4f0f4 AVX-512: added conversion instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189349 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-27 13:54:04 +00:00
Elena Demikhovsky
1567abe74f AVX-512: Added FMA instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189326 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-27 08:39:25 +00:00
Charles Davis
f69a29b23a Revert "Fix the build broken by r189315." and "Move everything depending on Object/MachOFormat.h over to Support/MachO.h." 
This reverts commits r189319 and r189315. r189315 broke some tests on what I
believe are big-endian platforms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189321 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-27 05:38:30 +00:00
Charles Davis
9c3dd1b0d1 Move everything depending on Object/MachOFormat.h over to Support/MachO.h. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189315 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-27 05:00:43 +00:00
Elena Demikhovsky
92bfb54770 AVX-512: Added shuffle instructions - 
VPSHUFD, VPERMILPS, VMOVDDUP, VMOVLHPS, VMOVHLPS, VSHUFPS, VALIGN
 single and double forms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189215 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-26 12:45:35 +00:00
Craig Topper
318f4e679b Make sure x86 instructions using ssmem/sdmem operand types are only able to parse memory operands of the proper size in Intel syntax. Primarily affects some of sse cvt instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189206 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-26 00:39:04 +00:00
Craig Topper
f0509f3637 Remove some unnecessary PredicateMethod overrides. Add RenderMethod overrides to remove forwarding in the X86AsmParser code itself. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189205 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-26 00:13:09 +00:00
Craig Topper
c648f85f7b Put some of the AVX-512 parsing stuff in a more consistent place with the existing functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189204 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-25 23:18:05 +00:00
Craig Topper
a4959f3f6e First round of fixes for the x86 fixes for the x86 move accumulator from/to memory offset instructions. 
-Assembly parser now properly check the size of the memory operation specified in intel syntax. So 'mov word ptr [5], al' is no longer accepted.
-x86-32 disassembly of these instructions no longer sign extends the 32-bit address immediate based on size.
-Intel syntax printing prints the ptr size and places brackets around the address immediate.

Known remaining issues with these instructions:
-Segment override prefix is not supported. PR16962 and PR16961.
-Immediate size should be changed by address size prefix.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189201 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-25 22:23:38 +00:00
Elena Demikhovsky
41f7baf181 AVX-512: added UNPACK instructions and tests for all-zero/all-ones vectors 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189189 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-25 12:54:30 +00:00
Craig Topper
916f1a1470 Add hasSideEffects/mayLoad/mayStore flags to the X86 moffs8/moffs16/moffs32/moffs64 versions of move. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189182 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-24 20:31:14 +00:00
Craig Topper
f86778a848 Remove trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189178 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-24 19:50:11 +00:00
Rafael Espindola
4aa8bdaa46 Rename features to match what gcc and clang use. 
There is no advantage in being different and using the same names simplifies
clang a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189141 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-23 20:21:34 +00:00
Jim Cownie
f89c749870 Checking commit access; added one space 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189111 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-23 15:51:37 +00:00
Elena Demikhovsky
1765e74c15 AVX-512: Added masked SHIFT commands, more encoding tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189005 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-22 12:18:28 +00:00
Elena Demikhovsky
8ba76daba0 AVX-512: Added SHIFT instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188899 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-21 09:36:02 +00:00
Craig Topper
5bdf397e25 Synchronize VEX JIT encoding code with the MCJIT version. Fix a bug in the MCJIT code where CurOp was being incremented even if the operand it was pointing at wasn't used. Maybe only matters if there are any EVEX_K instructions that aren't VEX_4V. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188868 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-21 05:57:45 +00:00
Nadav Rotem
ec7b5e9290 In LLVM FMA3 operands are dst, src1, src2, src3, however dst is not encoded as it is always src1. This was causing the encoding of the operands to be off by one. 
Patch by Chris Bieneman.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188866 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-21 05:03:10 +00:00
Craig Topper
33b5fe7f16 Rename mattr names for AVX-512 to from avx-512 -> avx512f, avx-512-pfi -> av512pf, avx-512-cdi -> avx512cd, avx-512-eri->avx512er. This matches better with official docs and what gcc patches appearto be using. I didn't touch the has* functions or the feature flag names to avoid change the td and lowering file while commits are still happening. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188859 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-21 03:57:57 +00:00
NAKAMURA Takumi
d5a2eb0925 X86TargetMachine.cpp: Clarify to emit GOT in i686-{cygming|win32}-elf for mcjit. 
I suppose all "lli -use-mcjit i686-*" should require GOT, (and to fail.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188856 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-21 02:37:25 +00:00
Elena Demikhovsky
38cd21a3e9 AVX-512: Added more patterns for VMOVSS, VMOVSD, VMOVD, VMOVQ 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188786 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-20 11:00:29 +00:00
Craig Topper
1299e49ba7 Fix formatting. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188746 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-20 05:23:59 +00:00
Craig Topper
3b7722cf3a Add AVX-512 and related features to the CPUID detection code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188745 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-20 05:22:42 +00:00
Craig Topper
b5e1d5b46f Move AVX and non-AVX replication inside a couple multiclasses to avoid repeating each instruction for both individually. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188743 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-20 04:24:14 +00:00
Elena Demikhovsky
f12df0ad50 AVX-512: added arithmetic and logical operations. 
ADD, SUB, MUL integer and FP types. OR, AND, XOR.
Added embeded broadcast form for these instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188673 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-19 13:26:14 +00:00
Elena Demikhovsky
3491d67d3a AVX-512: Added VMOVD, VMOVQ, VMOVSS, VMOVSD instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188637 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-18 13:08:57 +00:00
Craig Topper
ff79bc6e18 Make more of the lowering helpers static. Also use MVT instead of EVT in a couple places. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188629 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-18 08:53:01 +00:00
Craig Topper
0163356ad1 Don't use v16i32 for load pattern matching. All 512-bit loads are cated to v8i64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188534 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-16 06:07:34 +00:00
Bill Wendling
e427297997 Constify the function parameters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188469 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-15 18:46:14 +00:00
Craig Topper
d36e1efa4b Revert r188449 as it turns out we're just missing the instructions that need the v16i32/v16f32 matching. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188454 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-15 08:38:25 +00:00
Craig Topper
46ceaf4ba6 Don't let isPermImmMask handle v16i32 since VPERMI doesn't match on that type. Remove 128-bit vector handling from isPermImmMask too, it's covered by isPSHUFDMask. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188449 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-15 07:30:51 +00:00
Craig Topper
07ad0c4c99 Use MVT instead of EVT in X86ISelDAGToDAG since all the types should be legal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188446 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-15 05:57:07 +00:00
Craig Topper
8d725b9a03 Use MVT in place of EVT in more X86 operation lowering functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188445 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-15 05:33:45 +00:00
Craig Topper
5a0910b349 Replace getValueType().getSimpleVT() with getSimpleValueType(). Also remove one weird cast from MVT->EVT just to call getSimpleVT(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188441 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-15 02:33:50 +00:00
Craig Topper
35e194fbad Make more helper methods into static functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188366 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-14 07:53:41 +00:00
Craig Topper
8971717313 Remove tab characters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188365 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-14 07:35:18 +00:00
Craig Topper
158ec07008 Make some helper methods static. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188364 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-14 07:34:43 +00:00
Craig Topper
f3d98a882e Use MVT in more lowering code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188363 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-14 07:04:42 +00:00
Craig Topper
d36b53e764 Replace EVT with MVT in isVectorShift. Keeps compiler from generating unneeded checks and handling for extended types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188362 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-14 06:21:10 +00:00
Craig Topper
cc60bbc739 Replace EVT with MVT in many of the shuffle lowering functions. Keeps compiler from generating unneeded checks and handling for extended types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188361 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-14 05:58:39 +00:00
Evgeniy Stepanov
4c857225ec Fix compiler warnings. 
../lib/Target/X86/X86ISelLowering.cpp:9715:7: error: unused variable 'OpVT' [-Werror,-Wunused-variable]
  EVT OpVT = Op0.getValueType();
      ^
../lib/Target/X86/X86ISelLowering.cpp:9763:14: error: unused variable 'NumElems' [-Werror,-Wunused-variable]
    unsigned NumElems = VT.getVectorNumElements();



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188269 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-13 14:04:20 +00:00
Elena Demikhovsky
4d36bd80e6 AVX-512: Added CMP and BLEND instructions. 
Lowering for SETCC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188265 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-13 13:24:07 +00:00