Commit Graph

58 Commits

Author SHA1 Message Date
Evan Cheng
5a96b3dad2 Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 07:15:52 +00:00
Bill Wendling
f6fb7ed53c We need to verify that the machine instruction we're using as a replacement for
our current machine instruction defines a register with the same register class
as what's being replaced. This showed up in the SPEC 403.gcc benchmark, where it
would ICE because a tail call was expecting one register class but was given
another. (The machine instruction verifier catches this situation.)
<rdar://problem/10270968>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141830 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 23:03:40 +00:00
Evan Cheng
e837dead3c - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 19:10:37 +00:00
Eli Friedman
5e926ac651 Re-revert r130877; it's apparently causing a regression on 197.parser,
possibly related to cbnz formation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130977 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-06 05:23:07 +00:00
Eli Friedman
5f6bf5d441 Minor correction to r130877; fixes PR9846 and hopefully the buildbot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130925 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-05 16:18:11 +00:00
Eli Friedman
baf717a08a Re-commit r130862 with a minor change to avoid an iterator running off the edge in some cases.
Original message:

Teach MachineCSE how to do simple cross-block CSE involving physregs.  This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 .



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130877 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 22:10:36 +00:00
Eli Friedman
24d4c9911e Back out r130862; it appears to be breaking bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130867 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 20:48:42 +00:00
Eli Friedman
49cec1d818 Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130862 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 19:54:24 +00:00
Evan Cheng
cfea985f53 Fix a couple of places where changes are made but not tracked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129287 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-11 18:47:20 +00:00
Chris Lattner
622a11bc07 fit in 80 cols and use MBB::isSuccessor instead of a hand
rolled std::find.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123164 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 07:51:31 +00:00
Jakob Stoklund Olesen
c9df025e33 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
These functions not longer assert when passed 0, but simply return false instead.

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123155 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 02:58:51 +00:00
Evan Cheng
c36b7069b4 Do not model all INLINEASM instructions as having unmodelled side effects.
Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.

This allows memory instructions to be moved around INLINEASM instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123044 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 23:50:32 +00:00
Cameron Zwarich
53eeba586d Use a RecyclingAllocator to allocate values for MachineCSE's ScopedHashTable for
a 28% speedup of MachineCSE time on 403.gcc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122735 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-03 04:07:46 +00:00
Evan Cheng
a63cde26ff Teach machine cse to commute instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121903 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 22:16:21 +00:00
Evan Cheng
189c1ec4c1 Teach machine cse to eliminate instructions with multiple physreg uses and defs. rdar://8610857.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117745 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 23:36:03 +00:00
Owen Anderson
081c34b725 Get rid of static constructors for pass registration. Instead, every pass exposes an initializeMyPassFunction(), which
must be called in the pass's constructor.  This function uses static dependency declarations to recursively initialize
the pass's dependencies.

Clients that only create passes through the createFooPass() APIs will require no changes.  Clients that want to use the
CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h
before parsing commandline arguments.

I have tested this with all standard configurations of clang and llvm-gcc on Darwin.  It is possible that there are problems
with the static dependencies that will only be visible with non-standard options.  If you encounter any crash in pass
registration/creation, please send the testcase to me directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116820 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 17:21:58 +00:00
Owen Anderson
2ab36d3502 Begin adding static dependence information to passes, which will allow us to
perform initialization without static constructors AND without explicit initialization
by the client.  For the moment, passes are required to initialize both their
(potential) dependencies and any passes they preserve.  I hope to be able to relax
the latter requirement in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116334 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 19:48:12 +00:00
Owen Anderson
ce665bd2e2 Now with fewer extraneous semicolons!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115996 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 22:25:06 +00:00
Jakob Stoklund Olesen
bf4699c561 Add MachineRegisterInfo::constrainRegClass and use it in MachineCSE.
This function is intended to be used when inserting a machine instruction that
trivially restricts the legal registers, like LEA requiring a GR32_NOSP
argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115875 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-06 23:54:39 +00:00
Evan Cheng
c2b768f09e Machine CSE was forgetting to clear some data structures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114222 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 21:59:42 +00:00
Evan Cheng
f437f73348 Fix a potential bug that can cause miscomparison with and without debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114220 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 21:56:26 +00:00
Evan Cheng
6542416560 Machine CSE preserves CFG. Pass manager was freeing machineloopinfo after machine cse before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111281 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 20:57:42 +00:00
Owen Anderson
90c579de5a Reapply r110396, with fixes to appease the Linux buildbot gods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110460 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06 18:33:48 +00:00
Owen Anderson
1f74590e9d Revert r110396 to fix buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110410 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06 00:23:35 +00:00
Owen Anderson
9ccaf53ada Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static
ID member as the sole unique type identifier.  Clean up APIs related to this change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110396 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05 23:42:04 +00:00
Owen Anderson
d13db2c59c Fix batch of converting RegisterPass<> to INTIALIZE_PASS().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109045 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 22:09:45 +00:00
Jakob Stoklund Olesen
04c528a0c8 Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.
TII::isMoveInstr is going tobe completely removed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108507 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-16 04:45:42 +00:00
Jakob Stoklund Olesen
0bc25f4040 Convert EXTRACT_SUBREG to COPY when emitting machine instrs.
EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead.

Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg().
The isMoveInstr hook will be removed later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107879 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08 16:40:22 +00:00
Jakob Stoklund Olesen
273f7e4299 Detect and handle COPY in many places.
This code is transitional, it will soon be possible to eliminate
isExtractSubreg, isInsertSubreg, and isMoveInstr in most places.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107547 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-03 00:04:37 +00:00
Evan Cheng
2b4e727c6f Re-apply 105308 with fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105502 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 23:28:13 +00:00
Bob Wilson
3844173f6e Revert 105308.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105399 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-03 18:28:31 +00:00
Evan Cheng
9d709a8edb Enable machine cse of instructions which define physical registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105308 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-02 01:08:27 +00:00
Eric Christopher
e81d010589 Make this LookAheadLimit, not the uninitialized LookAheadLeft.
Evan please verify!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104408 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 23:40:03 +00:00
Evan Cheng
835810bbf8 Allow machine cse to cse instructions which define physical registers. Controlled by option -machine-cse-phys-defs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104385 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 21:22:19 +00:00
Dan Gohman
49b4589978 Add a utility function for conservatively clearing kill flags, and make
use of it in MachineCSE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103726 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13 19:24:00 +00:00
Evan Cheng
3115698611 Rewrite machine cse to avoid recursion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101964 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21 00:21:07 +00:00
Evan Cheng
d6060a4ce9 Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101914 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20 17:27:38 +00:00
Evan Cheng
db8771af28 After trivial coalescing, the MI being visited may have become a copy. Avoid adding it to CSE hash table since copies aren't being considered for CSE and they may be deleted.
rdar://7819990


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100170 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 02:21:24 +00:00
Evan Cheng
2250425d6e dbg_value may end a block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99378 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-24 01:50:28 +00:00
Evan Cheng
112e5e7eff Code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99319 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-23 20:33:48 +00:00
Dale Johannesen
e68ea060c7 Fix debug_value handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98224 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-11 02:10:24 +00:00
Evan Cheng
2938a00f29 Add a couple more heuristics to neuter machine cse some more.
1. Be careful with cse "cheap" expressions. e.g. constant materialization. Only cse them when the common expression is local or in a direct predecessor. We don't want cse of cheap instruction causing other expressions to be spilled.
2. Watch out for the case where the expression doesn't itself uses a virtual register. e.g. lea of frame object. If the common expression itself is used by copies (common for passing addresses to function calls), don't perform the cse. Since these expressions do not use a register, it creates a live range but doesn't close any, we want to be very careful with increasing register pressure.

Note these are heuristics so machine cse doesn't make register allocator unhappy. Once we have proper live range splitting and re-materialization support in place, these should be evaluated again.

Now machine cse is almost always a win on llvm nightly tests on x86 and x86_64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98121 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-10 02:12:03 +00:00
Evan Cheng
bfc9999563 Allow more cross-rc coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98048 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-09 06:38:17 +00:00
Jakob Stoklund Olesen
1552cccc76 Don't do illegal cross-class coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98044 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-09 03:56:06 +00:00
Evan Cheng
31f94c7c22 - Make the machine cse dumb coalescer (as opposed to the more awesome simple
coalescer) handle sub-register classes.
- Add heuristics to avoid non-profitable cse. Given the current lack of live
  range splitting, avoid cse when an expression has PHI use and the would be
  new use is in a BB where the expression wasn't already being used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98043 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-09 03:21:12 +00:00
Evan Cheng
5196018d9c Don't waste time trying to CSE labels, phis, inline asm. Definitely avoid cse implicit-def for obvious performance reason.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98009 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-08 23:49:12 +00:00
Evan Cheng
6c3b8ac6c9 Restrict machine cse to really trivial coalescing. Leave the heavy lifting to a real coalescer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98007 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-08 23:28:08 +00:00
Evan Cheng
6cc1aeaad2 Don't update physical register def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97861 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-06 01:14:19 +00:00
Evan Cheng
a5f32cb3d3 Avoid cse load instructions unless they are known to be invariant loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97747 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04 21:18:08 +00:00
Evan Cheng
b3958e8032 Look ahead a bit to determine if a physical register def that is not marked dead is really alive. This is necessary to catch a lot of common cse opportunities for targets like x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97706 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04 01:33:55 +00:00