Commit Graph

82948 Commits

Author SHA1 Message Date
Chris Lattner
74ee0ef6a7 quick fix for PR13006, will check in testcase later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157813 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 15:02:52 +00:00
Stepan Dyatkovskiy
f8d14c4ca3 PR1255: case ranges.
IntItem cleanup. IntItemBase, IntItemConstantIntImp and IntItem merged into IntItem. All arithmetic operators was propogated from APInt. Also added comparison operators <,>,<=,>=. Currently you will find set of macros that propogates operators from APInt to IntItem in the beginning of IntegerSubset. Note that THESE MACROS WILL REMOVED after all passes will case-ranges compatible. Also note that these macros much smaller pain that something like this:
if (V->getValue().ugt(AnotherV->getValue()) { ... }

These changes made IntItem full featured integer object. It allows to make IntegerSubset class generic (move out all ConstantInt references inside and add unit-tests) in next commits.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157810 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 10:06:14 +00:00
Craig Topper
14f094bb2b Enable automatic detection of FMA3 support to allow intrinsics to be used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157805 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 06:10:14 +00:00
Craig Topper
3a8172ad8d Remove fadd(fmul) patterns for FMA3. This needs to be implemented by paying attention to FP_CONTRACT and matching @llvm.fma which is not available yet. This will allow us to enablle intrinsic use at least though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157804 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 06:07:48 +00:00
Craig Topper
78fc72d0f1 Add VFNSUB* instructions to folding table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157802 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 05:48:39 +00:00
Craig Topper
241c15ffaa Remove a trailing space and fix a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157801 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 05:34:01 +00:00
Chris Lattner
f59e4e3452 enhance the logic for looking through tailcalls to look through transparent casts
in multiple-return value scenarios, like what happens on X86-64 when returning
small structs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157800 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 05:29:15 +00:00
Craig Topper
d9567223e8 Tidy up. Remove trailing spaces and fix the worst of the 80 column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157799 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 05:24:29 +00:00
Chris Lattner
5b0d946537 enhance getNoopInput to know about vector<->vector bitcasts of legal
types, as well as int<->ptr casts.  This allows us to tailcall functions
with some trivial casts between the call and return (i.e. because the
return types disagree).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157798 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 05:16:33 +00:00
Chris Lattner
09c14c0836 add some simple 64-bit tail call tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157797 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 05:03:31 +00:00
Chris Lattner
cd6015cc8a rearrange some logic, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157796 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 05:01:15 +00:00
Chris Lattner
e8ea60b8ba merge some tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157795 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 05:00:54 +00:00
Chris Lattner
e109648880 rename test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157794 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 04:58:50 +00:00
Manman Ren
763a75dbf7 ARM: support struct byval in llvm
We handle struct byval by inserting a pseudo op, which will be expanded to a
loop at ExpandISelPseudos.
A separate patch for clang will be submitted to enable struct byval.

rdar://9877866


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157793 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 02:44:42 +00:00
Michael J. Spencer
cdd6b2dca1 Fix 80 columns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157788 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 00:58:41 +00:00
Eric Christopher
fc4199bf4a Add support for enum forward declarations.
Part of rdar://11570854

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157786 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 00:22:32 +00:00
Chad Rosier
547d8045fb Put the shiny new MCSubRegIterator to work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157783 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 00:02:08 +00:00
Nuno Lopes
1cbf2be592 add -bounds-checking-multiple-traps option to make one trap BB per check
disabled by default for now; we can discusse the default value (& name) later

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157777 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 22:58:48 +00:00
Nuno Lopes
0463cce55d revamp BoundsChecking considerably:
- compute size & offset at the same time. The side-effects of this are that we now support negative GEPs. It's now approaching a phase that it can be reused by other passes (e.g., lowering of the objectsize intrinsic)
 - use APInt throughout to handle wrap-arounds
 - add support for PHI instrumentation
 - add a cache (required for recursive PHIs anyway)
 - remove hoisting support for now, since it was wrong in a few cases

sorry for the churn here.. tests will follow soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157775 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 22:45:40 +00:00
Benjamin Kramer
91a8ad71aa IntrusiveRefCntPtr: Simplify operator= as suggested by Richard Smith.
This way the constructors do all the hard work. No intended functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157773 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 22:25:25 +00:00
Owen Anderson
a835f00702 Make this testcase independent of register allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157761 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 18:07:02 +00:00
Jakob Stoklund Olesen
ee66b417ef Add support for return value promotion in X86 calling conventions.
Patch by Yiannis Tsiouris!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157757 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 17:28:20 +00:00
Jakob Stoklund Olesen
b2a6d8100c Didn't mean to export this function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157756 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 17:21:27 +00:00
Manman Ren
91c5346d91 X86: replace SUB with CMP if possible
This patch will optimize the following
        movq    %rdi, %rax
        subq    %rsi, %rax
        cmovsq  %rsi, %rdi
        movq    %rdi, %rax
to
        cmpq    %rsi, %rdi
        cmovsq  %rsi, %rdi
        movq    %rdi, %rax

Perform this optimization if the actual result of SUB is not used.

rdar: 11540023


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157755 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 17:20:29 +00:00
Jakob Stoklund Olesen
5ddc04caf2 Add a PrintRegUnit helper similar to PrintReg.
Reg-units are named after their root registers, and most units have a
single root, so they simply print as 'AL', 'XMM0', etc. The rare dual
root reg-units print as FPSCR~FPSCR_NZCV, FP0~ST7, ...

The printing piggybacks on the existing register name tables, so no
extra const data space is required.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157754 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 17:18:29 +00:00
Jakob Stoklund Olesen
f5d4e5158f Emit register unit root tables.
Each register unit has one or two root registers. The full set of
registers containing a given register unit can be computed as the union
of the root registers and their super-registers.

Provide an MCRegUnitRootIterator class to enumerate the roots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157753 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 17:18:26 +00:00
Joel Jones
703360f93c Fix typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157752 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 17:11:25 +00:00
Rafael Espindola
a1b95f53cc Fix typos noticed by Benjamin Kramer.
Also make the checks stronger and test that we reject ranges that overlap
a previous wrapped range.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157749 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 16:04:26 +00:00
Benjamin Kramer
c8e340da82 X86: Rename the CLMUL target feature to PCLMUL.
It was renamed in gcc/gas a while ago and causes all kinds of
confusion because it was named differently in llvm and clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157745 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 14:34:17 +00:00
Rafael Espindola
c49b29ef5d Require intervals in the range metadata to be in a canonical form: They must
be non contiguous, non overlapping and sorted by the lower end.

While this is technically a backward incompatibility, every frontent currently
produces range metadata with a single interval and we don't have any pass
that merges intervals yet, so no existing bitcode files should be rejected by
this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157741 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 13:45:46 +00:00
Elena Demikhovsky
177cf1e1a3 Added FMA3 Intel instructions.
I disabled FMA3 autodetection, since the result may differ from expected for some benchmarks.
I added tests for GodeGen and intrinsics.
I did not change llvm.fma.f32/64 - it may be done later.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157737 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 09:20:20 +00:00
Duncan Sands
53b4177df7 Enhance the sinking code to handle diamond patterns. Patch by
Carlo Alberto Ferraris.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157736 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 08:09:49 +00:00
Craig Topper
0559a2f8ae Add intrinsic for pclmulqdq instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157731 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 04:37:40 +00:00
Akira Hatanaka
28ee4fdf20 Cleanup and factoring of mips16 tablegen classes. Make register classes
CPU16RegsRegClass and CPURARegRegClass available. Add definition of mips16
jalr instruction.

Patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157730 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 02:59:44 +00:00
Eric Christopher
feba19309d Fix typo in assembly directive. Noticed by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157726 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 00:53:18 +00:00
Akira Hatanaka
f6a186ed0b Add lit.local.cfg to run the tests in test/MC/Disassembler/Mips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157725 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31 00:49:56 +00:00
Jakob Stoklund Olesen
4c91bdafac Avoid depending on list orders and register numbering.
This code is covered by test/CodeGen/ARM/arm-modifier.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157720 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 23:00:43 +00:00
Jakob Stoklund Olesen
4aecc761c7 Extract some pointer hacking to a function.
Switch to MCSuperRegIterator while we're there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157717 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 22:40:03 +00:00
Jakob Stoklund Olesen
9cda1be0aa Prioritize smaller register classes for urgent evictions.
It helps compile exotic inline asm. In the test case, normal GR32
virtual registers use up eax-edx so the final GR32_ABCD live range has
no registers left. Since all the live ranges were tiny, we had no way of
prioritizing the smaller register class.

This patch allows tiny unspillable live ranges to be evicted by tiny
unspillable live ranges from a smaller register class.

<rdar://problem/11542429>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157715 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 21:46:58 +00:00
Jakob Stoklund Olesen
ff09e56cda Print uint16_t numbers without a sign.
It seems I broke C++11.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157711 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 19:20:19 +00:00
Eric Christopher
6ab75b4dcb Add support for the mips inline asm 'm' output modifier.
Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157709 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 19:05:19 +00:00
Owen Anderson
f917d20561 Switch the canonical FMA term operand order to match both the comment I wrote and the usual LLVM convention.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157708 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 18:54:50 +00:00
Owen Anderson
85ef6f4c99 Teach DAGCombine to canonicalize the position of a constant in the term operands of an FMA node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157707 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 18:50:39 +00:00
Chad Rosier
06a23ea808 Remove extra space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157706 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 18:47:55 +00:00
David Blaikie
4f56a30e0d Reinstate -O3 for LTO.
This broke in r144788 when the CodeGenOpt option was moved from everywhere else
(specifically, from addPassesToEmitFile) to createTargetMachine. Since
LTOCodeGenerator wasn't passing the 4th argument, when the 4th parameter became
the 3rd, it silently continued to compile (int->bool conversion) but meant
something completely different.

This change preserves the existing (accidental) and previous (default)
semantics of the addPassesToEmitFile and restores the previous/intended
CodeGenOpt argument by passing it appropriately to createTargetMachine.

(discovered by pending changes to -Wconversion to catch constant->bool
conversions)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157705 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 18:42:51 +00:00
Benjamin Kramer
127563b216 Make sure that we're dealing with a binary SCEVExpr when simplifying.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157704 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 18:42:43 +00:00
Jakob Stoklund Olesen
6c823822cd Fix some uses of getSubRegisters() to use getSubReg() instead.
It is better to address sub-registers directly by name instead of
relying on their position in the sub-register list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157703 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 18:40:49 +00:00
Jakob Stoklund Olesen
275fd2523e Remove some redundant tests.
An empty list is not represented as a null pointer. Let TRI do its own
shortcuts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157702 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 18:38:56 +00:00
Benjamin Kramer
6cf07a80ff Teach SCEV's icmp simplification logic that a-b == 0 is equivalent to a == b.
This also required making recursive simplifications until
nothing changes or a hard limit (currently 3) is hit.

With the simplification in place indvars can canonicalize
loops of the form
for (unsigned i = 0; i < a-b; ++i)
into
for (unsigned i = 0; i != a-b; ++i)
which used to fail because SCEV created a weird umax expr
for the backedge taken count.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157701 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 18:32:23 +00:00
Chris Lattner
f186df0d3e it's pointed out that R11 can be used for magic things, and doing things just for 64-bit registers is silly. Just optimize 3 more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157699 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30 18:08:02 +00:00