Commit Graph

30573 Commits

Author SHA1 Message Date
Alex Lorenz
926d65d4f7 MIR Parser: Use correct source locations for machine instruction diagnostics.
This commit translates the source locations for MIParser diagnostics from
the locations in the machine instruction string to the locations in the
MIR file.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10574


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240474 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 22:39:23 +00:00
Simon Pilgrim
3ebe082ff9 [X86][SSE] Added full set of 128-bit vector shift tests.
Removed some old duplicate tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240465 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 21:18:15 +00:00
Alexey Samsonov
a9a3bc268b Let llvm::ReplaceInstWithInst copy debug location from old to new instruction.
Currently some users of this function do this explicitly, and all the
rest forget to do this.

ThreadSanitizer was one of such users, and had missing debug
locations for calls into TSan runtime handling atomic operations,
eventually leading to poorly symbolized stack traces and malfunctioning
suppressions.

This is another change relevant to PR23837.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240460 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 21:00:08 +00:00
Artem Belevich
572587cad1 [NVPTX] Added missing test case for llvm.nvvm.sqrt.f NVPTX intrinsic
Differential Revision: http://reviews.llvm.org/D10663

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240437 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 18:22:17 +00:00
Rafael Espindola
38e853141d Pass -m to the linker in this test.
Fixes the test on a ppc host.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240431 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 18:04:54 +00:00
Alex Lorenz
9982d6f7ee MIR Serialization: Serialize physical register machine operands.
This commit introduces functionality that's used to serialize machine operands.
Only the physical register operands are serialized by this commit.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10525


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240425 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 16:35:26 +00:00
Rafael Espindola
bd1e605b5c objdump: Don't print a (always 0) size for MachO symbols.
Only common symbol on MachO and COFF have a size.

For COFF we already had a custom format.

For MachO, there is no native objdump and we were printing it as ELF. Now
we only print the sizes for symbols that actually have them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240422 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 15:45:38 +00:00
Toma Tabacu
115be6213d [mips] [IAS] Add partial support for the ULHU pseudo-instruction.
Summary:
This only adds support for ULHU of an immediate address with/without a source register.
It does not include support for ULHU of the address of a symbol.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9671

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240410 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 14:39:42 +00:00
Petar Jovanovic
7c5bf4d38a [mips64] Emit correct addend for some PC-relative relocations
So far, LLVM has not emitted correct addend for N64 and N32 ABI. This patch
fixes that. It also removes fixup from MCJIT for R_MIPS_PC16 relocation.

Patch by Vladimir Radosavljevic.

Differential Revision: http://reviews.llvm.org/D10565


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240404 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 13:54:42 +00:00
Daniel Jasper
b7f5b8b4b2 Revert r240302 ("Bring r240130 back.").
This causes errors like:

  ld: error: blah.o: requires dynamic R_X86_64_PC32 reloc against '' which
  may overflow at runtime; recompile with -fPIC
  blah.cc:function f(): error: undefined reference to ''
  blah.o:g(): error: undefined reference to ''

I have not yet come up with an appropriate reproduction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240394 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 11:31:32 +00:00
Daniel Sanders
43fab48d42 [mips] llvm-readobj can parse .MIPS.abiflags. No need to check the bytes.
Summary:

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10538


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240392 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 10:11:36 +00:00
Elena Demikhovsky
d96e362b3f AVX-512: Added all forms of VPABS instruction
Added all intrinsics, tests for encoding, tests for intrinsics.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240386 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 08:19:46 +00:00
Justin Bogner
a915f41453 test: Move target dependent test in their own folder for c API test
Dissasembly tests depends on target. The problem is that it disable
all tests if all targets are not compiled. This moves things around in
order to get target specific code in a target specific folder.

Patch by Amaury Sechet. Thanks!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240380 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 06:46:54 +00:00
Weiming Zhao
ab3926f6e4 Fix PR13851: Preserve metadata for the unswitched branch
This patch copies the metadata of the unswitched branch to the newly
crreated branch in loop unswitch pass.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240378 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 05:31:09 +00:00
Rafael Espindola
da523bd707 Add a test for the previous commit.
This shows how two symbols at the same address are handled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240374 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 03:42:44 +00:00
David Majnemer
3f2dc2455d [InstCombine] Optimize subtract of selects into a select of a sub
This came up when examining some code generated by clang's IRGen for
certain member pointers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240369 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 02:49:24 +00:00
Rafael Espindola
393bbf5c86 Fix tests when X86 is not enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240368 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 02:45:44 +00:00
Rafael Espindola
dba070638a Compute correct symbol sizes for MachO and COFF.
Before this would dump from the symbol start to the end of the section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240367 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 02:20:37 +00:00
Sanjay Patel
8bd59f505a [x86] generalize reassociation optimization in machine combiner to 2 instructions
Currently ( D10321, http://reviews.llvm.org/rL239486 ), we can use the machine combiner pass
to reassociate the following sequence to reduce the critical path:

A = ? op ?
B = A op X
C = B op Y
-->
A = ? op ?
B = X op Y
C = A op B

'op' is currently limited to x86 AVX scalar FP adds (with fast-math on), but in theory, it could
be any associative math/logic op (see TODO in code comment).

This patch generalizes the pattern match to ignore the instruction that defines 'A'. So instead of
a sequence of 3 adds, we now only need to find 2 dependent adds and decide if it's worth
reassociating them.

This generalization has a compile-time cost because we can now match more instruction sequences
and we rely more heavily on the machine combiner to discard sequences where reassociation doesn't
improve the critical path.

For example, in the new test case:

A = M div N
B = A add X
C = B add Y

We'll match 2 reassociation patterns, but this transform doesn't reduce the critical path:

A = M div N
B = A add Y
C = B add X

We need the combiner to reject that pattern but select this:

A = M div N
B = X add Y
C = B add A

Differential Revision: http://reviews.llvm.org/D10460



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240361 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 00:39:40 +00:00
Evgeniy Stepanov
845d1a6a17 Fix PR23914.
r226830 moved the declaration of Buf to a nested scope, resulting
in a dangling reference (in StringRef Name), and a use-after-free.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240357 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 23:36:03 +00:00
Adam Nemet
08056a49f1 [LoopDist] Improve variable names and comments in LoopVersioning class, NFC
As with the previous patch, the goal is to turn the class into a general
loop-versioning class.  This patch removes any references to loop
distribution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240352 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 22:59:40 +00:00
Pawel Bylica
e903f64b10 Revert r240291: causes problems in self-hosted builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240343 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 21:54:07 +00:00
Peter Collingbourne
c2433959db Linker: Do not expect comdat to exist in source module.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240341 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 21:46:51 +00:00
Frederic Riss
11fcb49922 [Object] Search for architecures by name in MachOUniversalBinary::getObjectForArch()
The reason we need to search by name rather than by Triple::ArchType
is to handle subarchitecture correclty. There is no different ArchType
for the x86_64h architecture (it identifies itself as x86_64), or for
the various ARM subarches. The only way to get to the subarch slice
in an universal binary is to search by name.

This issue led to hard to debug and transient symbolication failures
in Asan tests (it mostly works, because the files are very similar).

This also affects the Profiling infrastucture as it is the other user
of that API.

Reviewers: samsonov, bogner

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10604

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240339 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 21:33:24 +00:00
Pawel Bylica
9a2f12cea9 Set missing x86 arch in a CodeGen regression test.
Fixes the regression test added in r240291.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240336 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 21:18:10 +00:00
Simon Pilgrim
6f214c72d6 [X86][AVX2] Added missing stack folding tests for vpshufhw/vpshuflw
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240332 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 21:10:42 +00:00
Tom Stellard
9e7f0c8e77 R600/SI: Use ELF64 format instead of ELF32
Reviewers: arsenm, rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10392

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240331 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 21:03:54 +00:00
Tom Stellard
309f60c15a R600: Use EM_AMDGPU for the ELF Machine type
Reviewers: arsenm, rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10390

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240330 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 21:03:52 +00:00
Ahmed Bougacha
a3afb70a5d [X86] Teach load folding to accept scalar _Int users of MOVSS/MOVSD.
The _Int instructions are special, in that they operate on the full
VR128 instead of FR32.  The load folding then looks at MOVSS, at the
user, and bails out when it sees a size mismatch.

What we really know is that the rm_Int instructions don't load the
higher lanes, so folding is fine.

This happens for the straightforward intrinsic code, e.g.:

    _mm_add_ss(a, _mm_load_ss(p));

Fixes PR23349.

Differential Revision: http://reviews.llvm.org/D10554


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240326 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 20:51:51 +00:00
Alex Lorenz
f654cdae59 MIR Serialization: Introduce a lexer for machine instructions.
This commit adds a function that tokenizes the string containing
the machine instruction. This commit also adds a struct called 
'MIToken' which is used to represent the lexer's tokens.

Reviewers: Sean Silva

Differential Revision: http://reviews.llvm.org/D10521


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240323 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 20:37:46 +00:00
Peter Collingbourne
47e71da4b3 SafeStack: Create the unsafe stack pointer on demand.
This avoids creating an unnecessary undefined reference on targets such as
NVPTX that require such references to be declared in asm output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240321 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 20:26:54 +00:00
Pete Cooper
54d0bc35fe Change .thumb_set to have the same error checks as .set.
According to the documentation, .thumb_set is 'the equivalent of a .set directive'.

We didn't have equivalent behaviour in terms of all the errors we could throw, for
example, when a symbol is redefined.

This change refactors parseAssignment so that it can be used by .set and .thumb_set
and implements tests for .thumb_set for all the errors thrown by that method.

Reviewed by Rafael Espíndola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240318 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 19:35:57 +00:00
Sanjay Patel
73aa02eb09 [x86] set default reciprocal (division and square root) codegen to match GCC
D8982 ( checked in at http://reviews.llvm.org/rL239001 ) added command-line 
options to allow reciprocal estimate instructions to be used in place of
divisions and square roots.

This patch changes the default settings for x86 targets to allow that recip
codegen (except for scalar division because that breaks too much code) when
using -ffast-math or its equivalent. 

This matches GCC behavior for this kind of codegen.

Differential Revision: http://reviews.llvm.org/D10396



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240310 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 18:29:44 +00:00
Sanjoy Das
e0ef46e5e7 [FaultMaps] Add a parser for the __llvm__faultmaps section.
Summary:
The parser is exercised by llvm-objdump using -print-fault-maps.  As is
probably obvious, the code itself was "heavily inspired" by
http://reviews.llvm.org/D10434.

Reviewers: reames, atrick, JosephTremoulet

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10491

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240304 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 18:03:02 +00:00
Rafael Espindola
afd779f72d Bring r240130 back.
Now that pr23900 is fixed, we can bring it back with no changes.

Original message:

Make all temporary symbols unnamed.

What this does is make all symbols that would otherwise start with a .L
(or L on MachO) unnamed.

Some of these symbols still show up in the symbol table, but we can just
make them unnamed.

In order to make sure we produce identical results when going thought assembly,
all .L (not just the compiler produced ones), are now unnamed.

Running llc on llvm-as.opt.bc, the peak memory usage goes from 208.24MB to
205.57MB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240302 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 17:52:52 +00:00
Alex Lorenz
2f801faafb MIR Serialization: Serialize machine instruction names.
This commit implements initial machine instruction serialization. It
serializes machine instruction names. The instructions are represented
using a YAML sequence of string literals and are a part of machine
basic block YAML mapping.

This commit introduces a class called 'MIParser' which will be used to
parse the machine instructions and operands.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10481


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240295 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 17:02:30 +00:00
Pawel Bylica
39befc6ca8 Fix shl folding in DAG combiner.
Summary: The code responsible for shl folding in the DAGCombiner was assuming incorrectly that all constants are less than 64 bits. This patch simply changes the way values are compared.

Test Plan: A regression test included.

Reviewers: andreadb

Reviewed By: andreadb

Subscribers: andreadb, test, llvm-commits

Differential Revision: http://reviews.llvm.org/D10602

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240291 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 15:58:11 +00:00
Rafael Espindola
0ed63077a2 Add a triple to the test to fix it on some hosts.
The slp vectorizer doesn't optimize this case in 32 bits.

Fixes PR23453.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240289 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 15:44:20 +00:00
Toma Tabacu
8204fb27ac [mips] [IAS] Add support for LAReg with identical source and destination register operands.
Summary: In this case, we're supposed to load the immediate in AT and then ADDu it with the source register and put it in the destination register.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9367

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240278 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 13:10:23 +00:00
Elena Demikhovsky
114489ab24 AVX-512: added VPSHUFB instruction - all SKX forms
Added intrinsics and encoding tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240277 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 13:00:42 +00:00
Toma Tabacu
d174678830 [mips] [IAS] Add support for LASym with identical source and destination register operands.
Summary:
In this case, we're supposed to load the address of the symbol in AT and then ADDu it with the source register and
put it in the destination register.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9366

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240273 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 12:08:39 +00:00
Elena Demikhovsky
4f1ddd396b AVX-512: All forms of VCOPMRESS VEXPAND instructions,
encoding tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240272 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 11:16:30 +00:00
Elena Demikhovsky
42ceb12123 Reverted AVX-512 vector shuffle
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240258 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 09:01:15 +00:00
Michael Kuperstein
12219f8c85 [X86] Allow more call sequences to use push instructions for argument passing
This allows more call sequences to use pushes instead of movs when optimizing for size.
In particular, calling conventions that pass some parameters in registers (e.g. thiscall) are now supported.

Differential Revision: http://reviews.llvm.org/D10500

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240257 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 08:31:22 +00:00
Elena Demikhovsky
c768510422 AVX-512: Added intrinsics for VPERMT2W/D/Q/PS/PD and
VPERMI2W/D/Q/PS/PD instructions.
Added tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240256 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 06:45:48 +00:00
Rafael Espindola
2faef9ccb0 Add the testcase from pr23900.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240253 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 01:29:24 +00:00
Duncan P. N. Exon Smith
f1c527b5c1 AsmPrinter: Don't emit empty .debug_loc entries
If we don't know how to represent a .debug_loc entry, skip the entry
entirely rather than emitting an empty one.  Similarly, if a .debug_loc
list has no entries, don't create the list.

We still want to create the variables, just in an optimized-out form
that doesn't have a DW_AT_location.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240244 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-21 16:54:56 +00:00
Simon Pilgrim
87f860c737 [X86][SSE] Added missing stack folding test for CVTSD2SS instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240241 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-21 16:07:47 +00:00
Hans Wennborg
ee16995e3d Switch lowering: add heuristic for filling leaf nodes in the weight-balanced binary search tree
Sparse switches with profile info are lowered as weight-balanced BSTs. For
example, if the node weights are {1,1,1,1,1,1000}, the right-most node would
end up in a tree by itself, bringing it closer to the top.

However, a leaf in this BST can contain up to 3 cases, and having a single
case in a leaf node as in the example means the tree might become
unnecessarily high.

This patch adds a heauristic to the pivot selection algorithm that moves more
cases into leaf nodes unless that would lower their rank. It still doesn't
yield the optimal tree in every case, but I believe it's conservatibely correct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240224 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-20 17:14:07 +00:00
Simon Pilgrim
1eabc9fb9d [X86][SSE] Fix PerformSExtCombine bug that accessed the wrong return value of an aggregate type.
Fix to rL237885 to ensure that it accesses the correct return value of an aggregate type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240223 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-20 16:19:24 +00:00