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22940 Commits

Author SHA1 Message Date
Michael Liao
730b9dd2ce Fix typo in r164357 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164452 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-22 03:39:42 +00:00
Akira Hatanaka
ef5fc952e8 MIPS DSP: Add immediate leaves. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164435 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-22 00:07:12 +00:00
Akira Hatanaka
67032b27cd MIPS DSP: Add predicates and instruction template. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164434 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-22 00:06:06 +00:00
Akira Hatanaka
b430cecc0e Add MIPS DSP register classes. Set actions of DSP vector operations and override 
TargetLowering's callback functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164431 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 23:58:31 +00:00
Akira Hatanaka
6fad5e742d SelectionDAG node enums for MIPS DSP nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164430 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 23:52:47 +00:00
Akira Hatanaka
1024f290d1 Add MIPS accumulator and DSP control registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164429 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 23:48:37 +00:00
Akira Hatanaka
a9adbf6df7 Add flags and feature bits for mips dsp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164428 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 23:41:49 +00:00
Chad Rosier
d717a066c6 [ms-inline asm] Expose the mnemonicIsValid() function in the AsmParser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164420 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 22:21:26 +00:00
Chad Rosier
7d4e989da9 Add comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164415 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 21:08:46 +00:00
Chad Rosier
4a6203a31b Add comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164414 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 20:51:43 +00:00
Chad Rosier
e5e674ba11 [fast-isel] Fallback to SelectionDAG isel if we require strict alignment for 
non-aligned i32 loads/stores.
rdar://12304911

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164381 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 16:58:35 +00:00
Michael Liao
ba4388656c Fix a typo in r164357 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164372 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 16:03:03 +00:00
Bill Wendling
ef99fe8efa Make the 'get*AlignmentFromAttr' functions into member functions within the Attributes class. Now with fix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164370 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 15:26:31 +00:00
Andrew Trick
2f1d5d44c0 Cortex-A9 latency fixes (w/ -schedmodel only). 
Quick review against the manual revealed a few obvious mistakes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164361 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 05:06:40 +00:00
Michael Liao
fe87c302aa Add missing i8 max/min/umax/umin support 
- Fix PR5145 and turn on test 8-bit atomic ops



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164358 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 03:18:52 +00:00
Michael Liao
0838249a6a Revise td of X86 atomic instructions 
- Rewirte most atomic instructions in templates for both better
  maintenance and future extensions, such as HLE in TSX.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164357 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 03:00:17 +00:00
NAKAMURA Takumi
b377635592 Mips16FrameLowering.cpp: Remove unused TII introduced in r164349. [-Wunused-variable] 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164354 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 02:21:30 +00:00
Akira Hatanaka
0fdf3b029b Properly save and restore RA and Mips16 callee save registers S0,S1 
Patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164349 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 01:08:16 +00:00
Chad Rosier
d70c98e884 [fast-isel] Fallback to SelectionDAG isel if we require strict alignment for 
non-halfword-aligned i16 loads/stores.
rdar://12304911

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164345 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 00:41:42 +00:00
Jim Grosbach
d314ab525d Tidy up. Whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164344 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 00:36:42 +00:00
Jim Grosbach
1f9f599e70 Tidy up. Formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164343 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 00:26:53 +00:00
Jim Grosbach
ced674e470 ARM: Use a dedicated intrinsic for vector bitwise select. 
The expression based expansion too often results in IR level optimizations
splitting the intermediate values into separate basic blocks, preventing
the formation of the VBSL instruction as the code author intended. In
particular, LICM would often hoist part of the computation out of a loop.

rdar://11011471

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164340 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 00:18:20 +00:00
Bill Wendling
4aa189909a Revert r164308 to fix buildbots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164309 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-20 16:59:57 +00:00
Bill Wendling
f2e89e00b4 Make the 'get*AlignmentFromAttr' functions into member functions within the Attributes class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164308 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-20 16:27:05 +00:00
Craig Topper
aa258442b9 Change enum type in a static table to uint8_t instead. Saves about 700 hundred bytes of static data. Change unsigned char in same table to uint8_t for explicitness. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164285 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-20 06:14:08 +00:00
Michael Liao
b118a073d7 Re-work X86 code generation of atomic ops with spin-loop 
- Rewrite/merge pseudo-atomic instruction emitters to address the
  following issue:
  * Reduce one unnecessary load in spin-loop

    previously the spin-loop looks like

        thisMBB:
        newMBB:
          ld  t1 = [bitinstr.addr]
          op  t2 = t1, [bitinstr.val]
          not t3 = t2  (if Invert)
          mov EAX = t1
          lcs dest = [bitinstr.addr], t3  [EAX is implicit]
          bz  newMBB
          fallthrough -->nextMBB

    the 'ld' at the beginning of newMBB should be lift out of the loop
    as lcs (or CMPXCHG on x86) will load the current memory value into
    EAX. This loop is refined as:

        thisMBB:
          EAX = LOAD [MI.addr]
        mainMBB:
          t1 = OP [MI.val], EAX
          LCMPXCHG [MI.addr], t1, [EAX is implicitly used & defined]
          JNE mainMBB
        sinkMBB:

  * Remove immopc as, so far, all pseudo-atomic instructions has
    all-register form only, there is no immedidate operand.

  * Remove unnecessary attributes/modifiers in pseudo-atomic instruction
    td

  * Fix issues in PR13458

- Add comprehensive tests on atomic ops on various data types.
  NOTE: Some of them are turned off due to missing functionality.

- Revise tests due to the new spin-loop generated.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164281 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-20 03:06:15 +00:00
Michael Liao
cd9ede9fc0 Unify the logic in SelectAtomicLoadAdd and SelectAtomicLoadArith 
- Merge the processing of LOAD_ADD with other atomic load-arith
  operations
- Separate the logic getting target constant for atomic-load-op and add
  an optimization for atomic-load-add on i16 with negative value
- Optimize a minor case for atomic-fetch-add i16 with negative operand. Test
  case is revised.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164243 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-19 19:36:58 +00:00
Bill Schmidt
419f376564 Small structs for PPC64 SVR4 must be passed right-justified in registers. 
lib/Target/PowerPC/PPCISelLowering.{h,cpp}
 Rename LowerFormalArguments_Darwin to LowerFormalArguments_Darwin_Or_64SVR4.
 Rename LowerFormalArguments_SVR4 to LowerFormalArguments_32SVR4.
 Receive small structs right-justified in LowerFormalArguments_Darwin_Or_64SVR4.
 Rename LowerCall_Darwin to LowerCall_Darwin_Or_64SVR4.
 Rename LowerCall_SVR4 to LowerCall_32SVR4.
 Pass small structs right-justified in LowerCall_Darwin_Or_64SVR4.

test/CodeGen/PowerPC/structsinregs.ll
 New test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164228 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-19 15:42:13 +00:00
Craig Topper
8a312fb3aa Remove code for setting the VEX L-bit as a function of operand size from the code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164204 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-19 06:37:45 +00:00
Craig Topper
cbf3daee0b Add explicit VEX_L tags to all 256-bit instructions. This will allow us to remove code from the code emitters that examined operands to set the L-bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164202 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-19 06:06:34 +00:00
Evan Cheng
b37b6ca4bb MOVi16 (movw) is only legal on cpus with V6T2 support. rdar://12300648 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164169 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 21:24:16 +00:00
Roman Divacky
6fc3ea2f99 Fix the isLocalCall() by checking for linker weakness as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164155 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 18:27:49 +00:00
Akira Hatanaka
37236515cf Revert r164051. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164150 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 18:08:25 +00:00
Roman Divacky
f145c135f3 Avoid symbol name clash when filling TOC. 
Patch by Adhemerval Zanella.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164141 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 17:10:37 +00:00
Roman Divacky
4cd56014ae On PPC64 emit the environment pointer. Patch by Adhemerval Zanella. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164139 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 16:55:29 +00:00
Roman Divacky
eb8b7dc536 Optimize local func calls to not emit nop for TOC restoration. 
Patch by Adhemerval Zanella.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164138 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 16:47:58 +00:00
Roman Divacky
536a88ad5b When creating MCAsmBackend pass the CPU string as well. In X86AsmBackend 
store this and use it to not emit long nops when the CPU is geode which
doesnt support them.

Fixes PR11212.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164132 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 16:08:49 +00:00
James Molloy
97ecb83dff More domain conversion; convert VFP VMOVS to NEON instructions in more cases - when we may clobber the other S-lane by converting an S to a D instruction, make an effort to work out if the S lane is clobberable or not. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164114 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 08:31:15 +00:00
Andrew Trick
e127dfd0b1 TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine model. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164092 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 03:18:56 +00:00
Evan Cheng
d10eab0a95 Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byte 
aligned address. Based on patch by David Peixotto.

Also use vld1.64 / vst1.64 with 128-bit alignment to take advantage of alignment
hints. rdar://12090772, rdar://12238782


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164089 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-18 01:42:45 +00:00
Andrew Trick
e1b5328717 Revert r164061-r164067. Most of the new subtarget emitter. 
I have to work out the Target/CodeGen header dependencies
before putting this back.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164072 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 23:00:42 +00:00
Andrew Trick
db7afac457 TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine model. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164061 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 22:18:55 +00:00
Jan Wen Voung
b024b7014a Add some cases to x86 OptimizeCompare to handle DEC and INC, too. 
While we are setting the earlier def to true, also make it live.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164056 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 22:04:23 +00:00
Akira Hatanaka
ff1547890a Make sure there is enough room for RA. getStackSize needs to be cleaned up but 
we will do that when we implement the full save/restore.

Patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164051 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 20:02:42 +00:00
Benjamin Kramer
2e34b99e59 LLVM_ATTRIBUTE_USED forces emission of a function. To silence unused function warnings use LLVM_ATTRIBUTE_UNUSED. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164036 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 16:46:22 +00:00
Silviu Baranga
c8bf0f8662 Removed the VMLxForwarding feature for the Cortex-A15 target. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164030 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-17 14:10:54 +00:00
Craig Topper
6ffb4024d8 Change unsigned to uint32_t to match base class declaration and other targets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164001 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-16 18:10:23 +00:00
Nadav Rotem
638e4c13cb The PMOVZXWD family of functions had patterns extends narrow vector types to wide vector types. 
It had patterns for zext-loading and extending. This commit adds patterns for loading a wide type, performing a bitcast,
and extending. This is an odd pattern, but it is commonly used when writing code with intrinsics.

rdar://11897677



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163995 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-16 07:39:07 +00:00
Craig Topper
86a1c32e67 Use LLVM_DELETED_FUNCTION in place of 'DO NOT IMPLEMENT' comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163974 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-15 17:09:36 +00:00
Craig Topper
dd100d831b Remove unused private fields to silence -Wunused-private-field. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163973 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-15 17:08:51 +00:00