Commit Graph

95114 Commits

Author SHA1 Message Date
Hal Finkel
953a78084b Add the PPC fcpsgn instruction
Modern PPC cores support a floating-point copysign instruction, and we can use
this to lower the FCOPYSIGN node (which is created from calls to the libm
copysign function). A couple of extra patterns are necessary because the
operand types of FCOPYSIGN need not agree.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188653 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-19 05:01:02 +00:00
David Blaikie
a9b6979755 llvm-dwarfdump: Do not include address offsets for attributes, only for tags
This reduces the noise in diffs making it more likely that, at least for
LLVM revision-over-revision, diffs will actually yield usable results.

This is consistent with objdump's DWARF dumping behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188650 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-19 03:36:23 +00:00
David Blaikie
2883fd4df4 DebugInfo: don't emit zero-length names for parameters
We check this in many/all other cases, just missed this one it seems.
Perhaps it'd be worth unifying this so we never emit zero-length
DW_AT_names.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188649 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-19 03:34:03 +00:00
Peter Collingbourne
353149ea2f Remove SpecialCaseList::findCategory.
It turned out that I didn't need this for DFSan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188646 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-19 00:24:20 +00:00
Tim Northover
57cf3500a3 ARM: make sure we keep inline asm operands tied.
When patching inlineasm nodes to use GPRPair for 64-bit values, we
were dropping the information that two operands were tied, which
effectively broke the live-interval of vregs affected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188643 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-18 18:06:03 +00:00
Elena Demikhovsky
3491d67d3a AVX-512: Added VMOVD, VMOVQ, VMOVSS, VMOVSD instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188637 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-18 13:08:57 +00:00
Craig Topper
ff79bc6e18 Make more of the lowering helpers static. Also use MVT instead of EVT in a couple places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188629 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-18 08:53:01 +00:00
Dmitri Gribenko
70f6b36c30 docs: command guide: cleanups, no text changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188627 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-18 08:32:32 +00:00
Dmitri Gribenko
1edd1a336a Remove unused stdio.h includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188626 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-18 08:29:51 +00:00
NAKAMURA Takumi
8d4021c831 Makefile.rules: Avoid -fomit-frame-pointer also on cygwin due to PR14646.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188620 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-18 03:38:40 +00:00
NAKAMURA Takumi
a75cda09c4 Makefile.rules: Simplify nested if(s) on OmitFramePointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188619 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-18 02:46:21 +00:00
Chandler Carruth
8525fad82c Port the detection of zlib from the main autoconf system to the sample
project's autoconf. This is the last of the missing optional checks used
by libSupport that seemed to be missing from the sample project, but
I could easily have missed some as this was done by inspection when
Craig asked me to add the terminfo support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188618 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-18 01:55:15 +00:00
Chandler Carruth
8e9fde1c5f Add support for linking librt and using clock_gettime to the sample
autoconf setup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188617 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-18 01:46:34 +00:00
Chandler Carruth
b5d5797426 Update the sample project autoconf setup to include support for
detecting terminfo. Requested by Craig Topper, and probably should be
done much more systematically.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188616 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-18 01:43:57 +00:00
Chandler Carruth
d485e7bd76 Go through the really awkward dance required to delete the memory
allocated by setupterm. Without this, some folks are seeing leaked
memory whenever this routine is called more than once. Thanks to Craig
Topper for the report.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188615 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-18 01:20:32 +00:00
Hal Finkel
19046ec19c Fix SCEVExpander creating distinct duplicate PHI entries
This fixes SCEVExpander so that it does not create multiple distinct induction
variables for duplicate PHI entries. Specifically, given some code like this:

do.body6:                                         ; preds = %do.body6, %do.body6, %if.then5
  %end.0 = phi i8* [ undef, %if.then5 ], [ %incdec.ptr, %do.body6 ], [ %incdec.ptr, %do.body6 ]
...

Note that it is legal to have multiple entries for a basic block so long as the
associated value is the same. So the above input is okay, but expanding an
AddRec in this loop could produce code like this:

do.body6:                                         ; preds = %do.body6, %do.body6, %if.then5
  %indvar = phi i64 [ %indvar.next, %do.body6 ], [ %indvar.next1, %do.body6 ], [ 0, %if.then5 ]
  %end.0 = phi i8* [ undef, %if.then5 ], [ %incdec.ptr, %do.body6 ], [ %incdec.ptr, %do.body6 ]
...
  %indvar.next = add i64 %indvar, 1
  %indvar.next1 = add i64 %indvar, 1

And this is not legal because there are two PHI entries for %do.body6 each with
a distinct value.

Unfortunately, I don't have an in-tree test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188614 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-18 00:16:23 +00:00
Juergen Ributzka
68af19cbb1 The vbroadcastsi256 intrinsic does not exactly resemble the GCC
builtin. The GCC builtin expects the arguments to be passed by val,
whereas the LLVM intrinsic expects a pointer instead.

This is related to PR 16581 and rdar:14747994.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188608 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-17 16:38:37 +00:00
Joerg Sonnenberger
a915b410df Recognize NetBSD's terminfo implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188606 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-17 11:06:00 +00:00
Joerg Sonnenberger
190673610f PR 16899: Do not modify the basic block using the iterator, but keep the
next value. This avoids crashes due to invalidation.

Patch by Joey Gouly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188605 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-17 11:04:47 +00:00
Tom Stellard
913da2b7b3 R600: Fix possible use of an uninitialized variable
Spotted by Nick Lewycky!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188599 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-17 00:06:51 +00:00
Tom Stellard
3cae823f69 R600: Expand vector FRINT ops
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188598 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 23:51:33 +00:00
Tom Stellard
84c0bd9803 R600: Expand vector FFLOOR ops
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188597 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 23:51:29 +00:00
Tom Stellard
0991c314d7 R600: Expand vector float operations for both SI and R600
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188596 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 23:51:24 +00:00
Jim Grosbach
62c7749437 ARM: Properly constrain comparison fastisel register classes.
Ongoing 'make the verifier happy' improvements to ARM fast-isel.

rdar://12594152

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188595 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 23:37:40 +00:00
Jim Grosbach
785bd59852 ARM: Fast-isel register class constrain for extends.
Properly constrain the operand register class for instructions used
in [sz]ext expansion. Update more tests to use the verifier now that
we're getting the register classes correct.

rdar://12594152

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188594 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 23:37:36 +00:00
Jim Grosbach
b49860ef03 ARM: Fix more fast-isel verifier failures.
Teach the generic instruction selection helper functions to constrain
the register classes of their input operands. For non-physical register
references, the generic code needs to be careful not to mess that up
when replacing references to result registers. As the comment indicates
for MachineRegisterInfo::replaceRegWith(), it's important to call
constrainRegClass() first.

rdar://12594152

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188593 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 23:37:31 +00:00
Jim Grosbach
0673379712 ARM: Clean up fast-isel machine verifier errors.
Lots of machine verifier errors result from using a plain GPR regclass
for incoming argument copies. A more restrictive rGPR class is more
appropriate since it more accurately represents what's happening, plus
it lines up better with isel later on so the verifier is happier.
Reduces the number of ARM fast-isel tests not running with the verifier
enabled by over half.

rdar://12594152

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188592 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 23:37:23 +00:00
Daniel Dunbar
70360e6762 [lit] Rewrite TODO list, and elaborate on some things.
- If anyone is interested in lit's feature set, I'd appreciate any comments on
   the elaborated items.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188590 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 23:30:23 +00:00
Daniel Dunbar
1323006423 [typo] An LLVM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188589 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 23:30:19 +00:00
Reed Kotler
80f6061082 Fix a subtle difference between running clang vs llc for mips16.
This regards how mips16 is viewed. It's not really a target type but
there has always been a target for it in the td files. It's more properly
-mcpu=mips32 -mattr=+mips16 . This is how clang treats it but we have
always had the -mcpu=mips16 which I probably should delete now but it will
require updating all the .ll test cases for mips16. In this case it changed
how we decide if we have a count bits instruction and whether instruction
lowering should then expand ctlz. Now that we have dual mode compilation,
-mattr=+mips16 really just indicates the inital processor mode that
we are compiling for. (It is also possible to have -mcpu=64 -mattr=+mips16
but as far as I know, nobody has even built such a processor, though there
is an architecture manual for this).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188586 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 23:05:18 +00:00
Reid Kleckner
0c1c5b0aaa Actually, use GNU inline asm for cpuid with clang
Clang doesn't support the MSVC __cpuid intrinsic yet, and fixing that is
blocked on some fairly complicated issues.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188584 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 22:42:42 +00:00
Chris Lattner
586ea17be9 I'm told that != is not ==
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188583 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 22:29:44 +00:00
Chris Lattner
b282085924 allow != to compare PointerUnion, we already support ==.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188582 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 22:09:02 +00:00
Benjamin Kramer
d861b90fe2 Add difference_type to ImmutableMap/Set iterators so they have a complete set of typedefs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188579 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 21:55:56 +00:00
David Blaikie
692062f180 DebugInfo: Allow the addition of other (such as static data) members to a record type after construction
Plus a type cleanup & minor fix to enumerate members of declarations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188577 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 20:42:14 +00:00
Bill Schmidt
9bb6c81683 [PowerPC] Preparatory refactoring for making prologue and epilogue
safe on PPC32 SVR4 ABI

[Patch and following text by Mark Minich; committing on his behalf.]

There are FIXME's in PowerPC/PPCFrameLowering.cpp, method
PPCFrameLowering::emitPrologue() related to "negative offsets of R1"
on PPC32 SVR4. They're true, but the real issue is that on PPC32 SVR4
(and any ABI without a Red Zone), no spills may be made until after
the stackframe is claimed, which also includes the LR spill which is
at a positive offset. The same problem exists in emitEpilogue(),
though there's no FIXME for it. I intend to fix this issue, making
LLVM-compiled code finally safe for use on SVR4/EABI/e500 32-bit
platforms (including in particular, OS-free embedded systems & kernel
code, where interrupts may share the same stack as user code).

In preparation for making these changes, to make the diffs for the
functional changes less cluttered, I am providing the non-functional
refactorings in two stages:

Stage 1 does some minor fluffy refactorings to pull multiple method
calls up into a single bool, creating named bools for repeated uses of
obscure logic, moving some code up earlier because either stage 2 or
my final version will require it earlier, and rewording/adding some
comments. My stage 1 changes can be characterized as primarily fluffy
cleanup, the purpose of which may be unclear until the stage 2 or
final changes are made.

My stage 2 refactorings combine the separate PPC32 & PPC64 logic,
which is currently performed by largely duplicate code, into a single
flow, with the differences handled by a group of constants initialized
early in the methods.

This submission is for my stage 1 changes. There should be no
functional changes whatsoever; this is a pure refactoring.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188573 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 20:05:04 +00:00
Richard Mitton
b0f7929885 Fixed RuntimeDyldELF absolute relocations.
If an ELF relocation is pointed at an absolute address, it will have a symbol ID of zero.
RuntimeDyldELF::processRelocationRef was not previously handling this case, and was instead trying to handle it as a section-relative fixup.

I think this is the right fix here, but my elf-fu is poor on some of the more exotic platforms, so I'd appreciate it if anyone with greater knowledge could verify this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188572 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 18:54:26 +00:00
Richard Mitton
8ae1efeb07 Test commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188568 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 18:09:06 +00:00
Daniel Dunbar
07d4e2813c [tests] Another attempt to workaround broken misched-copy.s test on some buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188567 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 18:01:18 +00:00
Aaron Ballman
5e485a5281 Switching to using a helper function instead of manually converting the string to UTF-8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188566 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 17:53:28 +00:00
Aaron Ballman
0009850524 Removing unused functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188565 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 17:33:57 +00:00
Stephen Lin
6d3aa547a5 FileCheck: Fix stray quote in CHECK-LABEL error message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188564 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 17:29:01 +00:00
Jim Grosbach
bff3c587f6 InstCombine: Use isAllOnesValue() instead of explicit -1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188563 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 17:03:36 +00:00
Michel Danzer
b89f197713 R600/SI: Add pattern for xor of i1
Fixes two recent piglit regressions with radeonsi.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188559 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 16:19:31 +00:00
Michel Danzer
ebd4eec538 R600/SI: Fix broken encoding of DS_WRITE_B32
The logic in SIInsertWaits::getHwCounts() only really made sense for SMRD
instructions, and trying to shoehorn it into handling DS_WRITE_B32 caused
it to corrupt the encoding of that by clobbering the first operand with
the second one.

Undo that damage and only apply the SMRD logic to that.

Fixes some derivates related piglit regressions with radeonsi.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188558 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 16:19:24 +00:00
Daniel Sanders
ea549a847d Reverted test commit (r188556)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188557 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 15:27:12 +00:00
Daniel Sanders
1dbfa36ba1 Test commit. Just a blank line
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188556 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 15:26:36 +00:00
Benjamin Kramer
d0cad1f3ed R600: Allocate memoperand in the MachienFunction so it doesn't leak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188555 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 14:48:09 +00:00
Aaron Ballman
2328cf155a Updating function comments; no functional changes intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188554 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 14:33:07 +00:00
Benjamin Kramer
671aea08f8 When initializing the PIC global base register on ARM/ELF add pc to fix the address.
This unbreaks PIC with fast isel on ELF targets (PR16717). The output matches
what GCC and SDag do for PIC but may not cover all of the many flavors of PIC
that exist.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188551 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-16 12:52:08 +00:00