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29 Commits

Author SHA1 Message Date
Elena Demikhovsky
a56ae89d22 AVX-512: added intrinsic vcvtpd2ps (with rounding mode and without) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198593 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-06 08:45:54 +00:00
Elena Demikhovsky
3a880de6e6 AVX-512: Added more intrinsics for convert and min/max. 
Removed vzeroupper from AVX-512 mode - our optimization gude does not recommend to insert vzeroupper at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198557 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-05 10:46:09 +00:00
Elena Demikhovsky
3062a311ac AVX-512: Added intrinsics for vcvt, vcvtt, vrndscale, vcmp 
Printing rounding control.
Enncoding for EVEX_RC (rounding control).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198277 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-01-01 15:12:34 +00:00
Elena Demikhovsky
8a8581ca4b AVX-512: changed intrinsics for mask operations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196918 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-10 13:53:10 +00:00
Elena Demikhovsky
89458ced87 AVX-512: Changed intrinsics of VPCONFLICT to match GCC builtin form 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196914 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-10 11:58:35 +00:00
Cameron McInally
febc28b529 Update AVX512 vector blend intrinsic names. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196581 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-06 13:35:35 +00:00
Cameron McInally
0e6ec124d5 Add an intrinsic for the SSE2 PAUSE instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195697 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-11-26 00:20:43 +00:00
Cameron McInally
28e12e9f02 Add AVX512 unmasked FMA intrinsics and support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194824 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-11-15 17:01:14 +00:00
Cameron McInally
2e58f1d4cf Add support for AVX512 masked vector blend intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194006 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-11-04 19:14:56 +00:00
Elena Demikhovsky
6a907f8c7d AVX-512: fixed a typo in builtin name 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193988 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-11-04 11:48:23 +00:00
Elena Demikhovsky
633f98bdfa AVX-512: added VPCONFLICT instruction and intrinsics, 
added EVEX_KZ to tablegen


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193959 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-11-03 13:46:31 +00:00
Cameron McInally
424f19732e Add AVX512 unmasked integer broadcast intrinsics and support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193748 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-31 13:56:31 +00:00
Cameron McInally
95efb037f7 Refactor the AVX512 intrinsics. Cluster the intrinsics into the appropriate vector extension class within the .td file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193690 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-30 15:19:10 +00:00
Elena Demikhovsky
62d66cbec5 AVX-512: PMIN/PMAX intrinsics and patterns 
Patch by Cameron McInally <cameron.mcinally@nyu.edu>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193497 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-27 08:18:37 +00:00
Elena Demikhovsky
62ef058116 AVX-512: added VCVTPH2PS, VCVTPS2PH with intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193312 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-24 07:16:35 +00:00
Craig Topper
390ff499f0 Remove x86_sse42_crc32_64_8 intrinsic. It has no functional difference from x86_sse42_crc32_32_8 and was not mapped to a clang builtin. I'm not even sure why this form of the instruction is even called out explicitly in the docs. Also add AutoUpgrade support to convert it into the other intrinsic with appropriate trunc and zext. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192672 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-15 05:20:47 +00:00
Elena Demikhovsky
50dc2ad46c AVX-512: Added VRCP28 and VRSQRT28 instructions and intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192283 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-09 08:16:14 +00:00
Elena Demikhovsky
714319a169 AVX-512: added scalar convert instructions and intrinsics. 
Fixed load folding in VPERM2I instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192063 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-06 13:11:09 +00:00
Craig Topper
22abf7e17f Remove unneeded TBM intrinsics. The arithmetic/logical operation patterns are sufficient. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192039 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-05 19:22:59 +00:00
Craig Topper
fafe4bbd6c Add patterns for selecting TBM instructions from logical operations. Patch from Yunzhong Gao. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191871 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-03 04:16:45 +00:00
Yunzhong Gao
685707c28e Adding intrinsics to the llvm backend for TBM instruction set. 
Phabricator code review is located here: http://llvm-reviews.chandlerc.com/D1750



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191539 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-27 18:38:42 +00:00
Ben Langmuir
215585920f Add llvm.x86.* intrinsics for Intel SHA Extensions 
Add llvm.x86.* intrinsics for all of the Intel SHA Extensions instructions, as
well as tests. Also remove mayLoad and hasSideEffects, which can be inferred
from the instruction patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190864 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-17 13:44:39 +00:00
Craig Topper
2898b3c28d Make a more clear AVX-512 section header that matches similar in the file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190843 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-17 03:34:09 +00:00
Elena Demikhovsky
c892bd6a74 AVX-512: compiler intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188654 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-19 06:55:01 +00:00
Juergen Ributzka
68af19cbb1 The vbroadcastsi256 intrinsic does not exactly resemble the GCC 
builtin. The GCC builtin expects the arguments to be passed by val,
whereas the LLVM intrinsic expects a pointer instead.

This is related to PR 16581 and rdar:14747994.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188608 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-17 16:38:37 +00:00
Elena Demikhovsky
13e6e9171f AVX-512 set: added mask operations, lowering BUILD_VECTOR for i1 vector types. 
Added intrinsics and tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187717 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-08-05 08:52:21 +00:00
Michael Liao
c26392aa5d Add support of RDSEED defined in AVX2 extension 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178314 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-28 23:41:26 +00:00
Michael Liao
f8fd883fd3 Add XTEST codegen support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178083 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-03-26 22:47:01 +00:00
Chandler Carruth
0b8c9a80f2 Move all of the header files which are involved in modelling the LLVM IR 
into their new header subdirectory: include/llvm/IR. This matches the
directory structure of lib, and begins to correct a long standing point
of file layout clutter in LLVM.

There are still more header files to move here, but I wanted to handle
them in separate commits to make tracking what files make sense at each
layer easier.

The only really questionable files here are the target intrinsic
tablegen files. But that's a battle I'd rather not fight today.

I've updated both CMake and Makefile build systems (I think, and my
tests think, but I may have missed something).

I've also re-sorted the includes throughout the project. I'll be
committing updates to Clang, DragonEgg, and Polly momentarily.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-01-02 11:36:10 +00:00