Commit Graph

105328 Commits

Author SHA1 Message Date
Adam Nemet
998743e185 [X86] AVX512: Allow writemask argument in vpermt* intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212223 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 21:26:01 +00:00
Adam Nemet
31d2114a34 [X86] AVX512: Generate Pat<>'s for the vpermt2* intrinsics via multiclass
This new multiclass, avx512_perm_table_3src derives from the current one and
provides the Pat<>.  The next patch will add another Pat<> that uses the
writemask.

Note that I dropped the type annotation from the intrinsic call, i.e.: (v16f32
VR512:$src1) -> R512:$src1.  I think that this should be fine (at least many
intrinsic calls don't provide them) and it greatly reduces the number of
template arguments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212222 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 21:25:58 +00:00
Adam Nemet
df5d431084 [X86] AVX512: Add writemask variants for vperm*2*
This includes assembler and codegen support (see the new tests in
avx512-encodings.s and avx512-shuffle.ll).

<rdar://problem/17492620>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212221 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 21:25:54 +00:00
Tom Stellard
fad0de390b R600: Add a comment that llvm.AMDGPU.trunc is a legacy intrinsic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212218 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 20:53:57 +00:00
Tom Stellard
4a70647269 R600/SI: Use a ComplexPattern for ADDR64 addressing of MUBUF loads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212217 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 20:53:56 +00:00
Tom Stellard
1378871b1a R600: Promote i64 loads to v2i32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212216 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 20:53:54 +00:00
Tom Stellard
b48c8c49d5 R600/SI: Adjsut SGPR live ranges before register allocation
SGPRs are written by instructions that sometimes will ignore control flow,
which means if you have code like:

if (VGPR0) {
  SGPR0 = S_MOV_B32 0
} else {
  SGPR0 = S_MOV_B32 1
}

The value of SGPR0 will 1 no matter what the condition is.

In order to deal with this situation correctly, we need to view the
program as if it were a single basic block when we calculate the
live ranges for the SGPRs.  They way we actually update the live
range is by iterating over all of the segments in each LiveRange
object and setting the end of each segment equal to the start of
the next segment.  So a live range like:

[3888r,9312r:0)[10032B,10384B:0)  0@3888r

will become:

[3888r,10032B:0)[10032B,10384B:0)  0@3888r

This change will allow us to use SALU instructions within branches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212215 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 20:53:48 +00:00
Tom Stellard
a75d388f18 R600/SI: Add verifier check for immediates in register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212214 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 20:53:44 +00:00
Alexey Samsonov
7950cae7b9 Remove non-static field initializer to appease MSVC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212212 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 20:25:42 +00:00
Rafael Espindola
773d63e2ad Fix configure+make build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212210 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 20:05:48 +00:00
Rafael Espindola
cca08872b0 Move CFG building code to a new lib/MC/MCAnalysis library.
The new library is 150KB on a Release+Asserts build, so it is quiet a bit of
code that regular users of MC don't need to link with now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212209 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 19:49:34 +00:00
David Blaikie
a42211335a DebugInfo: Ensure that all debug location scope chains from instructions within a function, lead to the function itself.
Originally committed in r211723, reverted in r211724 due to failure
cases found and fixed (ArgumentPromotion: r211872, Inlining: r212065),
committed again in r212085 and reverted again in r212089 after fixing
some other cases, such as debug info subprogram lists not keeping track
of the function they represent (r212128) and then short-circuiting
things like LiveDebugVariables that build LexicalScopes for functions
that might not have full debug info.

And again, I believe the invariant actually holds for some reasonable
amount of code (but I'll keep an eye on the buildbots and see what
happens... ).

Original commit message:

PR20038: DebugInfo: Inlined call sites where the caller has debug info
but the call itself has no debug location.

This situation does bad things when inlined, so I've fixed Clang not to
produce inlinable call sites without locations when the caller has debug
info (in the one case where I could find that this occurred). This
updates the PR20038 test case to be what clang now produces, and readds
the assertion that had to be removed due to this bug.

I've also beefed up the debug info verifier to help diagnose these
issues in the future, and I hope to add checks to the inliner to just
assert-fail if it encounters this situation. If, in the future, we
decide we have to cope with this situation, the right thing to do is
probably to just remove all the DebugLocs from the inlined instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212205 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 18:32:05 +00:00
Quentin Colombet
5599fde88e [RegAllocGreedy] Provide a subtarget hook to disable the local reassignment
heuristic.
By default, no functionality change.
This is a follow-up of r212099.

This hook provides a finer grain to control the optimization.

<rdar://problem/17444599>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212204 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 18:32:04 +00:00
David Blaikie
f9b6d0373a Don't try to construct debug LexicalScopes hierarchy for functions that do not have top level debug information.
If a function isn't actually in a CU's subprogram list in the debug info
metadata, ignore all the DebugLocs and don't try to build scopes, track
variables, etc.

While this is possibly a minor optimization, it's also a correctness fix
for an incoming patch that will add assertions to LexicalScopes and the
debug info verifier to ensure that all scope chains lead to debug info
for the current function.

Fix up a few test cases that had broken/incomplete debug info that could
violate this constraint.

Add a test case where this occurs by design (inlining a
debug-info-having function in an attribute nodebug function - we want
this to work because /if/ the nodebug function is then inlined into a
debug-info-having function, it should be fine (and will work fine - we
just stitch the scopes up as usual), but should the inlining not happen
we need to not assert fail either).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212203 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 18:31:35 +00:00
David Blaikie
8446d2db2a Constify the Function pointers in the result of makeSubprogramMap
These don't need to be mutable and callers being added soon in CodeGen
won't have access to non-const Module&.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212202 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 18:30:05 +00:00
Duncan P. N. Exon Smith
9b4509a759 AArch64: Re-enable AArch64AddressTypePromotion
This reverts commits r212189 and r212190.

While this pass was accidentally disabled (until r212073), r205437
slipped in a use of `auto` that should have been `auto&`.

This fixes PR20188.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212201 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 18:17:40 +00:00
Duncan P. N. Exon Smith
a95253080b AArch64: Remove unnecessary parens
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212199 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 18:14:03 +00:00
Matt Arsenault
b1fb2ba24d R600: Fix crashes when an illegal type load or store is not handled.
I don't think anything hits this now, but will be exposed in future
patches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212197 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 17:44:53 +00:00
Puyan Lotfi
411b036f8b Just adding a getHalfTy method to IRBuilder for completeness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212195 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 17:33:00 +00:00
Duncan P. N. Exon Smith
8ec4365621 AArch64: Merge isa with dyn_cast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212194 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 17:26:39 +00:00
Duncan P. N. Exon Smith
0c4d7a1ba5 XFAIL the test to go with r202189
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212190 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 17:07:03 +00:00
Duncan P. N. Exon Smith
2a56dd87c8 AArch64: Temporarily disable AArch64AddressTypePromotion
Temporarily disable AArch64AddressTypePromotion, which was effectively
re-enabled in r212073 and r212075, while I look into PR20188.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212189 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 17:03:16 +00:00
Alexey Samsonov
1b6333c47e [ASan] Print exact source location of global variables in error reports.
See https://code.google.com/p/address-sanitizer/issues/detail?id=299 for the
original feature request.

Introduce llvm.asan.globals metadata, which Clang (or any other frontend)
may use to report extra information about global variables to ASan
instrumentation pass in the backend. This metadata replaces
llvm.asan.dynamically_initialized_globals that was used to detect init-order
bugs. llvm.asan.globals contains the following data for each global:
  1) source location (file/line/column info);
  2) whether it is dynamically initialized;
  3) whether it is blacklisted (shouldn't be instrumented).

Source location data is then emitted in the binary and can be picked up
by ASan runtime in case it needs to print error report involving some global.
For example:

  0x... is located 4 bytes to the right of global variable 'C::array' defined in '/path/to/file:17:8' (0x...) of size 40

These source locations are printed even if the binary doesn't have any
debug info.

This is an ABI-breaking change. ASan initialization is renamed to
__asan_init_v4(). Pre-built libraries compiled with older Clang will not work
with the fresh runtime.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212188 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 16:54:41 +00:00
Chad Rosier
5ee1c8f6f0 Revert "Revert "MachineScheduler: better book-keeping for asserts.""
This reverts commit r212109, which reverted r212088.

However, disable the assert as it's not necessary for correctness.  There are
several corner cases that the assert needed to handle better for in-order
scheduling, but none of them are incorrect scheduler behavior. The assert is
mainly there to collect good unit tests like this and ensure that the
target-independent scheduler is working as expected with the various machine
models.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212187 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 16:46:08 +00:00
Sylvestre Ledru
6508430c76 Also document the 'arc commit' commands in the 'Committing a change' section of the Phabricator doc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212184 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 15:25:25 +00:00
Benjamin Kramer
11be760757 X86: When combining shuffles just remove shuffles that are completely redundant.
CombineTo doesn't allow replacing a node with itself so this would crash if the
combined shuffle is the same as the input shuffle.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212181 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 15:09:44 +00:00
Axel Naumann
a3af27aa0b Undefine R2, R4, R6 after use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212179 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 14:40:35 +00:00
Elena Demikhovsky
0780b6db5d AVX-512: dec/inc instructions are slow on KNL
After Alexey Volkov, I'm adding the same property for KNL, that prefers ADD/SUB instead of INC/DEC.
Added a test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212178 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 14:11:05 +00:00
Matt Arsenault
f5ec1bd705 Move operator[] to DomTreeNodeBase
The comment in base even refers to it, but it was only defined
in the subclass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212169 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 06:50:48 +00:00
Matt Arsenault
d0fb0f421f Fix missing const
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212168 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 06:45:26 +00:00
David Majnemer
3e01ae9f8f InstCombine: Optimize x/INT_MIN to x==INT_MIN
The result of x/INT_MIN is either 0 or 1, we can just use an icmp
instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212167 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 06:42:13 +00:00
Chandler Carruth
5f8c844dc8 [cleanup] Hoist an if-else chain on ISD opcodes (really designed for
switches) into a switch, and sink them into a dispatch function that can
return the result rather than awkward variable setting with breaks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212166 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 06:23:34 +00:00
David Majnemer
35f5448c52 InstCombine: Add a vector variant test for PR20186
No functional change, just adding more test coverage that was meant to
go in with r212164.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212165 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 06:14:13 +00:00
David Majnemer
5f5939c14c InstCombine: Don't turn -(x/INT_MIN) -> x/INT_MIN
It is not safe to negate the smallest signed integer, doing so yields
the same number back.

This fixes PR20186.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212164 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 06:07:09 +00:00
Owen Anderson
90fdedc064 Add range for-loop iterator adapter for cases in SwitchInst.
Patch by Marcello Maggioni, reviewed by Reid Kleckner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212163 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 05:32:13 +00:00
Saleem Abdulrasool
8f9108459e aarch64: support target-specific .req assembler directive
Based on the support for .req on ARM. The aarch64 variant has to keep track if
the alias register was a vector register (v0-31) or a general purpose or
VFP/Advanced SIMD ([bhsdq]0-31) register.

Patch by Janne Grunau!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212161 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 04:50:23 +00:00
Chandler Carruth
b80dce061b [cleanup] Remove dead 'break;' statements that I meant to nuke in
r212158 but missed.

Thanks to Craig for spotting the goof!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212159 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 04:39:34 +00:00
Chandler Carruth
5c65424138 [cleanup] Hoist the promotion dispatch logic into the promote function
so that we can use return to express it more cleanly and avoid so many
nested switch statements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212158 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 03:07:15 +00:00
Chandler Carruth
42caaf8e17 [cleanup] Nuke the 'VectorOp' bit of the promote method names.
This doesn't add any information for methods in the VectorLegalizer
class that clearly take SDAG operations to legalize.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212157 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 03:07:11 +00:00
Chandler Carruth
75af7b361a [x86] Clean up and modernize the doxygen and API comments for the vector
operation legalization code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212155 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 02:16:57 +00:00
Eric Christopher
290a59d9ec Break out subtarget initialization that dependent variables need into
a separate function and clean up calling convention for helper function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212153 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 01:14:43 +00:00
Eric Christopher
110493f99d Unify these two lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212152 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 01:02:28 +00:00
Eric Christopher
b40edb9a1b Move MipsJITInfo to the subtarget rather than the target machine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212151 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 00:54:12 +00:00
Eric Christopher
d5c4b1a558 Remove unnecessary include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212150 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 00:54:10 +00:00
Eric Christopher
fe1686d29a Remove the cached InstrItineraryData on the TargetMachine, it's unnecessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212149 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 00:54:07 +00:00
Reid Kleckner
6dfd006fcf Remove the recommendation against using std::function
Clang-cl supports MSVC-style RTTI now, and we can even compile
typeid(...) with /GR-.  Just don't instantiate std::function with a
polymorphic type, or bad things will happen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212148 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 00:42:07 +00:00
Eric Christopher
65e0e46118 Move the subtarget dependent features from XCoreTargetMachine
down to the subtarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212147 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 00:10:09 +00:00
Eric Christopher
9223ec2cd9 Make XCoreSelectionDAGInfo take a DataLayout since it only needs
that information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212146 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-02 00:10:05 +00:00
Kevin Enderby
62399746cc Also run clang-format on llvm-nm.cpp to tidy things up. No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212143 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-01 22:44:51 +00:00
Kevin Enderby
9c23bd0943 Run clang-format on llvm-size.cpp to tidy things up. No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212141 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-01 22:26:31 +00:00