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9993499057
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19401 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
9993499057 Move code around! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138520 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 23:18:09 +00:00
Bruno Cardoso Lopes
de79231468 Organize UNPCK* patterns, also add remaining for AVX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138519 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 23:18:06 +00:00
Bruno Cardoso Lopes
4cf4778ac4 Move remaining MOVDDUP patterns close to MOVDDUP defintion and duplicate 
the missing ones for AVX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138518 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 23:18:04 +00:00
Bruno Cardoso Lopes
4724f25ed6 Organize and tidy up MOVDDUP section. Also update comments! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138517 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 23:18:02 +00:00
Bruno Cardoso Lopes
6140294363 Move MOVHLPS patterns close to MOVHLPS definition, and duplicate the 
pattern for 128-bit AVX mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138516 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 23:17:59 +00:00
Bruno Cardoso Lopes
954d5eabb7 Move all PSHUF* patterns close to the PSHUF* definitions. Also be 
explicit about which subtarget they refer to, and add AVX versions of
the ones we currently don't. Remove old and now wrong comments!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138515 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 23:17:57 +00:00
Bruno Cardoso Lopes
af002d8405 Move all SHUFP* patterns close to the SHUFP* definitions. Also be 
explicit about which subtarget they refer to, and add AVX versions of
the ones we currently don't. Make the mask check more strict, to be
clear it won't be used to match to 256-bit versions!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138514 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 23:17:55 +00:00
Owen Anderson
f44082091c Perform more thorough checking of t2IT mask parameters, which fixes all remaining crashers when disassembling the entire 16-bit instruction space. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138507 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 22:40:22 +00:00
Eli Friedman
f8f90f0174 Hook up 64-bit atomic load/store on x86-32. I plan to write more efficient implementations eventually. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138505 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 22:33:28 +00:00
Jim Grosbach
b9d3ff8729 ARM asm backend initialize isThumbMode based on target triple. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138501 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 22:27:35 +00:00
Jim Grosbach
4d23e99d2a Thumb .n mnemonic qualifiers can be ignored for now. 
We'll need to pay attention to them when we start getting more serious about
the details of parsing thumb2 assembly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138500 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 22:19:48 +00:00
Jim Grosbach
f69c804036 Thumb parsing and encoding for SUB (SP minu immediate). 
Fix FiXME in test file. Remove FIXME for SUB (SP minus register) since that
form is Thumb2 only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138494 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 21:42:27 +00:00
Owen Anderson
12a1e3bbcb Be careful not to walk off the end of the operand info list while updating VFP predicates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138492 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 21:35:46 +00:00
Jim Grosbach
72f39f8436 Thumb parsing and encoding support for ADD SP instructions. 
Fix the test FIXME and add parsing support for the ADD (SP plus immediate)
and ADD (SP plus register) instruction forms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138488 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 21:22:15 +00:00
Eli Friedman
4317fe1fc6 Fix whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138487 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 21:17:30 +00:00
Eli Friedman
327236cd6c Basic x86 code generation for atomic load and store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138478 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 20:50:09 +00:00
Jim Grosbach
df9ce6bbc5 When printing Thumb1 NOP ('mov r8, r8'), make sure to print the predicate. 
rdar://10015134

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138467 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 20:06:14 +00:00
Bruno Cardoso Lopes
356e988110 Mark VZEROALL as clobbering all YMM registers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138461 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 18:48:33 +00:00
Jim Grosbach
f95aaf951b Add missing explicit writeback operand to tSTMIA_UPD. 
rdar://10014745

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138457 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 18:19:42 +00:00
Evan Cheng
3e74d6fdd2 Move TargetRegistry and TargetSelect from Target to Support where they belong. 
These are strictly utilities for registering targets and components.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138450 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 18:08:43 +00:00
Jim Grosbach
c7e0bb2325 Thumb add SP assembly syntax fix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138448 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 18:04:27 +00:00
Jim Grosbach
5b81584f74 Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode. 
Add the predicate operand to the instructions. Update the back end
accordingly where the instructions are used. Restrict the SP operands
to actually only be SP, as otherwise these break assembly parsing for the
normal instruction variants.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138445 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 17:46:13 +00:00
Owen Anderson
e234d02204 Be stricter in enforcing IT instruction predicate values, so that we don't end up trying to print out an illegal predicate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138443 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 17:21:43 +00:00
Richard Osborne
8f9c5cca4f Add Uses=[SP] to call instructions. This fixes a miscompilation with a 
variable sized alloca.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138433 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 13:32:43 +00:00
Craig Topper
13894fa135 Break 256-bit vector int add/sub/mul into two 128-bit operations to avoid costly scalarization. Fixes PR10711. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138427 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 06:14:18 +00:00
Bruno Cardoso Lopes
d8b7dd5252 Fix a nasty bug where a v4i64 was being wrong emitted with 32-bit 
permutations. Also tidy up some patterns and make them close to their
instruction definition!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138392 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 22:06:37 +00:00
Jim Grosbach
5aa29a0cff Move ARM frame-unwinding EHABI handling a touch earlier. 
It should go before AsmPrinter MC pseudo expansion since it's based on
MachineInstr, not MCInst. Otherwise any frame related pseudo instructions
may be missed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138386 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 21:32:34 +00:00
Jim Grosbach
d04f6a581c [SU]XT[BH] are only available on ARMv6 and up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138373 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 20:53:08 +00:00
Evan Cheng
7801136b95 Some refactoring so TargetRegistry.h no longer has to include any files 
from MC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138367 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 20:15:21 +00:00
Jim Grosbach
ec8b866434 Thumb parsing and encoding for SVC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138360 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 19:49:10 +00:00
Nick Lewycky
726ebd6ff3 PerformSubCombine to work on integers larger than i128. Fixes a crasher. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138354 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 19:01:24 +00:00
Jim Grosbach
803b1aa8ef Thumb parsing and encoding for tSTRspi. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138348 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 18:39:41 +00:00
Jim Grosbach
1e84f19337 Thumb parsing and encoding for STM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138345 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 18:15:37 +00:00
Jim Grosbach
aa875f8c6f Factor low reg checking into a helper function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138344 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 18:13:04 +00:00
Owen Anderson
82265a2c72 Fix decoding of Thumb2 prefetch instructions, which account for all the remaining Thumb2 decoding failures found by randomized testing so far. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138341 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 17:51:38 +00:00
Owen Anderson
6153a036f5 Fix Thumb2 decoding of CPS instructions to mirror ARM decoding of the same instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138339 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 17:45:18 +00:00
Jim Grosbach
cefe4c9c48 Clean up Thumb load/store multiple definitions. 
There is no non-writeback store multiple instruction in Thumb1, so
don't define one. As a result load multiple is the only instantiation of
the multiclass, so refactor that away entirely.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138338 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 17:41:15 +00:00
Owen Anderson
e732cb0043 Fix two more instances of mis-matched operand names breaking disassembly. Found by randomized testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138337 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 17:37:32 +00:00
Craig Topper
a534780da0 Add support for breaking 256-bit v16i16 and v32i8 VSETCC into two 128-bit ones, avoiding sclarization. Add vex form of pcmpeqq and pcmpgtq. Fixes more cases for PR10712. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138321 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 04:36:33 +00:00
Bruno Cardoso Lopes
3bde6fe0df Introduce a pass to insert vzeroupper instructions to avoid AVX to 
SSE transition penalty. The pass is enabled through the "x86-use-vzeroupper"
llc command line option. This is only the first step (very naive and
conservative one) to sketch out the idea, but proper DFA is coming next
to allow smarter decisions. Comments and ideas now and in further commits
will be very appreciated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138317 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 01:14:17 +00:00
Jim Grosbach
04d55f1905 Thumb parsing and encoding for SBC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138311 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:55:58 +00:00
Jim Grosbach
934755ac04 Thumb parsing and encoding for RSB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138308 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:47:13 +00:00
Owen Anderson
8e1e60b5f8 Reject invalid imod values in t2CPS instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138306 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:44:04 +00:00
Owen Anderson
c6788c83b4 t2SMLAD is a four-register instruction, not a three-register one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138301 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:31:45 +00:00
Owen Anderson
22d35086fe Correct operand naming of t2USAT16 to allow proper decoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138300 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:27:47 +00:00
Jim Grosbach
86b5d2b02d Revert r138278 now that r138289 has fixed the root issue. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138299 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:25:48 +00:00
Owen Anderson
2379fc235f Match operand naming to allow correct decoding of t2LDRSH_POST. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138298 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:22:05 +00:00
Jim Grosbach
6dcafc0d0b Improve error checking for tPUSH and tPOP register lists. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138295 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:17:34 +00:00
Owen Anderson
796c3659c9 Match operand names to provide correct decoding for Thumb2 SMULL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138294 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:16:48 +00:00
Owen Anderson
2c9f83533b Provide a correct decoder hook for Thumb2 shifted registers. Found by randomized testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138292 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:10:16 +00:00