Commit Graph

89283 Commits

Author SHA1 Message Date
Manman Ren
9c5861fdbd Attempt to recover gdb bot after r174445.
Failure: undefined symbol 'Lline_table_start0'.
Root-cause: we use a symbol subtraction to calculate at_stmt_list, but
the line table entries are not dumped in the assembly.
Fix: use zero instead of a symbol subtraction for Compile Unit 0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174479 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-06 00:59:41 +00:00
Eli Bendersky
ba42625074 Fix some formatting & add comments, following Eric's review
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174473 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-06 00:20:38 +00:00
Bill Wendling
64754f4990 Add the target-dependent (string) attributes from the AttrBuilder to the AttributeSet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174467 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 23:48:36 +00:00
Eli Bendersky
7743232775 Add missing file to CMake list
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174465 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 23:37:18 +00:00
Eli Bendersky
61b057a6fd Test for r174446
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174464 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 23:31:48 +00:00
Eli Bendersky
60bdc5b16e Initial support for DWARF CFI parsing and dumping in LLVM
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174463 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 23:30:58 +00:00
Eli Bendersky
5e215f9bfd Be consistent about the field name - AddressSize, not PointerSize. Add
a setter and fix some comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174462 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 23:26:02 +00:00
Bob Wilson
0dfa8a6d06 Preprocess Apple llvmCore headers to reflect NDEBUG setting. <rdar://12568983>
If an Apple llvmCore build is done without assertions, and a client uses
the llvmCore headers with assertions enabled, or vice versa, then things will
break because some of the structure sizes in the API are different.  Use the
unifdef tool to make the headers unconditionally match the way the llvmCore
libraries were built.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174460 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 22:59:42 +00:00
Andrew Trick
2a78bb961a Revert "[Support][ErrorOr] Add support for convertable types."
This reverts commit a33e1fafac.

This unit test crashes on Darwon. It needs to be temporarily reverted
to unblock the test infrastructure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174458 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 22:50:20 +00:00
Bill Wendling
8c74ecfbdd Convert to storing the attribute's internals as enums, integers, and strings.
The stuff we're handing are all enums (Attribute::AttrKind), integers and
strings. Don't convert them to Constants, which is an unnecessary step here. The
rest of the changes are mostly mechanical.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174456 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 22:37:24 +00:00
Eli Bendersky
2a1b60d791 Make sure the correct opcodes are used to SUB and ADD the stack
pointer in function prologs/epilogs. The opcodes should depend on the
data model (LP64 vs. ILP32) rather than the architecture bit-ness.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174446 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 21:53:29 +00:00
Manman Ren
43213cf1ac Dwarf: support for LTO where a single object file can have multiple line tables
We generate one line table for each compilation unit in the object file.
Reviewed by Eric and Kevin.

rdar://problem/13067005


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174445 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 21:52:47 +00:00
Akira Hatanaka
baabdecbb9 [mips] Do not use function CC_MipsN_VarArg unless the function being analyzed
is a vararg function.

The original code was examining flag OutputArg::IsFixed to determine whether
CC_MipsN_VarArg or CC_MipsN should be called. This is not correct, since this
flag is often set to false when the function being analyzed is a non-variadic
function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174442 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 21:18:11 +00:00
Michael J. Spencer
dd3aa9eab2 [objdump,readobj] Document the purpose and goals of each tool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174439 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 20:27:22 +00:00
Benjamin Kramer
39b5f12dd6 InstCombine: Fix and simplify the inttoptr side too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174438 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 20:22:40 +00:00
Michael Gottesman
07b884af25 Added missing newline to end of test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174433 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 19:39:44 +00:00
Michael Gottesman
da6bf1d8bb Removed explicit inline as per the LLVM style guide.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174432 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 19:32:18 +00:00
Owen Anderson
b48783b091 Reapply r174343, with a fix for a scary DAG combine bug where it failed to differentiate between the alignment of the
base point of a load, and the overall alignment of the load.  This caused infinite loops in DAG combine with the
original application of this patch.

ORIGINAL COMMIT LOG:
When the target-independent DAGCombiner inferred a higher alignment for a load,
it would replace the load with one with the higher alignment.  However, it did
not place the new load in the worklist, which prevented later DAG combines in
the same phase (for example, target-specific combines) from ever seeing it.

This patch corrects that oversight, and updates some tests whose output changed
due to slightly different DAGCombine outputs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174431 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 19:24:39 +00:00
Benjamin Kramer
1018fa256d InstCombine: Harden code to work with vectors of pointers and simplify it a bit.
Found by running instcombine on a fabricated test case for the constant folder.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174430 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 19:21:56 +00:00
Jyotsna Verma
1d3d2c57f5 Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle
zext( set[ne,eq,gt,ugt] (...) ) type of dag patterns.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174429 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 19:20:45 +00:00
Benjamin Kramer
faf601ee93 ConstantFolding: Fix a crash when encoutering a truncating inttoptr.
This was introduced in r173293.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174424 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 19:04:36 +00:00
Arnold Schwaighofer
7d80dad407 Loop Vectorizer: Refactor code to compute vectorized memory instruction cost
Introduce a helper class that computes the cost of memory access instructions.
No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174422 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 18:46:41 +00:00
Jyotsna Verma
f2c4db97e1 Hexagon: Add testcase for post-increment store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174419 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 18:23:51 +00:00
Chad Rosier
1e45487dfd [SjLj Prepare] When demoting an invoke instructions to the stack, if the normal
edge is critical, then split it so we can insert the store.
rdar://13126179

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174418 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 18:23:10 +00:00
Jakob Stoklund Olesen
e6dc59891f Remove liveout lists from MachineRegisterInfo.
All targets are now adding return value registers as implicit uses on
return instructions, and there is no longer a need for the live out
lists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174417 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 18:21:56 +00:00
Jakob Stoklund Olesen
b45e4deb10 Remove special-casing of return blocks for liveness.
Now that return value registers are return instruction uses, there is no
need for special treatment of return blocks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174416 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 18:21:52 +00:00
Jakob Stoklund Olesen
baa3c50a7b Move MRI liveouts to AArch64 return instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174415 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 18:21:49 +00:00
Jakob Stoklund Olesen
0873bc8419 Move MRI liveouts to XCore return instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174414 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 18:21:46 +00:00
Jakob Stoklund Olesen
067e5a2a1a Move MRI liveouts to Sparc return instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174413 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 18:16:58 +00:00
Jyotsna Verma
691c365aad Hexagon: Use multiclass for absolute addressing mode stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174412 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 18:15:34 +00:00
Jakob Stoklund Olesen
294014e158 Move MRI liveouts to MSP430 return instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174411 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 18:12:06 +00:00
Jakob Stoklund Olesen
d073596671 Move MRI liveouts to Mips return instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174410 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 18:12:03 +00:00
Jakob Stoklund Olesen
6ab5061a2c Move MRI liveouts to PowerPC return instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174409 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 18:12:00 +00:00
Jakob Stoklund Olesen
f02138e6ec Move MRI liveouts to MBlaze return instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174408 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 18:08:45 +00:00
Jakob Stoklund Olesen
87b87ad8fb Move MRI liveouts to Hexagon return instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174407 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 18:08:43 +00:00
Jakob Stoklund Olesen
fc74327444 Move MRI liveouts to ARM return instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174406 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 18:08:40 +00:00
Jakob Stoklund Olesen
7088fb60ed Add a test case for PR14750.
This was fixed by r174402.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174405 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 18:04:15 +00:00
Jakob Stoklund Olesen
c3afc760e1 Move MRI liveouts to X86 return instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174402 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 17:59:48 +00:00
Derek Schuff
f918d7fd73 [MC] Bundle alignment: Invalidate relaxed fragments
Currently, when a fragment is relaxed, its size is modified, but its
offset is not (it gets laid out as a side effect of checking whether
it needs relaxation), then all subsequent fragments are invalidated
because their offsets need to change. When bundling is enabled,
relaxed fragments need to get laid out again, because the increase in
size may push it over a bundle boundary. So instead of only
invalidating subsequent fragments, also invalidate the fragment that
gets relaxed, which causes it to get laid out again.

This patch also fixes some trailing whitespace and fixes the
bundling-related debug output of MCFragments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174401 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 17:55:27 +00:00
Jakob Stoklund Olesen
a499d2bcef Don't use MRI liveouts in R600.
Something very strange is going on with the output registers in this
target. Its ISelLowering code is inserting dangling CopyToReg nodes,
hoping that those physregs won't get clobbered before the RETURN.

This patch adds the output registers as implicit uses on RETURN
instructions in the custom emission pass. I'd much prefer to have those
CopyToReg nodes glued to the RETURNs, but I don't see how.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174400 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 17:53:52 +00:00
Jakob Stoklund Olesen
0a9d1d31e9 Avoid using MRI::liveout_iterator for computing VRSAVEs.
The liveout lists are about to be removed from MRI, this is the only
place they were used after register allocation.

Get the live out V registers directly from the return instructions
instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174399 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 17:40:36 +00:00
Bob Wilson
cdb0a58f88 Set the deployment target for Apple llvmCore builds. <rdar://problem/12712431>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174397 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 17:29:03 +00:00
Eli Bendersky
97ebecaa79 Format comments & clean whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174396 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 17:10:07 +00:00
Tom Stellard
cc38cad53c R600: Fold remaining CONST_COPY after expand pseudo inst
Patch by: Vincent Lejeune

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174395 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 17:09:16 +00:00
Tom Stellard
29b15a3780 R600: improve inputs/interpolation handling
Use one intrinsic for all sorts of interpolation.
Use two separate unexpanded instructions to represent INTERP_XY and _ZW -
this will allow to eliminate one part if it's not used.
Track liveness of special interpolation regs instead of reserving them -
this will allow to reuse those regs, lowering reg pressure.

Patch By: Vadim Girlin

v2[Vincent Lejeune]: Rebased against current llvm master

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174394 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 17:09:14 +00:00
Tom Stellard
ebc535bc4a R600: Add tests for instruction predicates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174393 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 17:09:13 +00:00
Tom Stellard
3ce2ec8478 R600: Emit function name in the AsmPrinter
Emitting the function name allows us to check for it in the FileCheck
tests so we can make sure FileCheck is checking the output of the
correct function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174392 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 17:09:11 +00:00
Tom Stellard
50a44a62b8 R600/SI: Add patterns for fcos and fsin.
Fixes 37 piglit tests and allows e.g. FlightGear to run with radeonsi.

Patch by: Michel Dänzer

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174391 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 17:09:10 +00:00
Eli Bendersky
d07c2a5fa1 Fix comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174390 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 16:53:11 +00:00
Jyotsna Verma
4210da7253 Hexagon: Add V4 compare instructions. Enable relationship mapping
for the existing instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174389 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 16:42:24 +00:00