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23472 Commits

Author SHA1 Message Date
Nadav Rotem
daf7b5c8f2 Change the codegen Cost Model API for shuffeles. This patch removes the API for broadcast and adds a more general API that accepts an enum of known shuffles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171022 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-24 08:57:47 +00:00
Nadav Rotem
6f3d81a929 CostModel: Change the default target-independent implementation for finding 
the cost of arithmetic functions. We now assume that the cost of arithmetic
operations that are marked as Legal or Promote is low, but ops that are
marked as custom are higher.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171002 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-23 17:31:23 +00:00
Nadav Rotem
40b04a481d whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170997 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-23 07:33:44 +00:00
Nadav Rotem
677689cf5d Rename a function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170996 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-23 07:30:09 +00:00
Nadav Rotem
d54fed2786 Loop Vectorizer: Update the cost model of scatter/gather operations and make 
them more expensive.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170995 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-23 07:23:55 +00:00
Benjamin Kramer
2f8a6cdfa3 X86: Turn mul of <4 x i32> into pmuludq when no SSE4.1 is available. 
pmuludq is slow, but it turns out that all the unpacking and packing of the
scalarized mul is even slower. 10% speedup on loop-vectorized paq8p.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170985 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-22 16:07:56 +00:00
Benjamin Kramer
17347912b4 X86: Emit vector sext as shuffle + sra if vpmovsx is not available. 
Also loosen the SSSE3 dependency a bit, expanded pshufb + psra is still better
than scalarized loads. Fixes PR14590.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170984 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-22 11:34:28 +00:00
Nadav Rotem
d0696ef8c3 In some cases, due to scheduling constraints we copy the EFLAGS. 
The only way to read the eflags is using push and pop. If we don't
adjust the stack then we run over the first frame index. This is
not something that we want to do, so we have to make sure that
our machine function does not copy the flags. If it does then
we have to emit the prolog that adjusts the stack.

rdar://12896831



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170961 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 23:48:49 +00:00
Akira Hatanaka
dbf51ee459 [mips] Refactor subword-swap, EXT/INS, load-effective-address and read-hardware 
instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170956 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 23:21:32 +00:00
Akira Hatanaka
e8bc10b902 [mips] Refactor SYNC and multiply/divide instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170955 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 23:17:36 +00:00
Akira Hatanaka
aa7c9cd181 [mips] Refactor BAL instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170954 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 23:15:59 +00:00
Akira Hatanaka
1892253694 [mips] Fix encoding of BAL instruction. Also, fix assembler test case which 
was not catching the error.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170953 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 23:13:59 +00:00
Akira Hatanaka
6a8309e62a [mips] Refactor jump, jump register, jump-and-link and nop instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170952 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 23:03:50 +00:00
Akira Hatanaka
0a57dc1d14 [mips] Refactor load/store left/right and load-link and store-conditional 
instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170950 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 23:01:24 +00:00
Akira Hatanaka
16164657d8 [mips] Refactor load/store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170948 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:58:55 +00:00
Akira Hatanaka
5f5770baae [mips] Remove unnecessary isPseudo parameter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170947 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:57:26 +00:00
Akira Hatanaka
8e719fac46 [mips] Refactor LUI instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170944 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:46:07 +00:00
Akira Hatanaka
35242e27c5 [mips] Refactor count leading zero or one instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170942 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:43:58 +00:00
Akira Hatanaka
8aaed99a99 [mips] Refactor sign-extension-in-register instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170940 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:41:52 +00:00
Akira Hatanaka
7de001b97e [mips] Refactor instructions which copy from and to HI/LO registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170939 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:39:17 +00:00
Akira Hatanaka
2a732ec272 [mips] Refactor logical NOR instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170937 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:35:47 +00:00
Akira Hatanaka
a8215f4ec2 [mips] Move instruction definitions in MipsInstrInfo.td. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170936 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 22:33:43 +00:00
Tom Stellard
b06c540f9f R600: Coding style - remove empty spaces from the beginning of functions 
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170923 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 20:12:02 +00:00
Tom Stellard
eef0d5a0d6 R600: Fix MAX_UINT definition 
Patch by: Vadim Girlin

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170922 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 20:12:01 +00:00
Tom Stellard
fe13e70f6f R600: Add SHADOWCUBE to TEX_SHADOW pattern 
Patch by: Vadim Girlin

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170921 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 20:11:59 +00:00
Benjamin Kramer
4e23ebe766 Cleanup compiler warnings on discarding type qualifiers in casts. Switch to C++ style casts. 
Patch by Saleem Abdulrasool!

Differential Revision: http://llvm-reviews.chandlerc.com/D204

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170917 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 19:09:53 +00:00
Benjamin Kramer
2556c6b4b6 X86: Match pmin/pmax as a target specific dag combine. This occurs during vectorization. 
Part of PR14667.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170908 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 17:46:58 +00:00
Roman Divacky
38b06020db Remove duplicate includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170902 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 17:06:44 +00:00
Tom Stellard
519b456fe1 R600: Expand vec4 INT <-> FP conversions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170901 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 16:33:24 +00:00
Benjamin Kramer
739c7a83e1 X86: Match the SSE/AVX min/max vector ops using a custom node instead of intrinsics 
This is very mechanical, no functionality change. Preparation for PR14667.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170898 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 14:04:55 +00:00
Nadav Rotem
042a9a2666 Add a missing "virtual" keyword. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170842 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 05:02:12 +00:00
Quentin Colombet
e0f1d712f6 Add ARM cortex-r5 subtarget. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170840 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 04:35:05 +00:00
Nadav Rotem
f5637c3997 Improve the X86 cost model for loads and stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170830 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 01:33:59 +00:00
Nadav Rotem
c2a537bd08 BB-Vectorizer: Check the cost of the store pointer type 
and not the return type, which is void. A number of test
cases fail after adding the assertion in TTImpl.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170828 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 01:24:36 +00:00
Reed Kotler
a40ba2b3b2 Call llvm_unreachable instead of assert. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170822 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-21 00:44:59 +00:00
Jakob Stoklund Olesen
be06aacaa9 Add an MF argument to MI::copyImplicitOps(). 
This function is often used to decorate dangling instructions, so a
context reference is required to allocate memory for the operands.

Also add a corresponding MachineInstrBuilder method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170797 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 22:54:02 +00:00
Jakob Stoklund Olesen
b9efafe54d MachineInstrBuilderize ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170795 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 22:53:55 +00:00
Jakob Stoklund Olesen
28d53a26cc MachineInstrBuilderize NVPTX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170794 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 22:53:53 +00:00
Bob Wilson
103b4a571e Revert "Adding support for llvm.arm.neon.vaddl[su].* and" 
This reverts r170694.  The operations can be represented in IR without
adding any new intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170765 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 21:09:38 +00:00
Evan Cheng
139e407d52 On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr, 
are more expensive than the non-flag setting variant. Teach thumb2 size
reduction pass to avoid generating them unless we are optimizing for size.

rdar://12892707


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170728 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 19:59:30 +00:00
Roman Divacky
6af228a92a Remove MCTargetAsmLexer and its derived classes now that edis, 
its only user, is gone.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170699 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 14:43:30 +00:00
Renato Golin
332bd79951 Adding support for llvm.arm.neon.vaddl[su].* and 
llvm.arm.neon.vsub[su].* intrinsics.

Patch by Pete Couperus <pjcoup@gmail.com>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170694 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 13:52:11 +00:00
Reed Kotler
27210d215a Implement cfi_def_cfa_offset. "Make check" test case for this comming in the 
next few days but it's already tested a lot from test-suite and works fine.
This patch completes almost 100% pass of test-suite for mips 16.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170674 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 06:59:37 +00:00
Reed Kotler
0fd8313250 There is one more patch to finish large frames. Make sure we assert 
on code that has large frames which will not yet compile correctly.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170673 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 06:57:00 +00:00
Jyotsna Verma
82a36e2b59 Add constant extender support to GP-relative load/store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170672 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 06:52:46 +00:00
Jyotsna Verma
39498d1ff0 Add TSFlags to ALU32 type instructions for constant-extender/Relationship maps. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170671 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 06:45:39 +00:00
Reed Kotler
bacbf1c2cb set register class properly for mips16 here 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170669 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 06:06:35 +00:00
Rafael Espindola
399532b25a Undefine PPC harder. 
This was causing a build failure while trying to build on ppc ubuntu 12.10 with
cmake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170668 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 05:13:09 +00:00
Reed Kotler
c28ee9622a This assert is overly restrictive and does not work for mips16. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170667 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 05:09:15 +00:00
Reed Kotler
1f23239c5b Turn on register scavenger for Mips 16 
We use an unused Mips 32 register for the emergency slot
instead of using the stack.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170665 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-20 04:44:58 +00:00