Commit Graph

6063 Commits

Author SHA1 Message Date
Chad Rosier
a07d3fc693 Add support for using immediates with select instructions.
rdar://10412592


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144376 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 06:20:39 +00:00
Eli Friedman
15f58c56e9 Make sure to expand SIGN_EXTEND_INREG for NEON vectors. PR11319, round 3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144361 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 03:16:38 +00:00
Chad Rosier
4e89d97e3a Add support for using MVN to materialize negative constants.
rdar://10412592

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144348 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 00:36:21 +00:00
Chad Rosier
16455ce1a4 When in ARM mode, LDRH/STRH require special handling of negative offsets.
For correctness, disable this for now.
rdar://10418009

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144316 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 21:09:49 +00:00
NAKAMURA Takumi
bd165eac9d test/CodeGen/X86/lsr-loop-exit-cond.ll: Try to appease linux and freebsd bots to specify explicit -mtriple=x86_64-darwin.
I guess it expects -relocation-model=pic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144290 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 14:18:59 +00:00
Evan Cheng
623a7e146b Use a bigger hammer to fix PR11314 by disabling the "forcing two-address
instruction lower optimization" in the pre-RA scheduler.

The optimization, rather the hack, was done before MI use-list was available.
Now we should be able to implement it in a better way, perhaps in the
two-address pass until a MI scheduler is available.

Now that the scheduler has to backtrack to handle call sequences. Adding
artificial scheduling constraints is just not safe. Furthermore, the hack
is not taking all the other scheduling decisions into consideration so it's just
as likely to pessimize code. So I view disabling this optimization goodness
regardless of PR11314.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144267 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 07:43:16 +00:00
Chad Rosier
6cba97c555 For immediate encodings of icmp, zero or sign extend first. Then
determine if the value is negative and flip the sign accordingly.
rdar://10422026

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144258 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 01:30:39 +00:00
Jakob Stoklund Olesen
17afb06648 Strip old implicit operands after foldMemoryOperand.
The TII.foldMemoryOperand hook preserves implicit operands from the
original instruction.  This is not what we want when those implicit
operands refer to the register being spilled.

Implicit operands referring to other registers are preserved.

This fixes PR11347.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144247 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 00:17:03 +00:00
Eli Friedman
14e809c872 Make sure we correctly unroll conversions between v2f64 and v2i32 on ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144241 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 23:36:02 +00:00
Eli Friedman
0948f0acca Add check so we don't try to perform an impossible transformation. Fixes issue from PR11319.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144216 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 22:25:12 +00:00
Nadav Rotem
c6c7e85a71 AVX2: Add patterns for variable shift operations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144212 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 21:22:13 +00:00
Chad Rosier
a7a996b98d Use REs to remove dependencies on the register allocation order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144209 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 20:06:13 +00:00
Duncan Sands
ef0b3ca3a8 Speculatively revert commit 144124 (djg) in the hope that the 32 bit
dragonegg self-host buildbot will recover (it is complaining about object
files differing between different build stages).  Original commit message:

Add a hack to the scheduler to disable pseudo-two-address dependencies in
basic blocks containing calls. This works around a problem in which
these artificial dependencies can get tied up in calling seqeunce
scheduling in a way that makes the graph unschedulable with the current
approach of using artificial physical register dependencies for calling
sequences. This fixes PR11314.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144188 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 14:20:48 +00:00
Nadav Rotem
bb539bf973 Add AVX2 support for vselect of v32i8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144187 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 13:21:28 +00:00
Craig Topper
b80ada98c5 Enable execution dependency fix pass for YMM registers when AVX2 is enabled. Add AVX2 logical operations to list of replaceable instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144179 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 09:37:21 +00:00
Craig Topper
0a15035f52 Add instruction selection for AVX2 integer comparisons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144176 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 08:06:13 +00:00
Craig Topper
aaa643c70e Add AVX2 instruction lowering for add, sub, and mul.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144174 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 07:28:55 +00:00
Chad Rosier
2f2fe417f9 Add support for encoding immediates in icmp and fcmp. Hopefully, this will
remove a fair number of unnecessary materialized constants.
rdar://10412592


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 03:22:02 +00:00
Jakob Stoklund Olesen
f4c4768fb2 Collapse DomainValues across loop back-edges.
During the initial RPO traversal of the basic blocks, remember the ones
that are incomplete because of back-edges from predecessors that haven't
been visited yet.

After the initial RPO, revisit all those loop headers so the incoming
DomainValues on the back-edges can be properly collapsed.

This will properly fix execution domains on software pipelined code,
like the included test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144151 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 01:06:56 +00:00
Dan Gohman
9cae2d2225 Add a hack to the scheduler to disable pseudo-two-address dependencies in
basic blocks containing calls. This works around a problem in which
these artificial dependencies can get tied up in calling seqeunce
scheduling in a way that makes the graph unschedulable with the current
approach of using artificial physical register dependencies for calling
sequences. This fixes PR11314.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144124 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 21:29:06 +00:00
Evan Cheng
3568a1051e Add workaround for Cortex-M3 errata 602117 by replacing ldrd x, y, [x] with ldm or ldr pairs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144123 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 21:21:09 +00:00
Pete Cooper
d9eb920aa4 Adding test for machine-licm operating on invariant load instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144104 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 19:06:53 +00:00
Lang Hames
5207bf2177 Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported.
Add support for trimming constants to GetDemandedBits. This fixes some funky
constant generation that occurs when stores are expanded for targets that don't
support unaligned stores natively.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144102 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 18:56:23 +00:00
NAKAMURA Takumi
a422294ab1 test/CodeGen/X86/vec_shuffle-39.ll: Add explicit -mtriple=x86_64-linux. Passing packed value is not compatible on Win32 x64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144068 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 03:46:39 +00:00
NAKAMURA Takumi
916d6441e1 test/CodeGen/X86/vec_shuffle-38.ll: Relax expression for Win32 x64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144067 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 03:46:32 +00:00
NAKAMURA Takumi
5fb870d861 test/CodeGen/X86/vec_shuffle.ll: Add explicit -mtriple=i686-linux. We may see some suboptimal frame (%ebp) emission on certain hosts. Possible [PR11031]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144066 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 03:46:25 +00:00
Eli Friedman
9f1f26aefa Make sure to mark vector extload's as expand on ARM. Fixes PR11319.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144057 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 01:43:53 +00:00
Eli Friedman
2efa35f779 Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318.
Re-commit of r144034, with an extra fix so that RemoveDeadNode doesn't blow up.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144055 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 01:25:24 +00:00
Evan Cheng
7bc389b6b0 Add x86 isel logic and patterns to match movlps from clang generated IR for _mm_loadl_pi(). rdar://10134392, rdar://10050222
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144052 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 00:31:58 +00:00
Bill Wendling
8b7d76990c Convert to the new EH model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144049 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 00:17:28 +00:00
Bill Wendling
30ceba32b2 Convert tests to the new EH model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144048 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 00:09:27 +00:00
Chad Rosier
0eff39f2e2 Enable support for returning i1, i8, and i16. Nothing special todo as it's the
callee's responsibility to sign or zero-extend the return value.  The additional
test case just checks to make sure the calls are selected (i.e., -fast-isel-abort
doesn't assert).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 00:03:32 +00:00
Pete Cooper
02e5fb0f58 Added missing newline
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144046 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 00:03:24 +00:00
Eli Friedman
58dd0fec4d Revert r144034 while I try to track down a crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144044 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 23:53:20 +00:00
Jakob Stoklund Olesen
61f46de349 Fix test for Windows as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144038 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 23:10:43 +00:00
Jakob Stoklund Olesen
b26c7727c9 Kill and collapse outstanding DomainValues.
DomainValues that are only used by "don't care" instructions are now
collapsed to the first possible execution domain after all basic blocks
have been processed.  This typically means the PS domain on x86.

For example, the vsel_i64 and vsel_double functions in sse2-blend.ll are
completely collapsed to the PS domain instead of containing a mix of
execution domains created by isel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144037 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 23:08:21 +00:00
Pete Cooper
a29fc806fe InstCombine now optimizes vector udiv by power of 2 to shifts
Fixes r8429


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144036 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 23:04:49 +00:00
Eli Friedman
1b4f6f2532 Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144034 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 22:51:10 +00:00
Benjamin Kramer
70be28a5ad Simplify some uses of utohexstr.
As a side effect hex is printed lowercase instead of uppercase now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144013 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 21:00:59 +00:00
Jakob Stoklund Olesen
32dd4eb204 Fix test for Linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144003 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 20:47:23 +00:00
Jakob Stoklund Olesen
3e5d5c53a0 Expand V_SET0 to xorps by default.
The xorps instruction is smaller than pxor, so prefer that encoding.

The ExecutionDepsFix pass will switch the encoding to pxor and xorpd
when appropriate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143996 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 19:15:58 +00:00
Craig Topper
4c763ee613 Add AVX2 variable shift instructions and intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143915 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 08:26:24 +00:00
Craig Topper
28692044db Add AVX2 VPMOVMASK instructions and intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143904 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 03:20:35 +00:00
Craig Topper
69f5df7778 Add AVX2 VEXTRACTI128 and VINSERTI128 instructions. Fix VPERM2I128 to be qualified with HasAVX2 instead of HasAVX. Mark VINSERTF128 and VEXTRACTF128 as never having side effects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143902 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 02:00:04 +00:00
Craig Topper
c8eb880a7f More AVX2 instructions and their intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143895 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-06 23:04:08 +00:00
Craig Topper
27e5d0c72a Add more AVX2 instructions and intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143861 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-06 06:12:20 +00:00
Chad Rosier
42536af5ce Add support for passing i1, i8, and i16 call parameters. Also, be sure to
zero-extend the constant integer encoding.  Test case provides testing for
both call parameters and materialization of i1, i8, and i16 types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143821 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-05 20:16:15 +00:00
Benjamin Kramer
c25c908977 Add an option to pad an uleb128 to MCObjectWriter and remove the uleb128 encoding from the DWARF asm printer.
As a side effect we now print dwarf ulebs with .ascii directives.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143809 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-05 11:52:44 +00:00
Eli Friedman
bd00a934c6 Enhanced vzeroupper insertion pass that avoids inserting vzeroupper where it is unnecessary through local analysis. Patch from Bruno Cardoso Lopes, with some additional changes.
I'm going to wait for any review comments and perform some additional testing before turning this on by default.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143750 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-04 23:46:11 +00:00
Craig Topper
517497cce0 Add intrinsics for X86 vcvtps2ph and vcvtph2ps instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143682 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-04 06:59:21 +00:00