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163 Commits

Author SHA1 Message Date
Christopher Lamb
a1eb155e52 Use subregs to improve any_extend code generation when feasible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41013 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-10 22:22:41 +00:00
Christopher Lamb
c59e52108b Increase efficiency of sign_extend_inreg by using subregisters for truncation. As the README suggests sign_extend_subreg is selected to (sext(trunc)). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41010 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-10 21:48:46 +00:00
Evan Cheng
f7ef26e701 divb / mulb outputs to ah. Under x86-64 it's not legal to read ah if the instruction requires a rex prefix (i.e. outputs to r8b, etc.). So issue shift right by 8 on AX and then truncate it to 8 bits instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40972 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-09 21:59:35 +00:00
Dale Johannesen
cdbe4d3ebe Long double patch 8 of N: make it partially work in 
SSE mode (all but conversions <-> other FP types, I think):
>>Do not mark all-80-bit operations as "Requires[FPStack]"
(which really means "not SSE").
>>Refactor load-and-extend to facilitate this.
>>Update comments.
>>Handle long double in SSE when computing FP_REG_KILL.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40906 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-07 20:29:26 +00:00
Dale Johannesen
6a30811d5c Get X86 long double calling convention to work 
(on Darwin, anyway).  Fix some table omissions for
LD arithmetic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40877 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-06 21:31:06 +00:00
Evan Cheng
7afa166c76 Switch some multiplication instructions over to the new scheme for testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40723 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-02 05:48:35 +00:00
Evan Cheng
f6844ca0e4 Mac OS X X86-64 low 4G address not available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40701 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-01 23:45:51 +00:00
Christopher Lamb
2dc6dc619c Change the x86 backend to use extract_subreg for truncation operations. Passes DejaGnu, SingleSource and MultiSource. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40578 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-29 01:24:57 +00:00
Evan Cheng
cf5543c47e Minor bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40535 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 17:02:45 +00:00
Evan Cheng
518143d795 Same goes for constantpool, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40517 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 07:35:15 +00:00
Evan Cheng
a49ed78c27 Mac OS X x86-64 lower 4G address is not available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40502 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-25 23:41:36 +00:00
Dan Gohman
dc9b3d0bb5 Add const to CanBeFoldedBy, CheckAndMask, and CheckOrMask. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40480 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-24 23:00:27 +00:00
Dale Johannesen
849f214a4e Fix for PR 1505 (and 1489). Rewrite X87 register 
model to include f32 variants.  Some factoring
improvments forthcoming.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37847 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-03 00:53:03 +00:00
Dan Gohman
ea859be53c Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from 
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-22 14:59:07 +00:00
Chris Lattner
a1b253f58e Fix CodeGen/X86/2007-03-24-InlineAsmPModifier.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35926 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 22:29:46 +00:00
Anton Korobeynikov
f6e9353e1a Oops :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35438 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 18:38:33 +00:00
Anton Korobeynikov
33bf8c44dd Don't allow MatchAddress recurse too much. This trims exponential 
behaviour in some cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35437 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 18:36:33 +00:00
Chris Lattner
a16b7cb1d3 Two changes: 
1) codegen a shift of a register as a shift, not an LEA.
2) teach the RA to convert a shift to an LEA instruction if it wants something
   in three-address form.

This gives us asm diffs like:

-       leal (,%eax,4), %eax
+       shll $2, %eax

which is faster on some processors and smaller on all of them.

and, more interestingly:

-       movl 24(%esi), %eax
-       leal (,%eax,4), %edi
+       movl 24(%esi), %edi
+       shll $2, %edi

Without #2, #1 was a significant pessimization in some cases.

This implements CodeGen/X86/shift-codegen.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35204 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 06:08:29 +00:00
Chris Lattner
6241226b09 Fix a miscompilation in the addr mode code trying to implement X | C and 
X + C to promote LEA formation.  We would incorrectly apply it in some cases
(test) and miss it in others.

This fixes CodeGen/X86/2007-02-04-OrAddrMode.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33884 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-04 20:18:17 +00:00
Evan Cheng
706535db86 Linux GOT indirect reference is only necessary in PIC mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33441 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-22 21:34:25 +00:00
Reid Spencer
7aa8a45922 Adjust #includes to compensate for lost of DerivedTypes.h in 
TargetLowering.h


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33154 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-12 23:22:14 +00:00
Anton Korobeynikov
7f70559bc4 * PIC codegen for X86/Linux has been implemented 
* PIC-aware internal structures in X86 Codegen have been refactored
* Visibility (default/weak) has been added
* Docs fixes (external weak linkage, visibility, formatting)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33136 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-12 19:20:47 +00:00
Anton Korobeynikov
317848f4a1 Really big cleanup. 
- New target type "mingw" was introduced
- Same things for both mingw & cygwin are marked as "cygming" (as in
gcc)
- .lcomm is supported here, so allow LLVM to use it
- Correctly use underscored versions of setjmp & _longjmp for both mingw
& cygwin


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32833 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-03 11:43:14 +00:00
Chris Lattner
95b2c7da5e eliminate static ctors for Statistic objects. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32703 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-19 22:59:26 +00:00
Evan Cheng
a70d14bd16 Fix for PR1062 by Dan Gohman. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32688 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-19 21:31:42 +00:00
Bill Wendling
f5da13367f What should be the last unnecessary <iostream>s in the library. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-07 22:21:48 +00:00
Chris Lattner
ac0b6ae358 Detemplatize the Statistic class. The only type it is instantiated with 
is 'unsigned'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32279 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-06 17:46:33 +00:00
Evan Cheng
953fa0455e Revert an unintended change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32239 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-05 22:03:40 +00:00
Evan Cheng
28b51439f3 - Switch X86-64 JIT to large code size model. 
- Re-enable some codegen niceties for X86-64 static relocation model codegen.
- Clean ups, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32238 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-05 19:50:18 +00:00
Evan Cheng
19f2ffce45 - Fix X86-64 JIT by temporarily disabling code that treats GV address as 32-bit 
immediate in small code model. The JIT cannot ensure GV's are placed in the
lower 4G.
- Some preliminary support for large code model.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32215 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-05 04:01:03 +00:00
Evan Cheng
0085a28d13 - Use a different wrapper node for RIP-relative GV, etc. 
- Proper support for both small static and PIC modes under X86-64
- Some (non-optimal) support for medium modes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32046 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-30 21:55:46 +00:00
Evan Cheng
4946399b64 Clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32027 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-29 23:46:27 +00:00
Evan Cheng
d0ff02cf6f Fix for PR1018 - Better support for X86-64 Linux in small code model. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32026 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-29 23:19:46 +00:00
Evan Cheng
c0f64ffab9 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 23:37:22 +00:00
Evan Cheng
b1409ce7ba For unsigned 8-bit division. Use movzbw to set the lower 8 bits of AX while 
clearing the upper 8-bits instead of issuing two instructions. This also
eliminates the need to target the AH register which can be problematic on
x86-64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31832 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 22:10:14 +00:00
Bill Wendling
6345d75729 Removed even more std::cerr and #include <iostream> things. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31813 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 07:52:03 +00:00
Evan Cheng
7ce4578353 Matches MachineInstr changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31712 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-13 23:36:35 +00:00
Evan Cheng
5cd3e9f4b7 Add implicit use / def operands to created MI's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31676 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 10:21:44 +00:00
Evan Cheng
490ce1ea6f Add all implicit defs to FP_REG_KILL mi. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31674 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 07:19:36 +00:00
Evan Cheng
d6373bcd82 Fix a bug in SelectScalarSSELoad. Since the load is wrapped in a 
SCALAR_TO_VECTOR, even if the hasOneUse() check pass we may end up folding
the load into two instructions. Make sure we check the SCALAR_TO_VECTOR
has only one use as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31641 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 21:23:04 +00:00
Evan Cheng
0d53826f36 Match tblegen changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31571 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 20:34:28 +00:00
Jeff Cohen
d41b30def3 Unbreak VC++ build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31464 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-05 19:31:28 +00:00
Chris Lattner
15092547e4 silence warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31393 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 01:13:15 +00:00
Evan Cheng
07e4b00a1a SelectScalarSSELoad should call CanBeFoldedBy as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30973 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-16 06:34:55 +00:00
Evan Cheng
27e1fe9dab Corrected load folding check. We need to start from the root of the sub-dag 
being matched and ensure there isn't a non-direct path to the load (i.e. a
path that goes out of the sub-dag.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30958 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-14 08:33:25 +00:00
Evan Cheng
8b2794aeff Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-13 21:14:26 +00:00
Evan Cheng
494cec6e58 Doh. This wasn't causing problems by luck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30914 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-12 19:13:59 +00:00
Chris Lattner
f78ae9eb8a fix compilation failure of smg2000 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30900 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-12 03:55:48 +00:00
Chris Lattner
4fe4f254ce Fold "zero extending vector loads" now that evan added the chain manip stuff. 
This compiles both tests in X86/vec_ss_load_fold.ll into:

_test1:
        movss 4(%esp), %xmm0
        subss LCPI1_0, %xmm0
        mulss LCPI1_1, %xmm0
        minss LCPI1_2, %xmm0
        xorps %xmm1, %xmm1
        maxss %xmm1, %xmm0
        cvttss2si %xmm0, %eax
        andl $65535, %eax
        ret

instead of:

_test1:
        movss LCPI1_0, %xmm0
        movss 4(%esp), %xmm1
        subss %xmm0, %xmm1
        movss LCPI1_1, %xmm0
        mulss %xmm0, %xmm1
        movss LCPI1_2, %xmm0
        minss %xmm0, %xmm1
        xorps %xmm0, %xmm0
        maxss %xmm0, %xmm1
        cvttss2si %xmm1, %eax
        andl $65535, %eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30894 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 22:09:58 +00:00
Evan Cheng
82a9164fb4 ComplexPatterns sse_load_f32 and sse_load_f64 returns in / out chain operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30892 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 21:06:01 +00:00