Chris Lattner
b5d01436e3
Add some explicit type casts so that tblgen knows the type of the shiftamount, which is not necessarily the same as the type being shifted.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24595 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:34:29 +00:00
Chris Lattner
18c778f8be
IA64 doesn't support the LOCATION node, and for some reason the ISelPattern
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stuff isn't using ISelLowering.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24567 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 18:19:53 +00:00
Nate Begeman
6510b22cec
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
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work. This change has no effect on generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 04:51:06 +00:00
Chris Lattner
b19b899181
Pay attn to the node returned by SelectNodeTo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24551 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 23:02:08 +00:00
Nate Begeman
391c5d231a
No longer track value types for asm printer operands, and remove them as
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an argument to every operand printing function. Requires some slight
tweaks to x86, the only user.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24541 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 18:54:35 +00:00
Chris Lattner
f73bae1b73
No targets support line number info yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24513 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 06:16:21 +00:00
Duraid Madina
7b1e154c5a
add support for dynamic_stackalloc to the dag isel (thanks andrew ;)
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next up: support argument passing in memory, not just registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24490 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-25 07:49:25 +00:00
Duraid Madina
b6f023ac21
add support for div/rem to the dag->dag isel. yay.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24472 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 14:14:54 +00:00
Chris Lattner
42a76cdb04
Eliminate unneeded intermediate class. Move doFinalizeMethod to bottom of
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file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24470 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:40:17 +00:00
Chris Lattner
3dfbe2ed34
Start using shared asmprinter Constant Pool emitter, use shorter cpi names.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24469 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:38:26 +00:00
Chris Lattner
8b8b9515d6
Adjust to capitalized AsmPrinter method names
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24456 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:51:23 +00:00
Chris Lattner
2ec30b5e82
Use PrivateGlobalPrefix for basic block labels
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24452 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:39:22 +00:00
Chris Lattner
4bfa3a3eb0
Start using SwitchSection, allowing globals and functions to be emitted
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to specific sections. Delete some dead functions copied from the X86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24449 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:26:04 +00:00
Chris Lattner
62cbf2aab9
Rename SwitchSection -> switchSection to avoid conflicting with a future
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change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24443 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 06:55:27 +00:00
Chris Lattner
81a994e42e
Start using PrivateGlobalPrefix correctly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24442 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 06:51:52 +00:00
Duraid Madina
889649e78e
add FP select. next up - divide!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24346 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-14 01:17:30 +00:00
Chris Lattner
ce8eb0c16b
Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24233 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-08 02:11:51 +00:00
Duraid Madina
d525df3c27
add support for storing and returning bools
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24228 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-07 03:11:02 +00:00
Duraid Madina
00873ebc1f
just some random hacking - calls (particularly indirect) need a lot of
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love (especially with -sched=simple)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24225 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-06 13:43:30 +00:00
Duraid Madina
21687e8f63
ask for 16-byte aligned jmpbufs. This should unbreak C++ on IA64 (and
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a bunch of other things) but is currently ignored by the code
generator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24206 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-06 04:29:30 +00:00
Duraid Madina
764fe71e12
oops, forgot to load GP for indirect calls, though the old code now commented
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out failed (e.g. methcall) - now the code compiles, though it's not quite
right just yet (tm) ;)
would fix this but it's 3am! :O
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24186 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04 17:55:53 +00:00
Duraid Madina
b97cc99058
kill redundant SP/GP/RP save/restores across calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24183 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04 10:01:10 +00:00
Duraid Madina
9f7290633a
add support for loading bools
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24182 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04 09:59:06 +00:00
Duraid Madina
49fcc4006c
fun with predicates! (add TRUNC i64->i1, AND i1 i1, fix XOR i1 i1)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24175 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04 00:57:56 +00:00
Duraid Madina
0e5e0d14a8
add pattern to load constant 0 into a predicate reg
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24164 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-03 10:09:32 +00:00
Chris Lattner
61bc60fc4f
Fix a bug that prevented this pattern from matching
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24161 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-03 05:45:34 +00:00
Duraid Madina
056728f192
"fix" support for FP constants (this code asserts in the scheduler,
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though)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24152 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 07:32:59 +00:00
Duraid Madina
a2df2aee81
add F0 and F1 to the FP register class
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24151 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 07:30:39 +00:00
Chris Lattner
cb2583e17d
This works now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24150 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 06:49:37 +00:00
Duraid Madina
5966955445
add support for SELECT to TargetSelectionDAG.td, add support for
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selecting ints to IA64, and a few other ia64 bits and pieces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24147 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 02:37:18 +00:00
Duraid Madina
93856802ae
add support for loading FP constants +0.0 and +1.0 to the dag isel,
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stop pretending -0.0 and -1.0 are machine constants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24146 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 02:35:04 +00:00
Duraid Madina
7a8ef3a0d4
heh, scheduling was easy?
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need to send chris, jim and sampo a box of fish each
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24135 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 05:49:08 +00:00
Duraid Madina
dc9549b52c
FORTRAN!!! :( and other similarly unfortunate things mean that on ia64
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one sometimes needs to pass FP args in both FP *and* integer registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24134 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 05:46:16 +00:00
Duraid Madina
aba8457125
so tablegen was thinking I might want to convert FPs to predicates.
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clever little tablegen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24133 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 03:32:15 +00:00
Duraid Madina
e2fd9e2d9d
add support for int->FP and FP->int ops, and add ia64 patterns for these
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24132 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 03:07:25 +00:00
Duraid Madina
d1eda6d155
add zeroextend predicate->integer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24131 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-01 01:29:55 +00:00
Duraid Madina
363aff2f3c
add FP compares and implicit register defs to the dag isel
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24118 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-31 01:42:11 +00:00
Duraid Madina
5c2c64e567
fix some broken comparisons, this affected the Pattern isel too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24109 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-30 10:14:19 +00:00
Duraid Madina
25d0a88eb8
add some FP stuff, some mix.* stuff, and constant pool support to the
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DAG instruction selector, which should be destroyed one day (in the pattern
isel also) since ia64 can pack any constant in the instruction stream
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24094 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-29 16:08:30 +00:00
Duraid Madina
274ecfb782
add shladd
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24080 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-29 04:13:40 +00:00
Chris Lattner
aee436bcc0
These are autogenerated
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24063 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 18:26:52 +00:00
Duraid Madina
f2db9b88da
DAG->DAG instruction selection for ia64! "hello world" works, not much else.
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use -enable-ia64-dag-isel to turn this on
TODO: delete lowering stuff from the pattern isel
: get operations on predicate bits working
: get other bits of pseudocode going
: use sampo's mulh/mull-using divide-by-constant magic
: *so* many patterns ("extr", "tbit" and "dep" will be fun :)
: add FP
: add a JIT!
: get it working 100%
in short: this'll be happier in a couple of weeks, but it's here now so
the tester can make me feel guilty sooner.
OTHER: there are a couple of fixes to the pattern isel, in particular
making the linker happy with big blobs of fun like pypy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24058 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 17:46:35 +00:00
Chris Lattner
4bd4a54d57
remove dead stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24054 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 04:58:24 +00:00
Chris Lattner
a411bef105
Eliminate getClass, it is not needed
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24053 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 04:57:11 +00:00
Nate Begeman
d5ce204c5f
Don't generate operations that aren't yet supported
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23858 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 01:52:45 +00:00
Chris Lattner
7a7c979ddd
Fix CodeGen/Generic/bool-to-double.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23652 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-07 04:50:48 +00:00
Chris Lattner
0a37960d32
these registers don't belong to any register classes, so don't mark them
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as callee save. They can never be generated by the compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23551 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 06:42:24 +00:00
Chris Lattner
0ffb1a56ff
these methods get extra args
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23538 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 01:30:55 +00:00
Chris Lattner
3e2bafd640
Add FP versions of the binary operators, keeping the int and fp worlds seperate.
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Though I have done extensive testing, it is possible that this will break
things in configs I can't test. Please let me know if this causes a problem
and I'll fix it ASAP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23505 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-28 22:29:17 +00:00
Chris Lattner
2e3f5db9ff
Give all operands names
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23357 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-14 21:11:13 +00:00