Commit Graph

1798 Commits

Author SHA1 Message Date
Evan Cheng
ad9c0a3d8b Use sbb x, x to materialize carry bit in a GPR. The result is all one's or all zero's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91381 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 00:53:42 +00:00
Evan Cheng
99b653c36f Propagate zest through logical shift.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91378 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 00:41:36 +00:00
Dan Gohman
2e141d744e Fix integer cast code to handle vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91362 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 23:40:38 +00:00
Evan Cheng
dd99f3a7dc Disable r91104 for x86. It causes partial register stall which pessimize code in 32-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91223 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 20:03:14 +00:00
Dan Gohman
87862e77bb Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91158 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 21:31:27 +00:00
Dan Gohman
192db0027c Change this to the correct PR number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91148 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 20:09:21 +00:00
Dan Gohman
a4f9cc4e55 Fix the result type of SELECT nodes lowered from Select instructions with
aggregate return values. This fixes PR5754.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91145 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 19:50:50 +00:00
Anton Korobeynikov
817a46454a Honour setHasCalls() set from isel.
This is used in some weird cases like general dynamic TLS model.
This fixes PR5723

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 19:39:55 +00:00
Evan Cheng
50d070561e Tests for 91103 and 91104.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91105 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 06:02:21 +00:00
Evan Cheng
6fd78ec8a2 It's not safe to coalesce a move where src and dst registers have different subregister indices. e.g.:
%reg16404:1<def> = MOV8rr %reg16412:2<kill>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91061 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-10 20:59:45 +00:00
Evan Cheng
ce72f3fbdf Fix test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09 22:24:42 +00:00
Evan Cheng
c363094e04 Optimize splat of a scalar load into a shuffle of a vector load when it's legal. e.g.
vector_shuffle (scalar_to_vector (i32 load (ptr + 4))), undef, <0, 0, 0, 0>
=>
vector_shuffle (v4i32 load ptr), undef, <1, 1, 1, 1>

iff ptr is 16-byte aligned (or can be made into 16-byte aligned).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90984 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09 21:00:30 +00:00
David Greene
e1a2fd5ad4 Use FileCheck and set nounwind on calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90790 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 19:40:26 +00:00
Dan Gohman
d84ea47b89 Don't enable the post-RA scheduler on x86 except at -O3. In its
current form, it is too expensive in compile time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90781 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 19:04:31 +00:00
Bill Wendling
dc492e0370 Temporarily revert r90502. It was causing the llvm-gcc bootstrap on PPC to fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90653 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-05 07:30:23 +00:00
Jakob Stoklund Olesen
6b74e505be Also attempt trivial coalescing for live intervals that end in a copy.
The coalescer is supposed to clean these up, but when setting up parameters
for a function call, there may be copies to physregs. If the defining
instruction has been LICM'ed far away, the coalescer won't touch it.

The register allocation hint does not always work - when the register
allocator is backtracking, it clears the hints.

This patch takes care of a few more cases that r90163 missed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90502 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-04 00:16:04 +00:00
Nate Begeman
93e0ed31c5 Don't pull vector sext through both hands of a logical operation, since doing so prevents the fusion of vector sext and setcc into vsetcc.
Add a testcase for the above transformation.
Fix a bogus use of APInt noticed while tracking this down.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 07:11:29 +00:00
Bill Wendling
3627b48110 Remove unnecessary check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90352 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-02 22:02:20 +00:00
Evan Cheng
9836a26da3 Fix PR5391: support early clobber physical register def tied with a use (ewwww)
- A valno should be set HasRedefByEC if there is an early clobber def in the middle of its live ranges. It should not be set if the def of the valno is defined by an early clobber.
- If a physical register def is tied to an use and it's an early clobber, it just means the HasRedefByEC is set since it's still one continuous live range.
- Add a couple of missing checks for HasRedefByEC in the coalescer. In general, it should not coalesce a vr with a physical register if the physical register has a early clobber def somewhere. This is overly conservative but that's the price for using such a nasty inline asm "feature".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90269 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 22:25:00 +00:00
Jakob Stoklund Olesen
579d6d9fe3 Use CFG connectedness as a secondary sort key when deciding the order of copy coalescing.
This means that well connected blocks are copy coalesced before the less connected blocks. Connected blocks are more difficult to
coalesce because intervals are more complicated, so handling them first gives a greater chance of success.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90194 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 03:03:00 +00:00
Jakob Stoklund Olesen
ce7a663140 New virtual registers created for spill intervals should inherit allocation hints from the original register.
This helps us avoid silly copies when rematting values that are copied to a physical register:

leaq	_.str44(%rip), %rcx
movq	%rcx, %rsi
call	_strcmp

becomes:

leaq	_.str44(%rip), %rsi
call	_strcmp

The coalescer will not touch the movq because that would tie down the physical register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90163 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-30 22:55:54 +00:00
Mon P Wang
8b6a20accd Add test case for r90108
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90109 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-30 02:42:27 +00:00
Evan Cheng
695b9f3d5e Test for 89905.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89906 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-26 00:35:01 +00:00
Benjamin Kramer
bfd987ba57 Turns out stuff gets allocated to different registers depending on the subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89594 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 15:15:52 +00:00
Edward O'Callaghan
85d1aab444 Fix for bad FileCheck converts in revision 89584.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89586 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 12:50:05 +00:00
Edward O'Callaghan
81fff07daf Convert a few tests to FileCheck for PR5307.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89584 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 11:45:44 +00:00
Evan Cheng
c26abd9487 Enable hoisting load from constant memories.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89510 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 23:31:34 +00:00
Sean Callanan
b9e6b34e1e Recommitting PALIGNR shift width fixes.
Thanks to Daniel Dunbar for fixing clang intrinsics:
  http://llvm.org/viewvc/llvm-project?view=rev&revision=89499


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89500 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 22:28:42 +00:00
Sean Callanan
1bbf6d1a6f Reverting PALIGNR fix until I figure out how this
broke the Clang testsuite.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89495 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 22:09:28 +00:00
Sean Callanan
201dfa7432 Fixed PALIGNR to take 8-bit rotations in all cases.
Also fixed the corresponding testcase, and the PALIGNR
  intrinsic (tested for correctness with llvm-gcc).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89491 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 21:40:28 +00:00
Dan Gohman
b4afb137ef Fix fast-isel to avoid selecting the return instruction if a
tail call has been encountered.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89444 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 02:51:26 +00:00
Bill Wendling
77bd09b650 Test from Dhrystone to make sure that we're not emitting an aligned load for a
string that's aligned at 8-bytes instead of 16-bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89295 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 01:33:57 +00:00
Jakob Stoklund Olesen
0b25ae1afb Fix PR5300.
When TwoAddressInstructionPass deletes a dead instruction, make sure that all
register kills are accounted for. The 2-addr register does not get special
treatment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89246 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 21:33:35 +00:00
Jakob Stoklund Olesen
5052c1547e Fix inverted test and add testcase from failing self-host.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89167 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 00:02:18 +00:00
Jakob Stoklund Olesen
6c8a0715c4 Remove fragile test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89150 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 21:52:40 +00:00
Jakob Stoklund Olesen
95a2c8f1d0 Enable -split-phi-edges by default, except when -regalloc=local.
The local register allocator doesn't like it when LiveVariables is run.
We should also disable edge splitting under -O0, but that has to wait a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89125 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 19:15:50 +00:00
Evan Cheng
9e97f3c2e2 Revert 89021. It's miscompiling llvm-gcc driver driver at -O0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89082 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 09:55:52 +00:00
Jakob Stoklund Olesen
2cbe71cdf0 Enable -split-phi-edges by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89021 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 01:07:22 +00:00
Evan Cheng
6cccc30679 MOV64rm should be marked isReMaterializable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89019 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 00:55:55 +00:00
Dan Gohman
1d8c9e721e Fix this test - there don't appear to be any actual Reload Reuses
in this testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88998 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 23:49:55 +00:00
Dan Gohman
10190cceec Revert r87049, which was the workaround for the regression triggered
by the recent FixedStackPseudoSourceValue-related changes, now that
the specific bug that affected it is fixed, in r88954.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88997 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 23:43:42 +00:00
Evan Cheng
600c043697 - Check memoperand alignment instead of checking stack alignment. Most load / store folding instructions are not referencing spill stack slots.
- Mark MOVUPSrm re-materializable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88974 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 21:56:03 +00:00
David Greene
ddff941357 Support spill comments.
Have the asm printer emit a comment if an instruction is a spill or
reload and have the spiller mark copies it introdues so the asm printer
can also annotate those.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88911 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 15:12:23 +00:00
Evan Cheng
fae3e92345 Added getSubRegIndex(A,B) that returns subreg index of A to B. Use it to replace broken code in VirtRegRewriter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88753 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 03:42:17 +00:00
Dan Gohman
ed9bab3b4d Enable the tail call optimization when the caller returns undef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88737 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 02:06:30 +00:00
Dan Gohman
c4c550c758 When optimizing for size, don't tail-merge unless it's likely to be a
code-size win, and not when it's only likely to be code-size neutral,
such as when only a single instruction would be eliminated and a new
branch would be required.

This fixes rdar://7392894.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88692 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 21:02:15 +00:00
Dan Gohman
01205a80f5 Don't let a noalias difference disrupt the tailcall optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88672 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 18:49:38 +00:00
Daniel Dunbar
6242495be2 Update test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87049 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 01:01:58 +00:00
Dan Gohman
ad6af45dc1 Tail merge at any size when there are two potentials blocks and one
can be made to fall through into the other.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86909 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 00:39:10 +00:00
Kenneth Uildriks
c158dde219 x86 users can now return arbitrary sized structs. Structs too large to fit in return registers will be returned through a hidden sret parameter introduced during SelectionDAG construction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86876 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 19:59:24 +00:00