Nate Begeman
add19dc20a
Keep the stack from on darwin 16-byte aligned. This fixes many JIT
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failres.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27973 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-25 20:54:26 +00:00
Evan Cheng
0db9fe6775
Separate LowerOperation() into multiple functions, one per opcode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27972 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-25 20:13:52 +00:00
Evan Cheng
3d1be07141
Fix a typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27968 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-25 17:48:41 +00:00
Evan Cheng
a2137b592e
Explicitly specify result type for def : Pat<> patterns (if it produces a vector
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result). Otherwise tblgen will pick the default (v16i8 for 128-bit vector).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27965 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-25 00:50:01 +00:00
Evan Cheng
a7fc64222a
Added X86 SSE2 intrinsics which can be represented as vector_shuffles. This is
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a temporary workaround for the 2-wide vector_shuffle problem (i.e. its mask
would have type v2i32 which is not legal).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27964 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 23:34:56 +00:00
Evan Cheng
d7ec518927
Add a new entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27963 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 23:30:10 +00:00
Evan Cheng
37d1d9bc66
Special case handling two wide build_vector(0, x).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27961 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 22:58:52 +00:00
Evan Cheng
64e9769339
Some missing movlps, movhps, movlpd, and movhpd patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27960 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 21:58:20 +00:00
Evan Cheng
c78d3b43f5
A little bit more build_vector enhancement for v8i16 cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27959 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 18:01:45 +00:00
Evan Cheng
86661f4879
Remove a completed entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27958 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 17:38:16 +00:00
Evan Cheng
49bca8536c
MakeMIInst() should handle jump table index operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27955 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 05:37:35 +00:00
Chris Lattner
57a6c135f2
Add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27954 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-23 19:47:09 +00:00
Evan Cheng
9293451e3f
MOVL shuffle (i.e. movd or movss / movsd from memory) of undef, V2 == V2
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27953 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-23 06:35:19 +00:00
Nate Begeman
a766765358
Optimized stores to the constant pool, while cool, are unnecessary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27948 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 22:31:45 +00:00
Nate Begeman
37efe67645
JumpTable support! What this represents is working asm and jit support for
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x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 18:53:45 +00:00
Evan Cheng
1900c012f5
Don't do all the lowering stuff for 2-wide build_vector's. Also, minor optimization for shuffle of undef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27946 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 08:34:05 +00:00
Evan Cheng
a083af14c8
Fix a performance regression. Use {p}shuf* when there are only two distinct elements in a build_vector.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 06:21:46 +00:00
Evan Cheng
ba05f728b5
Revamp build_vector lowering to take advantage of movss and movd instructions.
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movd always clear the top 96 bits and movss does so when it's loading the
value from memory.
The net result is codegen for 4-wide shuffles is much improved. It is near
optimal if one or more elements is a zero. e.g.
__m128i test(int a, int b) {
return _mm_set_epi32(0, 0, b, a);
}
compiles to
_test:
movd 8(%esp), %xmm1
movd 4(%esp), %xmm0
punpckldq %xmm1, %xmm0
ret
compare to gcc:
_test:
subl $12, %esp
movd 20(%esp), %xmm0
movd 16(%esp), %xmm1
punpckldq %xmm0, %xmm1
movq %xmm1, %xmm0
movhps LC0, %xmm0
addl $12, %esp
ret
or icc:
_test:
movd 4(%esp), %xmm0 #5.10
movd 8(%esp), %xmm3 #5.10
xorl %eax, %eax #5.10
movd %eax, %xmm1 #5.10
punpckldq %xmm1, %xmm0 #5.10
movd %eax, %xmm2 #5.10
punpckldq %xmm2, %xmm3 #5.10
punpckldq %xmm3, %xmm0 #5.10
ret #5.10
There are still room for improvement, for example the FP variant of the above example:
__m128 test(float a, float b) {
return _mm_set_ps(0.0, 0.0, b, a);
}
_test:
movss 8(%esp), %xmm1
movss 4(%esp), %xmm0
unpcklps %xmm1, %xmm0
xorps %xmm1, %xmm1
movlhps %xmm1, %xmm0
ret
The xorps and movlhps are unnecessary. This will require post legalizer optimization to handle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27939 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-21 23:03:30 +00:00
Chris Lattner
6e68a7752b
fix thinko
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27935 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-21 21:05:22 +00:00
Chris Lattner
3e663a6c16
add some low-prio notes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27934 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-21 21:03:21 +00:00
Evan Cheng
017dcc6e55
Now generating perfect (I think) code for "vector set" with a single non-zero
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scalar value.
e.g.
_mm_set_epi32(0, a, 0, 0);
==>
movd 4(%esp), %xmm0
pshufd $69, %xmm0, %xmm0
_mm_set_epi8(0, 0, 0, 0, 0, a, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
==>
movzbw 4(%esp), %ax
movzwl %ax, %eax
pxor %xmm0, %xmm0
pinsrw $5, %eax, %xmm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27923 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-21 01:05:10 +00:00
Evan Cheng
39623daef6
- Added support to turn "vector clear elements", e.g. pand V, <-1, -1, 0, -1>
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to a vector shuffle.
- VECTOR_SHUFFLE lowering change in preparation for more efficient codegen
of vector shuffle with zero (or any splat) vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27875 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-20 08:58:49 +00:00
Evan Cheng
72cd9a9439
Handle v2i64 BUILD_VECTOR custom lowering correctly. v2i64 is a legal type,
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but i64 is not. If possible, change a i64 op to a f64 (e.g. load, constant)
and then cast it back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27849 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-20 00:11:39 +00:00
Evan Cheng
94fe5eb14a
isSplatMask() bug: first element can be an undef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27847 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 23:28:59 +00:00
Evan Cheng
80d428c370
- Added support to do aribitrary 4 wide shuffle with no more than three
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instructions.
- Fixed a commute vector_shuff bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27845 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 22:48:17 +00:00
Evan Cheng
fd111b5be5
Prefer {p}unpack* and mov*dup over {p}shuf* as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27844 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 21:15:24 +00:00
Evan Cheng
2dadaea5d2
- Renamed AddedCost to AddedComplexity.
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- Added more movhlps and movlhps patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27842 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 20:37:34 +00:00
Evan Cheng
533a0aa9ba
Commute vector_shuffle to match more movlhps, movlp{s|d} cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27840 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 20:35:22 +00:00
Evan Cheng
f66a094cac
More mov{h|l}p{d|s} patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27836 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 18:20:17 +00:00
Evan Cheng
cc0e98c8ed
- More mov{h|l}ps patterns.
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- Increase cost (complexity) of patterns which match mov{h|l}ps ops. These
are preferred over shufps in most cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27835 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 18:11:52 +00:00
Chris Lattner
ff5cdc2ccd
Add a note.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27827 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 05:53:27 +00:00
Evan Cheng
f0d4e3d7c0
- PEXTRW cannot take a memory location as its first source operand.
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- PINSRWrmi encoding bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27818 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 21:59:43 +00:00
Evan Cheng
f463f51161
SHUFP{S|D}, PSHUF* encoding bugs. Left out the mask immediate operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27817 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 21:56:36 +00:00
Evan Cheng
b7a5c527ae
Name change for clarity sake
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27816 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 21:55:35 +00:00
Evan Cheng
a52b214f56
Encoding bug: CMPPSrmi, CMPPDrmi dropped operand 2 (condtion immediate).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27815 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 21:31:08 +00:00
Evan Cheng
7b7bd57abd
Name change for clarity sake
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27814 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 21:29:50 +00:00
Evan Cheng
fb2a3b2964
Left a pattern out
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27813 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 21:29:08 +00:00
Evan Cheng
df2a1908b2
Fixed an encoding bug: movd from XMM to R32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27807 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 18:19:00 +00:00
Chris Lattner
993c897390
Teach the codegen about instructions used for SSE spill code, allowing it
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to optimize cases where it has to spill a lot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27801 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 16:44:51 +00:00
Evan Cheng
4980467476
Correct comments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27790 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 03:45:01 +00:00
Evan Cheng
74e955d931
Another entry
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27786 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 01:22:57 +00:00
Evan Cheng
7fa094a261
Another entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27784 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 00:21:01 +00:00
Evan Cheng
cdfc3c82a7
Use movss to insert_vector_elt(v, s, 0).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27782 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 22:45:49 +00:00
Evan Cheng
5edb8d270c
Use two pinsrw to insert an element into v4i32 / v4f32 vector.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27779 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 22:04:06 +00:00
Evan Cheng
23b72005fa
Encoding bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27773 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 21:33:57 +00:00
Evan Cheng
c575ca22ea
Implement v8i16, v16i8 splat using unpckl + pshufd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27768 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 20:43:08 +00:00
Chris Lattner
b2be4032c5
implement returns of a vector, testcase here: CodeGen/X86/vec_return.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27767 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 20:32:50 +00:00
Evan Cheng
51c9c43656
Incorrect foldMemoryOperand entries
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27763 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 18:06:12 +00:00
Evan Cheng
083248e143
Errors in patterns preventing load folding
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27762 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 18:05:01 +00:00
Evan Cheng
5001ea1078
FP SETOLT, SETOLT, SETUGE, SETUGT conditions were implemented incorrectly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27755 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 07:24:10 +00:00