Commit Graph

27 Commits

Author SHA1 Message Date
Evan Cheng
5bc4da4893 Bye bye HACKTROCITY.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24935 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-22 02:26:21 +00:00
Evan Cheng
b077b842b6 * Added lowering hook for external weak global address. It inserts a load
for Darwin.
* Added lowering hook for ISD::RET. It inserts CopyToRegs for the return
  value (or store / fld / copy to ST(0) for floating point value). This
  eliminate the need to write C++ code to handle RET with variable number
  of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24888 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 02:39:21 +00:00
Evan Cheng
bbc8ddbea3 SSE2 floating point load / store patterns. SSE2 fp to int conversion patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24886 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-20 22:59:51 +00:00
Evan Cheng
aed7c721df Added support for cmp, test, and conditional move instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24756 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:24:02 +00:00
Nate Begeman
6510b22cec Support multiple ValueTypes per RegisterClass, needed for upcoming vector
work.  This change has no effect on generated code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 04:51:06 +00:00
Nate Begeman
14e2cf62f4 Properly split f32 and f64 into separate register classes for scalar sse fp
fixing a bunch of nasty hackery


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23735 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 22:06:00 +00:00
Chris Lattner
ecbce617ca Split RegisterClass 'Methods' into MethodProtos and MethodBodies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22929 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 19:13:20 +00:00
Chris Lattner
03ba7b9f25 Put register classes into namespaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22925 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:51:57 +00:00
Nate Begeman
f63be7d395 First round of support for doing scalar FP using the SSE2 ISA extension and
XMM registers.  There are many known deficiencies and fixmes, which will be
addressed ASAP.  The major benefit of this work is that it will allow the
LLVM register allocator to allocate FP registers across basic blocks.

The x86 backend will still default to x87 style FP.  To enable this work,
you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc.

An example before and after would be for:
double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i)
                        Sum += P[i]; return Sum; }

The inner loop looks like the following:
x87:
.LBB_foo_1:     # no_exit
        fldl (%esp)
        faddl (%eax,%ecx,8)
        fstpl (%esp)
        incl %ecx
        cmpl $1000, %ecx
        #FP_REG_KILL
        jne .LBB_foo_1  # no_exit

SSE2:
        addsd (%eax,%ecx,8), %xmm0
        incl %ecx
        cmpl $1000, %ecx
        #FP_REG_KILL
        jne .LBB_foo_1  # no_exit


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22340 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-06 18:59:04 +00:00
Nate Begeman
f1702ac589 Initial set of .td file changes necessary to get scalar fp in xmm registers
working.  The instruction selector changes will hopefully be coming later
this week once they are debugged.  This is necessary to support the darwin
x86 FP model, and is recommended by intel as the replacement for x87.  As
a bonus, the register allocator knows how to deal with these registers
across basic blocks, unliky the FP stackifier.  This leads to significantly
better codegen in several cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22300 91177308-0d34-0410-b5e6-96231b3b80d8
2005-06-27 21:20:31 +00:00
Chris Lattner
0539313fe5 Minor optimization to allocate R8 registers in a better order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19289 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-05 16:09:16 +00:00
Chris Lattner
45de191b0b Spill/restore X86 floating point stack registers with 64-bits of precision
instead of 80-bits of precision.  This fixes PR467.

This change speeds up fldry on X86 with LLC from 7.32s on apoc to 4.68s.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18433 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-02 18:17:31 +00:00
Alkis Evlogimenos
65cbfa0f37 The real x87 floating point registers should not be allocatable. They
are only used by the stackifier when transforming FPn register
allocations to the real stack file x87 registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16472 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-21 21:22:11 +00:00
Misha Brukman
a2700194ae Fit long lines into 80 cols via creative space elimination
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16353 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-15 01:40:18 +00:00
Chris Lattner
b228657acc Revamp the Register class, and allow the use of the RegisterGroup class to
specify aliases directly in register definitions.

Patch contributed by Jason Eckhardt!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16330 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-14 04:17:02 +00:00
Chris Lattner
47d2f2bb50 Nuke commented out stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16017 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-24 08:18:27 +00:00
Chris Lattner
ff0a6e6aac Switch from bytes to bits for alignment for consistency
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15974 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 20:14:13 +00:00
Chris Lattner
068758e518 give FP stack registers names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15394 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 08:12:13 +00:00
Alkis Evlogimenos
9c22aeb0b2 Improve allocation order:
1) For 8-bit registers try to use first the ones that are parts of the
   same register (AL then AH). This way we only alias 2 16/32-bit
   registers after allocating 4 8-bit variables.

2) Move EBX as the last register to allocate. This will cause less
   spills to happen since we will have 8-bit registers available up to
   register excaustion (assuming we use the allocation order). It
   would be nice if we could push all of the 8-bit aliased registers
   towards the end but we much prefer to keep callee saved register to
   the end to avoid saving them on entry and exit of the function.

For example this gives a slight reduction of spills with linear scan
on 164.gzip.

Before:

11221 asm-printer           - Number of machine instrs printed
  975 spiller               - Number of loads added
  675 spiller               - Number of stores added
  398 spiller               - Number of register spills

After:

11182 asm-printer           - Number of machine instrs printed
  952 spiller               - Number of loads added
  652 spiller               - Number of stores added
  386 spiller               - Number of register spills


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11996 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 09:17:01 +00:00
John Criswell
856ba76200 Added LLVM copyright header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9321 91177308-0d34-0410-b5e6-96231b3b80d8
2003-10-21 15:17:13 +00:00
Misha Brukman
bf2f8a9963 Converted tabs to spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7728 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-11 15:38:50 +00:00
Chris Lattner
69666e552e This register is never used, disable it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7661 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-07 04:49:16 +00:00
Chris Lattner
6770aedf7f Rename register classes to be upper case to make it obvious that they are X86
specific in the tree patterns


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7578 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-04 20:58:29 +00:00
Chris Lattner
c8f4587efd transition to using let instead of set
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7564 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-04 04:59:56 +00:00
Chris Lattner
7af9a38d0f Specify custom name for registers to get the ()'s in the name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7547 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-03 22:12:47 +00:00
Chris Lattner
9eab316528 The RegisterInfo class is obsolete
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7522 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-03 18:18:48 +00:00
Chris Lattner
b76d6fc4d5 Initial checkin of X86 Register File description
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7509 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-03 15:47:25 +00:00