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47 Commits

Author SHA1 Message Date
Devang Patel
afeaae7a94 If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121059 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-06 22:39:26 +00:00
John Thompson
45c21ff044 Inline asm mult-alt constraint tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118107 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 23:01:44 +00:00
Owen Anderson
765fd9c62d CombinerAA is now reordering these stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114354 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 20:56:29 +00:00
Anton Korobeynikov
17458a786e Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1), 
when needed. This fixes PR7001

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102838 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-01 12:52:34 +00:00
Anton Korobeynikov
1b17614a72 Do folding for indirect branches, where possible 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102836 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-01 12:28:21 +00:00
Anton Korobeynikov
69d5b48bc3 Implement indirect branches on MSP430 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102835 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-01 12:04:32 +00:00
Chris Lattner
d2075586c8 add newlines at the end of files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100705 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 22:53:17 +00:00
Dale Johannesen
b39b7e5ebf Split big test into multiple directories to cater to 
those who don't build all targets.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100688 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 20:43:35 +00:00
Anton Korobeynikov
9aff323a07 Do not use '&' prefix for globals when register base field is non-zero, otherwise msp430-as will silently miscompile the code (TI's assembler report an error though). 
This fixes PR6349

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97877 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-06 11:41:12 +00:00
Chris Lattner
d1b7382983 Fix some issues in WalkChainUsers dealing with 
CopyToReg/CopyFromReg/INLINEASM.  These are annoying because
they have the same opcode before an after isel.  Fix this by
setting their NodeID to -1 to indicate that they are selected,
just like what automatically happens when selecting things that
end up being machine nodes.

With that done, give IsLegalToFold a new flag that causes it to
ignore chains.  This lets the HandleMergeInputChains routine be
the one place that validates chains after a match is successful,
enabling the new hotness in chain processing.  This smarter
chain processing eliminates the need for "PreprocessRMW" in the
X86 and MSP430 backends and enables MSP to start matching it's
multiple mem operand instructions more aggressively.

I currently #if out the dead code in the X86 backend and MSP 
backend, I'll remove it for real in a follow-on patch.

The testcase changes are:
  test/CodeGen/X86/sse3.ll: we generate better code
  test/CodeGen/X86/store_op_load_fold2.ll: PreprocessRMW was 
      miscompiling this before, we now generate correct code
      Convert it to filecheck while I'm at it.
  test/CodeGen/MSP430/Inst16mm.ll: Add a testcase for mem/mem
      folding to make anton happy. :)




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97596 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-02 22:20:06 +00:00
Chris Lattner
736a6ea3a2 Change the scheduler from adding nodes in allnodes order 
to adding them in a determinstic order (bottom up from 
the root) based on the structure of the graph itself.

This updates tests for some random changes, interesting
bits: CodeGen/Blackfin/promote-logic.ll no longer crashes.
I have no idea why, but that's good right?

CodeGen/X86/2009-07-16-LoadFoldingBug.ll also fails, but
now compiles to have one fewer constant pool entry, making
the expected load that was being folded disappear.  Since it
is an unreduced mass of gnast, I just removed it.

This fixes PR6370


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97023 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-24 06:11:37 +00:00
Chris Lattner
48eb39b1ab no need to run llvm-as here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96826 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-22 23:34:12 +00:00
Anton Korobeynikov
455080ff10 IT turns out that during jumpless setcc lowering eq and ne were swapped. 
This fixes PR6348

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96734 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-21 12:28:58 +00:00
Anton Korobeynikov
12c71a53b5 Reenable tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93555 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 21:19:26 +00:00
Anton Korobeynikov
8396a17bc3 Temporary disable tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93501 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-15 02:09:27 +00:00
Anton Korobeynikov
74a265686d Add variable-width shifts for MSP430 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93468 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-14 22:09:38 +00:00
Dan Gohman
aceba31b7a Delete useless trailing semicolons. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92740 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-01-05 17:55:26 +00:00
Dale Johannesen
9949933d6e Use more sensible type for flags in asms. PR 5570. 
Patch by Sylve`re Teissier (sorry, ASCII only).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91988 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-23 07:32:51 +00:00
Anton Korobeynikov
a1508f9514 Add testcase for PR5703 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91931 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-22 22:37:23 +00:00
Anton Korobeynikov
8d1ffbd1ad Lower setcc branchless, if this is profitable. 
Based on the patch by Brian Lucas!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91175 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-11 23:01:29 +00:00
Anton Korobeynikov
9aa1ec87b0 Reduce (cmp 0, and_su (foo, bar)) into (bit foo, bar). This saves extra instruction. Patch inspired by Brian Lucas! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90819 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-08 01:03:04 +00:00
Duncan Sands
fb245e2d46 While this test is testing a problem in the generic part of codegen, 
the problem only shows for msp430 and pic16 which is why it specifies
them using -march.  But it is wrong to put such tests in CodeGen/Generic,
since not everyone builds these targets.  Put a copy of the test in each
of the target test directories.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90005 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-27 16:04:14 +00:00
Anton Korobeynikov
f0b47b7f6d Add and-not (bic) patterns. Based heavily on patch by Brian Lucas! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86471 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-08 15:33:12 +00:00
Anton Korobeynikov
52f28e9b63 Fix invalid operand updates & implement post-inc memory operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86466 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-08 14:27:38 +00:00
Anton Korobeynikov
c2fd919ea2 It is invalid to infer the value type from the result #0 of the node 
since the instruction might use the other result of different type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86462 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-08 12:14:54 +00:00
Anton Korobeynikov
6534f83ae8 Add some dummy support for post-incremented loads 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86385 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-07 17:15:06 +00:00
Anton Korobeynikov
8983da729a Add 8 bit libcalls and make use of them for msp430 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86384 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-07 17:14:39 +00:00
Anton Korobeynikov
123ed8f099 Initial support for addrmode handling. Tests by Brian Lucas! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86382 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-11-07 17:13:35 +00:00
Anton Korobeynikov
f32df4ce3e Use special DAG-to-DAG preprocessing to allow mem-mem instructions to be selected. 
Yay for ASCII graphics!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84808 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-22 00:16:00 +00:00
Anton Korobeynikov
a91f4c561e Add DAG printing for RMW stuff debugging 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84776 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-21 19:18:28 +00:00
Anton Korobeynikov
83fceb9481 RMW preprocessing stuff was incorrect. Grab the stuff from x86 backend and disable some tests until it will be clever enough to handle them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84775 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-21 19:17:55 +00:00
Anton Korobeynikov
a3da7c3ca8 Add reg-imm tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84705 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-21 00:11:44 +00:00
Benjamin Kramer
90869455b5 Eliminate some redundant llvm-as calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83837 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-12 09:31:55 +00:00
Anton Korobeynikov
436604d505 Add missed mem-mem move patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83812 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-11 23:03:53 +00:00
Anton Korobeynikov
afac8abfc0 Add MSP430 mem-mem insts support. Patch by Brian Lucas with some my refinements 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83811 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-11 23:03:28 +00:00
Anton Korobeynikov
aca471f3a5 Add bunch of MSP430 'feature' tests. Patch by Brian Lucas with some my refinements 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83809 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-11 23:02:38 +00:00
Anton Korobeynikov
95eb470ce1 Implement 'm' memory operand properly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83785 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-11 19:14:21 +00:00
Anton Korobeynikov
8f8e9f0830 It seems that OR operation does not affect status reg at all. 
Remove impdef of SRW. This fixes PR4779


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83739 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-10-10 22:17:47 +00:00
Anton Korobeynikov
c6f729ed55 Allow symbols to start from the digit if target requests it. This allows, e.g. pinning 
variables to specified absolute address. Make use of this feature for MSP430.
This unbreaks PR4776.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82227 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-18 16:57:42 +00:00
Dan Gohman
fce288fc91 Eliminate more uses of llvm-as and llvm-dis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-09 00:09:15 +00:00
Anton Korobeynikov
cd76128f18 Add dummy inline asm handling for 'r' constraint. This fixes PR4778 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80085 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-26 13:44:29 +00:00
Anton Korobeynikov
379a087cc7 Provide dynamic_stackalloc lowering for MSP430. 
This fixes PR4769

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80001 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 17:00:23 +00:00
Dan Gohman
ae3a0be92e Split the Add, Sub, and Mul instruction opcodes into separate 
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 22:49:04 +00:00
Eli Friedman
2ac8b324eb Fix for PR4235: to build a floating-point value from integer parts, 
build an integer and cast that to a float.  This fixes a crash 
caused by trying to split an f32 into two f16's.

This changes the behavior in test/CodeGen/XCore/fneg.ll because that 
testcase now triggers a DAGCombine which converts the fneg into an integer
operation.  If someone is interested, it's probably possible to tweak 
the test to generate an actual fneg.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72162 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-20 06:02:09 +00:00
Anton Korobeynikov
e4fdb8b8ff Mark rotl/rotr as expand. This generates pretty ugly code, but this is better than nothing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71976 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-17 10:16:28 +00:00
Anton Korobeynikov
aceb620de8 Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71975 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-17 10:15:22 +00:00
Anton Korobeynikov
19f76f5263 Add MSP430 test for PR4136 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71392 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-10 14:48:36 +00:00