Commit Graph

308 Commits

Author SHA1 Message Date
Chad Rosier
127f5edfd9 [ms-inline asm] If we parsed a statement and the opcode is valid, then it's an instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165955 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-15 19:08:18 +00:00
Chad Rosier
ce353b31ae [ms-inline asm] Update the end loc for ParseIntelMemOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165947 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-15 17:26:38 +00:00
Chad Rosier
84125ca43c [ms-inline asm] Remove the MatchInstruction() function. Previously, this was
the interface between the front-end and the MC layer when parsing inline
assembly.  Unfortunately, this is too deep into the parsing stack. Specifically,
we're unable to handle target-independent assembly (i.e., assembly directives,
labels, etc.).  Note the MatchAndEmitInstruction() isn't the correct
abstraction either.  I'll be exposing target-independent hooks shortly, so this
is really just a cleanup.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165858 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-13 00:26:04 +00:00
Chad Rosier
7a2b624bb3 [ms-inline asm] Capitalize per coding standard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165847 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-12 23:09:25 +00:00
Chad Rosier
6e006d3de8 [ms-inline asm] Use the new API introduced in r165830 in lieu of the
MapAndConstraints vector.  Also remove the unused Kind argument.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165833 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-12 22:53:36 +00:00
Chad Rosier
9ba9d4d76b [ms-inline asm] Add a few typedefs to simplify future changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165324 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-05 18:41:14 +00:00
Chad Rosier
5b0f1b3763 [ms-inline asm] Add support for parsing [Intel dialect] memory operands that use
segmented registers.  Test case to come.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165275 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04 23:59:38 +00:00
Chad Rosier
f9e008bf67 Revert 165057, per Jim's request. This requires further discussion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165069 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02 23:38:50 +00:00
Chad Rosier
95707c90cc [ms-inline asm] Add basic support for wildcard MCParsedAsmOperands. This type
of operand is specific to MS-style inline assembly and should not be generated
when parsing normal assembly.

The purpose of the wildcard operands are to allow the AsmParser to match
multiple instructions (i.e., MCInsts) to a given ms-style asm statement.  For
the time being the matcher just returns the first match.  This patch only
implements wildcard matches for memory operands.  Support for register
wildcards will be added in the near future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165057 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02 21:49:07 +00:00
Chad Rosier
22685876ed [ms-inline asm] Add the convertToMapAndConstraints() function that is used to
map constraints and MCInst operands to inline asm operands.  This replaces the
getMCInstOperandNum() function.

The logic to determine the constraints are not in place, so we still default to
a register constraint (i.e., "r"). Also, we no longer build the MCInst but
rather return just the opcode to get the MCInstrDesc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164979 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-01 23:45:51 +00:00
Bob Wilson
a3c3e1f8e2 Consistently specify the assembly variant to MatchInstructionImpl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164611 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-25 17:19:29 +00:00
Chad Rosier
2590c2e1e9 Rather then have a wrapper function, have tblgen instantiate the implementation.
Also remove an unused argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164567 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24 22:57:55 +00:00
Chad Rosier
00796a1b15 Rather then have a wrapper function, have tblgen instantiate the implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164548 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24 19:32:29 +00:00
Chad Rosier
d717a066c6 [ms-inline asm] Expose the mnemonicIsValid() function in the AsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164420 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 22:21:26 +00:00
Chad Rosier
7d4e989da9 Add comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164415 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 21:08:46 +00:00
Chad Rosier
f58ae5dfc1 [ms-inline asm] Make the operand size directives case insensitive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163729 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-12 18:24:26 +00:00
Chad Rosier
66b64bec60 StringSwitchify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163649 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11 21:10:25 +00:00
Chad Rosier
aa645f78a2 Simplify logic. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163648 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11 20:57:04 +00:00
Chad Rosier
3c4ecd7dab [ms-inline asm] Add support for .att_syntax directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163542 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-10 20:54:39 +00:00
Benjamin Kramer
8e70b5506e PR13754: llvm-mc/x86 crashes on .cfi directives without the % prefix for registers.
gas accepts this and it seems to be common enough to be worth supporting. This
doesn't affect the parsing of reg operands outside of .cfi directives.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163390 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07 14:51:35 +00:00
Chad Rosier
5d637d7e93 Fix function name per coding standard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163187 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 01:15:43 +00:00
Chad Rosier
2cc97def74 [ms-inline asm] Asm operands can map to one or more MCOperands. Therefore, add
the NumMCOperands argument to the GetMCInstOperandNum() function that is set
to the number of MCOperands this asm operand mapped to.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03 20:31:23 +00:00
Chad Rosier
038f3e3127 [ms-inline asm] Add an interface to the GetMCInstOperandNum() function in the
MCTargetAsmParser class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03 18:47:45 +00:00
Chad Rosier
c4d2560a20 Removed unused argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163104 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03 03:16:09 +00:00
Chad Rosier
3a86e13962 [ms-inline asm] Expose the Kind and Opcode variables from the
MatchInstructionImpl() function.

These values are used by the ConvertToMCInst() function to index into the
ConversionTable.  The values are also needed to call the GetMCInstOperandNum()
function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163101 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-03 02:06:46 +00:00
Chad Rosier
5d04a560a8 The ConvertToMCInst() function can't fail, so remove the now dead Match_ConversionFail enum.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163002 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-31 16:41:07 +00:00
Chad Rosier
4ee0808d9f Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162807 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-28 23:57:47 +00:00
Chad Rosier
674101e6bb [ms-inline asm] Avoid a false positive assertion
Assertion failed: (Start.isValid() == End.isValid() && "Start and end should 
either both be valid or both be invalid!")

when parsing inline asm.  SMLoc assumes that the first char * in the source is
invalid.  However, when parsing an inline asm the mnemonic is at this location.
I don't want to change SMLoc, so use a trivial workaround.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162381 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22 19:14:29 +00:00
Chad Rosier
b4fdadef51 [ms-inline asm] Do not report a Parser error when matching inline assembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162306 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21 19:36:59 +00:00
Chad Rosier
64bfcbbc58 [ms-inline asm] Expose the ErrorInfo from the MatchInstructionImpl. In general,
this is the index of the operand that failed to match.

Note: This may cause a buildbot failure due to an API mismatch in clang.  Should
recover with my next commit to clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162295 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21 18:14:59 +00:00
Chad Rosier
3246176838 [ms-inline asm] Extend the MC AsmParser API to match MCInsts (but not emit).
This new API will be used by clang to parse ms-style inline asms.

One goal of this project is to use this style of inline asm for targets other
then x86.  Therefore, this API needs to be implemented for non-x86 targets at
some point in the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161624 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-09 22:04:55 +00:00
Craig Topper
76bd9386f1 Remove tab characters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160425 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-18 04:59:16 +00:00
Craig Topper
833d7f8588 Fix typo in error message and remove some tab characters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160423 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-18 04:36:35 +00:00
Craig Topper
75dc33a60b Make x86 asm parser to check for xmm vs ymm for index register in gather instructions. Also fix Intel syntax for gather instructions to use 'DWORD PTR' or 'QWORD PTR' to match gas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160420 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-18 04:11:12 +00:00
Chad Rosier
36b8fed61d Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159300 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27 22:34:28 +00:00
Manman Ren
1f7a1b68a0 X86: add GATHER intrinsics (AVX2) in LLVM
Support the following intrinsics:
llvm.x86.avx2.gather.d.pd, llvm.x86.avx2.gather.q.pd
llvm.x86.avx2.gather.d.pd.256, llvm.x86.avx2.gather.q.pd.256
llvm.x86.avx2.gather.d.ps, llvm.x86.avx2.gather.q.ps
llvm.x86.avx2.gather.d.ps.256, llvm.x86.avx2.gather.q.ps.256

Modified Disassembler to handle VSIB addressing mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159221 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26 19:47:59 +00:00
Craig Topper
9e6ddcb88e Only allow symbolic names for (v)cmpss/sd/ps/pd encodings 8-31 to be used with 'v' version of instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153636 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-29 07:11:23 +00:00
Craig Topper
4e02f23de2 Prune some includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153502 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-27 07:54:11 +00:00
Kevin Enderby
0f5ab7c5f3 Change the X86 assembler to not require a segment register on string
instruction's destination operand like it does for the source operand.
Also fix a typo in the comment for X86AsmParser::isSrcOp().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152654 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-13 19:47:55 +00:00
Kevin Enderby
84faf65912 Added a missing error check for X86 assembly with mismatched base and index
registers not both being 64-bit or both being 32-bit registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152580 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-12 21:32:09 +00:00
Kevin Enderby
58dfaa1465 Add the missing call to Error when a bad X86 scale expression is parsed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152443 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-09 22:24:10 +00:00
Kevin Enderby
b80d571ea8 Updated the llvm-mc disassembler C API to support for the X86 target.
rdar://10873652

As part of this I updated the llvm-mc disassembler C API to always call the
SymbolLookUp call back even if there is no getOpInfo call back.  If there is a
getOpInfo call back that is tried first and then if that gets no information
then the  SymbolLookUp is called.  I also made the code more robust by
memset(3)'ing to zero the LLVMOpInfo1 struct before then setting
SymbolicOp.Value before for the call to getOpInfo.  And also don't use any
values from the  LLVMOpInfo1 struct if getOpInfo returns 0.  And also don't
use any of the ReferenceType or ReferenceName values from SymbolLookUp if it
returns NULL. rdar://10873563 and rdar://10873683

For the X86 target also fixed bugs so the annotations get printed. 

Also fixed a few places in the ARM target that was not producing symbolic
operands for some instructions.  rdar://10878166


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151267 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23 18:18:17 +00:00
Ahmed Charles
b0934ab7d8 Remove dead code. Improve llvm_unreachable text. Simplify some control flow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150918 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-19 11:37:01 +00:00
Devang Patel
0db58bfece Add assembler dialect attribute in asm parser which lets target specific asm parser change dialect on the fly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149396 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-31 18:14:05 +00:00
Devang Patel
885f65b4a1 Intel syntax. Adjust special code, used to recognize cmp<comparison code>{ss,sd,ps,pd}, for intel syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149291 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-30 22:47:12 +00:00
Devang Patel
be3e310d5e Intel syntax. Support .intel_syntax directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149270 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-30 20:02:42 +00:00
Devang Patel
a28101e61a Intel Syntax: Parse mem operand with seg reg. QWORD PTR FS:[320]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149142 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-27 19:48:28 +00:00
Jim Grosbach
cb5dca3815 Keep source location information for X86 MCFixup's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149106 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-27 00:51:27 +00:00
Devang Patel
3b96e1fe3b Intel Syntax: Extend special hand coded logic, to recognize special instructions, for intel syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148864 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 21:43:36 +00:00
Devang Patel
392ad6d8aa Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148751 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-23 23:56:33 +00:00