Commit Graph

56125 Commits

Author SHA1 Message Date
Nadav Rotem c05d30601c Add a new optimization pass: Stack Coloring, that merges disjoint static allocations (allocas). Allocas are known to be
disjoint if they are marked by disjoint lifetime markers (@llvm.lifetime.XXX intrinsics).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163299 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06 09:17:37 +00:00
James Molloy 6c822eea47 Optimize codegen for VSETLNi{8,16,32} operating on Q registers. Degenerate to a VSETLN on D registers, instead of an (INSERT_SUBREG (VSETLN (EXTRACT_SUBREG ))) sequence to help the register coalescer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163298 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06 09:16:01 +00:00
Michael Liao 7859f438e1 Remove duplicated helper function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163295 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06 07:11:22 +00:00
Craig Topper b8d9da13fa Use iPTR instead of i32 for extract_subvector/insert_subvector index in lowering and patterns. This makes it consistent with the incoming DAG nodes from the DAG builder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163293 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06 06:09:01 +00:00
Craig Topper 07149fe715 Add patterns for converting stores of subvector_extracts of lower 128-bits of a 256-bit vector to VMOVAPSmr/VMOVUPSmr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163292 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06 05:15:01 +00:00
NAKAMURA Takumi 2de91673ff Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163289 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06 03:02:56 +00:00
NAKAMURA Takumi 383fb7f026 Unix/Signals.inc: Fix a typo. Thanks to Dani Berg!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163288 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06 03:01:43 +00:00
Jack Carter a7570a3d86 There are some Mips instructions that are lowered by the
assembler such as shifts greater than 32. In the case 
of direct object, the code gen needs to do this lowering 
since the assembler is not involved.

With the advent of the llvm-mc assembler, it also needs 
to do the same lowering.

This patch makes that specific lowering code accessible 
to both the direct object output and the assembler.

This patch does not affect generated output.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163287 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06 02:31:34 +00:00
Jim Grosbach 557a20a234 Update function names to conform to guidelines.
No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163279 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06 00:59:08 +00:00
Jack Carter ad51a4a598 Mips specific llvm assembler support for branch and jump instructions.
Test case included.

Contributer: Vladimir Medic


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163277 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06 00:43:26 +00:00
Jakob Stoklund Olesen f632d80e0c Remove predicated pseudo-instructions.
These pseudos are no longer needed now that it is possible to represent
predicated instructions in SSA form.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163275 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 23:58:04 +00:00
Jakob Stoklund Olesen 098c6a547f Use predication instead of pseudo-opcodes when folding into MOVCC.
Now that it is possible to dynamically tie MachineInstr operands,
predicated instructions are possible in SSA form:

  %vreg3<def> = SUBri %vreg1, -2147483647, pred:14, pred:%noreg, %opt:%noreg
  %vreg4<def,tied1> = MOVCCr %vreg3<tied0>, %vreg1, %pred:12, pred:%CPSR

Becomes a predicated SUBri with a tied imp-use:

  SUBri %vreg1, -2147483647, pred:13, pred:%CPSR, opt:%noreg, %vreg1<imp-use,tied0>

This means that any instruction that is safe to move can be folded into
a MOVCC, and the *CC pseudo-instructions are no longer needed.

The test case changes reflect that Thumb2SizeReduce recognizes the
predicated instructions. It didn't understand the pseudos.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163274 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 23:58:02 +00:00
Chad Rosier 366df7945f [ms-inline asm] Use the asm dialect from the MI to set the parser dialect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163273 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 23:57:37 +00:00
Manman Ren 408853ea16 JumpThreading: when default destination is the destination of some cases in a
switch, make sure we include the value for the cases when calculating edge
value from switch to the default destination.

rdar://12241132


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163270 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 23:45:58 +00:00
Jack Carter ec65be84cd Mips specific llvm assembler support for ALU instructions. This includes
register support. Test case included.

Contributer: Vladimir Medic


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163268 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 23:34:03 +00:00
Chad Rosier 2f1d815479 Cleanup a few magic numbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163263 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 22:40:13 +00:00
Roman Divacky 5932429765 Stop casting away const qualifier needlessly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163258 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 22:26:57 +00:00
Chad Rosier 77fffa6fdd [ms-inline asm] We only need one bit to represent the AsmDialect in the
MachineInstr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163257 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 22:17:43 +00:00
Roman Divacky 2943e37804 Constify this properly. Found by gcc48 -Wcast-qual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163256 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 22:15:49 +00:00
Roman Divacky 651e800def Mark checkSignature const, and in turn stop casting away const from
ArchiveMemberHeader. Found by gcc48 -Wcast-qual.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163255 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 22:09:23 +00:00
Roman Divacky 141e99745a Constify SDNodeIterator an stop its only non-const user being cast stripped
of its constness. Found by gcc48 -Wcast-qual.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163254 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 22:03:34 +00:00
Roman Divacky 98eb98b0f2 Constify subtarget info properly so that we dont cast away the const in
the SubtargetInfoKV tables. Found by gcc48 -Wcast-qual.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163251 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 21:43:57 +00:00
Roman Divacky b438615abd Use const properly so that we dont remove const qualifier from region and MII
by casting. Found with gcc48.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163247 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 21:17:34 +00:00
Chad Rosier 576cd11ab8 [ms-inline asm] Propagate the asm dialect into the MachineInstr representation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163243 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 21:00:58 +00:00
Hal Finkel c10d5e9dae Move the PPC TOC defs into the PPC64 InstrInfo file.
Since TOC is just defined for PPC64, move its definition to PPC64 td file.

Patch by Adhemerval Zanella.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163234 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 19:22:27 +00:00
Chad Rosier 581600bfc3 [ms-inline asm] Enumerate the InlineAsm dialects and rename the nsdialect to
inteldialect.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163231 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 19:00:49 +00:00
Tim Northover 7bebddf55e Strip old MachineInstrs *after* we know we can put them back.
Previous patch accidentally decided it couldn't convert a VFP to a
NEON instruction after it had already destroyed the old one. Not a
good move.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163230 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 18:37:53 +00:00
Roman Divacky 15d0c81b24 Remove unused typedefs gcc4.8 warns about.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163225 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 17:55:46 +00:00
Jim Grosbach 35ed842773 MCJIT: getPointerToFunction() references target address space.
Make sure to return a pointer into the target memory, not the local memory.
Often they are the same, but we can't assume that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163217 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 16:50:40 +00:00
Benjamin Kramer 998d3cca29 Switch BasicAliasAnalysis' cache to SmallDenseMap.
It relies on clear() being fast and the cache rarely has more than 1 or 2
elements, so give it an inline capacity and always shrink it back down in case
it grows. DenseMap will grow to 64 buckets which makes clear() a lot slower.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163215 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 16:49:37 +00:00
Pranav Bhandarkar 4c3d3ecdf8 LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the
subreg_hireg of register pair Rp.

	* lib/Target/Hexagon/HexagonPeephole.cpp(PeepholeDoubleRegsMap): New
	 DenseMap similar to PeepholeMap that additionally records subreg info
	 too.
        (runOnMachineFunction): Record information in PeepholeDoubleRegsMap
        and copy propagate the high sub-reg of Rp0 in Rp1 = lsr(Rp0, #32) to
	the instruction Rx = COPY Rp1:logreg_subreg.
	* test/CodeGen/Hexagon/remove_lsr.ll: New test.
	



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163214 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 16:01:40 +00:00
Kostya Serebryany 7dadac65d3 [asan] fix lint
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163205 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 09:00:18 +00:00
Silviu Baranga 3d5e161fe4 Fixed the DAG combiner to better handle the folding of AND nodes for vector types. The previous code was making the assumption that the length of the bitmask returned by isConstantSplat was equal to the size of the vector type. Now we first make sure that the splat value has at least the length of the vector lane type, then we only use as many fields as we have available in the splat value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163203 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 08:57:21 +00:00
Kostya Serebryany 59a4a47a7b [asan] extend the blacklist functionality to handle global-init. Patch by Reid Watson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163199 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 07:29:56 +00:00
Craig Topper 4e4e6c0d73 Remove some of the patterns added in r163196. Increasing the complexity on insert_subvector into undef accomplishes the same thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163198 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 07:26:35 +00:00
Craig Topper c17177f893 Add patterns for integer forms of VINSERTF128/VINSERTI128 folded with loads. Also add patterns to turn subvector inserts with loads to index 0 of an undef into VMOVAPS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163196 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 06:58:39 +00:00
Chad Rosier 27b25c2076 Add a FIXME that assumes we maintain backward compatibility until the next major release.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163195 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 06:28:52 +00:00
Logan Chien ec90cc8b0f Reorder the comments of EmitExceptionTable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163194 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 06:28:26 +00:00
Logan Chien fd91d8dd7e Fix UseInitArray option for MIPS target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163193 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 06:17:17 +00:00
Craig Topper f6dc792df1 Convert vextracti128/vextractf128 intrinsics to extract_subvector at DAG build time. Similar was previously done for vinserti128/vinsertf128. Add patterns for folding these extract_subvectors with stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163192 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 05:48:09 +00:00
Richard Smith a89fb0f170 Remove redundant semicolons to fix -pedantic-errors build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163190 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 01:41:37 +00:00
Chad Rosier 5d637d7e93 Fix function name per coding standard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163187 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 01:15:43 +00:00
Chad Rosier f16ae58891 [ms-inline asm] Add support for the nsdialect keyword in the Bitcode
Reader/Writer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163185 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 00:56:20 +00:00
Chad Rosier 71f359a876 [ms-inline asm] Add the nsdialect keyword to the lexer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163184 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 00:51:02 +00:00
Chad Rosier 36547343ab [ms-inline asm] Emit the (new) inline asm Non-Standard Dialect attribute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163181 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 00:08:17 +00:00
Dan Gohman 230768bd13 Make provenance checking conservative in cases when
pointers-to-strong-pointers may be in play. These can lead to retains and
releases happening in unstructured ways, foiling the optimizer. This fixes
rdar://12150909.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163180 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 23:16:20 +00:00
Jakub Staszak be11991208 BypassSlowDivision: Assign to reference, don't copy the object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163179 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 23:11:11 +00:00
Jakob Stoklund Olesen f363ebdb03 Search the whole instruction for tied operands.
Implicit uses can be dynamically tied to defs. This will soon be used
for predicated instructions on ARM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163177 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 22:59:30 +00:00
Chad Rosier 03fe8f6ab6 [ms-inline asm] Add the inline assembly dialect, AsmDialect, to the InlineAsm
class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163175 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 22:46:24 +00:00
Chad Rosier 4e2132e7ae [ms-inline asm] Remove the Inline Asm Non-Standard Dialect attribute. This
implementation does not co-exist well with how the sideeffect and alignstack
attributes are handled.  The reverts r161641.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163174 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-04 22:29:45 +00:00