Commit Graph

84384 Commits

Author SHA1 Message Date
Benjamin Kramer
c279ecd23c Remove overly conservative hasOneUse check, this always expands into a single IR instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162175 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 20:24:19 +00:00
Benjamin Kramer
00abcd3da0 InstCombine: Add a couple of fabs identities for comparing with 0.0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162174 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 20:06:47 +00:00
Benjamin Kramer
2b74957106 SimplifyLibcalls: Add fabs and trunc to the list of libcalls that are safe to shrink from double to float.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162173 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 19:27:32 +00:00
Nadav Rotem
b9d6b8449d Reapply r162160 with a fix: Optimize Arith->Trunc->SETCC sequence to allow better compare/branch code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162172 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 17:53:03 +00:00
Anton Korobeynikov
6d655a50f9 fp16-to-fp32 conversion instructions are available in Thumb mode as well.
Make sure the generic pattern is used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162170 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 13:08:43 +00:00
Craig Topper
acaaa6fae6 Refactor code a bit to reduce number of calls in the final compiled code. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162166 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 06:39:34 +00:00
Craig Topper
8188955b2b Reorder initialization list to silence -Wreorder
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162165 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 06:20:54 +00:00
Nadav Rotem
d5c66a0b1f Revert r162160 because it made a few buildbots fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162164 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 05:02:36 +00:00
Nadav Rotem
b5838689c6 The X86 backend has a number of optimizations for SETCC nodes which use
arithmetic instructions. However, when small data types are used, a truncate
node appears between the SETCC node and the arithmetic operation. This patch
adds support for this pattern.

Before:
  xorl  %esi, %edi
  testb %dil, %dil
  setne %al
  ret

After:
  xorb  %dil, %sil
  setne %al
  ret

rdar://12081007



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162160 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-18 02:43:28 +00:00
Eli Friedman
fd45fa1503 Make atomic load and store of pointers work. Tighten verification of atomic operations
so other unexpected operations don't slip through.  Based on patch by Logan Chien.
PR11786/PR13186.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162146 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 23:24:29 +00:00
Richard Smith
1cec7a05ee Fix undefined behavior (binding a reference to a dereferenced null pointer) if
SSAUpdater was created and destroyed without being initialized.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162137 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 21:42:44 +00:00
Akira Hatanaka
3028d38f6e Add MipsELFWriterInfo.{h,cpp}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162136 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 21:38:47 +00:00
Akira Hatanaka
b889e0cd2f Correct MCJIT functionality for MIPS32 architecture.
No new tests are added.
All tests in ExecutionEngine/MCJIT that have been failing pass after this patch
is applied (when "make check" is done on a mips board). 

Patch by Petar Jovanovic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162135 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 21:28:04 +00:00
Bill Wendling
a67eda76c0 Implement stack protectors for structures with character arrays in them.
<rdar://problem/10545247>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 20:59:56 +00:00
Jakob Stoklund Olesen
a7fb3f6804 Avoid folding ADD instructions with FI operands.
PEI can't handle the pseudo-instructions. This can be removed when the
pseudo-instructions are replaced by normal predicated instructions.

Fixes PR13628.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162130 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 20:55:34 +00:00
Akira Hatanaka
72e9b6aeb4 Add stub methods for mips assembly matcher.
Patch by Vladimir Medic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 20:16:42 +00:00
Benjamin Kramer
168843c013 MemoryBuiltins: Properly guard ObjectSizeOffsetVisitor against cycles in the IR.
The previous fix only checked for simple cycles, use a set to catch longer
cycles too.

Drop the broken check from the ObjectSizeOffsetEvaluator. The BoundsChecking
pass doesn't have to deal with invalid IR like InstCombine does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162120 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 19:26:41 +00:00
Bill Wendling
32811bef95 Change the linker_private_weak_def_auto' linkage to linkonce_odr_auto_hide' to
make it more consistent with its intended semantics.

The `linker_private_weak_def_auto' linkage type was meant to automatically hide
globals which never had their addresses taken. It has nothing to do with the
`linker_private' linkage type, which outputs the symbols with a `l' (ell) prefix
among other things.

The intended semantic is more like the `linkonce_odr' linkage type.

Change the name of the linkage type to `linkonce_odr_auto_hide'. And therefore
changing the semantics so that it produces the correct output for the linker.

Note: The old linkage name `linker_private_weak_def_auto' will still parse but
is not a synonym for `linkonce_odr_auto_hide'. This should be removed in 4.0.
<rdar://problem/11754934>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162114 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 18:33:14 +00:00
Rafael Espindola
d5118c8f78 Assert that dominates is not given a multiple edge. Finding out if we have
multiple edges between two blocks is linear. If the caller is iterating all
edges leaving a BB that would be a square time algorithm. It is more efficient
to have the callers handle that case.

Currently the only callers are:
* GVN: already avoids the multiple edge case.
* Verifier: could only hit this assert when looking at an invalid invoke. Since
it already rejects the invoke, just avoid computing the dominance for it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162113 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 18:21:28 +00:00
Jakob Stoklund Olesen
1f1ab3e9c4 Add comment, clean up code. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162107 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 16:59:09 +00:00
Benjamin Kramer
b97cebdfcc TargetLowering: Use the large shift amount during legalize types. The legalizer may call us with an overly large type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162101 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 15:54:21 +00:00
Jakob Stoklund Olesen
cabc0699ea Use standard pattern for iterate+erase.
Increment the MBB iterator at the top of the loop to properly handle the
current (and previous) instructions getting erased.

This fixes PR13625.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162099 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 14:38:59 +00:00
Benjamin Kramer
823573a381 Guard MemoryBuiltins against self-looping GEPs, which can occur in unreachable code due to constant propagation.
Fixes PR13621.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162098 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 14:16:37 +00:00
Benjamin Kramer
4e81d40545 Fix broken check lines.
I really need to find a way to automate this, but I can't come up with a regex
that has no false positives while handling tricky cases like custom check
prefixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162097 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 12:28:26 +00:00
Tim Northover
3c8ad92455 Implement NEON domain switching for scalar <-> S-register vmovs on ARM
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162094 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 11:32:52 +00:00
Jin-Gu Kang
734fd27647 Insertion of NoFolder functions to avoid ambiguous overload warnings or errors about whether to convert Idx to ArrayRef<Constant *> or ArrayRef<Value *> like ConstantFolder and TargetFolder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162090 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 08:54:57 +00:00
Craig Topper
63a99ff53a Use nested switch to select arguments to reduce calls to EmitPCMP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162089 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 07:15:56 +00:00
Craig Topper
c087870c47 Make ReplaceATOMIC_BINARY_64 a static function. Use a nested switch to reduce to only a single call to it thus allowing it to be inlined by the compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162088 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 06:55:11 +00:00
Pranav Bhandarkar
3ec64468b0 Test commit.
include/llvm/IntrinsicsHexagon.td: Hexagon_Intrinsic is the base class
for all Hexagon intrinsics and not altivec intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162087 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 06:36:26 +00:00
Craig Topper
960fb74370 Remove unnecessary include of ARMGenInstrInfo.inc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162086 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 06:21:09 +00:00
Craig Topper
8cd9eaef01 Declare some for loop indices inside the for loop statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162085 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 05:42:16 +00:00
Craig Topper
c056483fc6 Fix up indentation of outputted decode function for readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162082 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 05:16:15 +00:00
NAKAMURA Takumi
c797f2e9c7 lit: Show actually created count of threads. The incorrect threads count is printed if the number of tests are less than the number of default threads.
Thanks to Vinson Lee, reported in PR13620.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162078 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 04:15:41 +00:00
Chandler Carruth
cbeb8d9869 Flatten the aligned-char-array utility template to be a directly
templated union at the request of Richard Smith. This makes it
substantially easier to type. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162072 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 01:47:25 +00:00
Jakob Stoklund Olesen
083b48af14 Add ADD and SUB to the predicable ARM instructions.
It is not my plan to duplicate the entire ARM instruction set with
predicated versions. We need a way of representing predicated
instructions in SSA form without requiring a separate opcode.

Then the pseudo-instructions can go away.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162061 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 23:21:55 +00:00
Jakob Stoklund Olesen
053b5b0b3c Handle ARM MOVCC optimization in PeepholeOptimizer.
Use the target independent select analysis hooks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162060 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 23:14:20 +00:00
Jakob Stoklund Olesen
f2c64ef519 Add an MCID::Select flag and TII hooks for optimizing selects.
Select instructions pick one of two virtual registers based on a
condition, like x86 cmov. On targets like ARM that support predication,
selects can sometimes be eliminated by predicating the instruction
defining one of the operands.

Teach PeepholeOptimizer to recognize select instructions, and ask the
target to optimize them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162059 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 23:11:47 +00:00
Roman Divacky
05b2bc8781 Revert r162034, r162035 and r162037.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162039 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 19:07:59 +00:00
Roman Divacky
e88d17de99 Define and handle additional fixup kinds. By Adhemerval Zanella.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162037 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 18:37:52 +00:00
Roman Divacky
dd4b9f3fe9 Add PPC64 relocations definitions, by Adhemerval Zanella.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162035 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 18:31:29 +00:00
Roman Divacky
745d94d29f Handle PowerPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162034 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 18:30:03 +00:00
Roman Divacky
0016f73ae5 Fix typo and grammar. By Adhemerval Zanella.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162032 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 18:19:29 +00:00
Rafael Espindola
0513059726 Teach GVN to reason about edges dominating uses. This allows it to handle cases
where some fact lake a=b dominates a use in a phi, but doesn't dominate the
basic block itself.

This feature could also be implemented by splitting critical edges, but at least
with the current algorithm reasoning about the dominance directly is faster.

The time for running "opt -O2" in the testcase in pr10584 is 1.003 times slower
and on gcc as a single file it is 1.0007 times faster.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162023 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 15:09:43 +00:00
Nadav Rotem
52b7ec68d2 Add dump/dumpr methods to SDValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162014 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 07:39:52 +00:00
Jush Lu
2ff4e9d5af [arm-fast-isel] Add support for fastcc.
Without fastcc support, the caller just falls through to CallingConv::C
for fastcc, but callee still uses fastcc, this inconsistency of calling
convention is a problem, and fastcc support can fix it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162013 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 05:15:53 +00:00
Anitha Boyapati
9418f17652 Patch to enable FMA on bdver2 target. Make XOP feature enable FMA4 as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162012 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 04:04:02 +00:00
Anitha Boyapati
2e7a01cb42 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162010 91177308-0d34-0410-b5e6-96231b3b80d8 2012-08-16 03:50:04 +00:00
Akira Hatanaka
a75e1a4d36 Test case for r162008.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162009 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 03:48:41 +00:00
Akira Hatanaka
bb2e1b581a Add Android ABI to Mips backend to handle functions returning vectors of four
floats.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162008 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 03:48:05 +00:00
Victor Oliveira
385401a325 bug in experimental targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161995 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15 22:35:36 +00:00