Commit Graph

108733 Commits

Author SHA1 Message Date
Bill Schmidt
c307b3034a [PPC64] VSX indexed-form loads use wrong instruction format
The VSX instruction definitions for lxsdx, lxvd2x, lxvdsx, and lxvw4x
incorrectly use the XForm_1 instruction format, rather than the
XX1Form instruction format.  This is likely a pasto when creating
these instructions, which were based on lvx and so forth.  This patch
uses the correct format.

The existing reformatting test (test/MC/PowerPC/vsx.s) missed this
because the two formats differ only in that XX1Form has an extension
to the target register field in bit 31.  The tests for these
instructions used a target register of 7, so the default of 0 in bit
31 for XForm_1 didn't expose a problem.  For register numbers 32-63
this would be noticeable.  I've changed the test to use higher
register numbers to verify my change is effective.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219416 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 17:51:35 +00:00
David Blaikie
12a37fc6e0 Sink DwarfDebug::constructLexicalScopeDIE into DwarfCompileUnit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219414 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 17:08:42 +00:00
David Blaikie
44524f4e77 Missing reformatting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219413 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 17:08:38 +00:00
David Blaikie
3fcb9f3ea5 Sink DwarfDebug::constructInlinedScopeDIE into DwarfCompileUnit
This introduces access to the AbstractSPDies map from DwarfDebug so
DwarfCompileUnit can access it. Eventually this'll sink down to
DwarfFile, but it'll still be generically accessible - not much
encapsulation to provide it. (constructInlinedScopeDIE could stay
further up, in DwarfFile to avoid exposing this - but I don't think
that's particularly better)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219411 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 16:50:53 +00:00
Andrea Di Biagio
c53401ee91 [InstCombine] Fix wrong folding of constant comparisons involving ashr and negative values.
This patch fixes a bug in method InstCombiner::FoldCmpCstShrCst where we
wrongly computed the distance between the highest bits set of two negative
values.

This fixes PR21222.

Differential Revision: http://reviews.llvm.org/D5700


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219406 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 12:41:49 +00:00
Kevin Qin
f73400a864 [AArch64] Enable partial & runtime unrolling on cortex-a57.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219401 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 10:13:27 +00:00
David Majnemer
06f1f357e3 Object, COFF: Move the VirtualSize/SizeOfRawData logic to getSectionSize
While getSectionContents was updated to do the right thing,
getSectionSize wasn't.  Move the logic to getSectionSize and leverage it
from getSectionContents.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219391 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 08:42:31 +00:00
Robert Khasanov
340b5b9ad7 [AVX512] Extended avx512_binop_rm for AVX512VL subsets.
Added avx512_binop_rm_vl multiclass for VL subset
Added encoding tests



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219390 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 08:38:48 +00:00
David Majnemer
5b1b9844e7 Object, COFF: Cap the section contents to min(VirtualSize, SizeOfRawData)
It is not useful to return the data beyond VirtualSize it's less than
SizeOfRawData.

An implementation detail of COFF requires the section size to be rounded
up to a multiple of FileAlignment; this means that SizeOfRawData is not
representative of how large the section is.  Instead, we should cap it
to VirtualSize when this occurs as it represents the true size of the
section.

Note that this is only relevant in executable files because this
rounding doesn't occur in object files (and VirtualSize is always zero).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219388 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 07:49:28 +00:00
Eric Christopher
d9b7ba1506 Remove more calls to getSubtargetImpl from the schedulers and
remove cached or unnecessary TargetMachines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219387 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 06:28:06 +00:00
Bob Wilson
8e673570b9 Use triple's isiOS() and isOSDarwin() methods.
These methods are already used in lots of places. This makes things more
consistent. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219386 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 05:43:30 +00:00
Rui Ueyama
f02f03c21a Object: Add range iterators for COFF import/export table
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219383 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 02:16:38 +00:00
Eric Christopher
e6d97094b7 Remove unused argument to CreateTargetScheduleState and change
the TargetMachine to a TargetSubtargetInfo since everything
we wanted is off of that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219382 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 01:59:35 +00:00
Eric Christopher
939dd38a09 Remove uses of getSubtargetImpl from ResourcePriorityQueue and
replace them with calls off of the MachineFuncton.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219381 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 01:59:31 +00:00
Eric Christopher
b78fd035a2 Remove the uses of getSubtargetImpl from InstrEmitter and remove
the now unused TargetMachine variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219379 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 01:35:29 +00:00
Eric Christopher
05597e9fa3 Use the subtarget on the dag to get TargetFrameLowering rather
than off the target machine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219378 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 01:35:27 +00:00
Eric Christopher
31c9cd065a Remove uses of the TargetMachine from FunctionLoweringInfo
via caching TargetLowering and using the MachineFunction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219375 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 00:57:31 +00:00
David Blaikie
7ed0e6d0c6 Push DwarfDebug::attachRangesOrLowHighPC down into DwarfCompileUnit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219372 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 00:21:42 +00:00
David Blaikie
cbb705d900 Sink DwarfDebug::addScopeRangeList down into DwarfCompileUnit
(& add a few accessors/make a couple of things public for this - it's a
bit of a toss-up, but I think I prefer it this way, keeping some more of
the meaty code down in DwarfCompileUnit - if only to make for smaller
implementation files, etc)

I think we could simplify range handling a bit if we removed the range
lists from each unit and just put a single range list on DwarfDebug,
similar to address pooling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219370 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-09 00:11:39 +00:00
Eric Christopher
6aaac28658 Remove unnecessary include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219368 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 23:38:40 +00:00
Eric Christopher
f6d028047f Use both the cached TLI and the subtarget off of the DAG in
the DAG combiner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219367 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 23:38:39 +00:00
Eric Christopher
5d61941de0 Remove getSubtargetImpl calls from FastISel, we can get it from
the MachineFunction where it's already cached.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219366 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 23:38:33 +00:00
Robin Morisset
38a670a611 Fix typo in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219365 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 23:30:45 +00:00
David Blaikie
e988932602 Sink DwarfUnit::addSectionDelta into DwarfCompileUnit, the only place it's needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219364 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 23:30:05 +00:00
Adam Nemet
8088af2547 [AVX512] Rename AVX512_masking* to AVX512_maskable*
No functional change.

This is the current AVX512_maskable multiclass hierarchy:

                 maskable_custom
                    /       \
                   /         \
          maskable_common   maskable_in_asm
            /         \
           /           \
      maskable        maskable_3src

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219363 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 23:25:39 +00:00
Adam Nemet
fbd0e464dd [AVX512] Intrinsics for vextract*x4
This adds the Pat<>'s for the intrinsics.  These are necessary because we
don't lower these intrinsics to SDNodes but match them directly.  See the
rational in the previous commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219362 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 23:25:37 +00:00
Adam Nemet
e868005a27 [AVX512] Add asm-only support for vextract*x4 masking variants
These derive from the new asm-only masking definitions.

Unfortunately I wasn't able to find a ISel pattern that we could legally
generate for the masking variants.  The problem is that since the destination
is v4* we would need VK4 register classes and v4i1 value types to express the
masking.  These are however not legal types/classes in AVX512f but only in VL,
so things get complicated pretty quickly.  We can revisit this question later
if we have a more pressing need to express something like this.

So the ISel patterns are empty for the masking instructions and the next patch
will add Pat<>s instead to match the intrinsics calls with instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219361 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 23:25:33 +00:00
Adam Nemet
9d0ec9212b [AVX512] Move DAG for all-zero node to X86VectorVTInfo
No functional change.

No change in X86.td.expanded except for the appearance of the new attributes.

The new attributes will be used in the subsequent patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219360 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 23:25:31 +00:00
Adam Nemet
74459cbc37 [AVX512] Support mask register in MRMDestReg format
This is necessary for masking vextract*x4.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219359 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 23:25:29 +00:00
Adam Nemet
6feb834941 [AVX512] Peel off an asm-only class from AVX512_masking_common.
No functional change.

This enables the generation of masking instructions that don't provide a
ISel pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219358 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 23:25:23 +00:00
Robin Morisset
b79d91ca1c [X86] Don't transform atomic-load-add into an inc/dec when inc/dec is slow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219357 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 23:16:23 +00:00
David Blaikie
f616a4ba06 Reformat some stuff I missed in recent previous commits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219356 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 23:09:42 +00:00
Alexey Samsonov
aa486d0764 Revert r219354. It seems to break some buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219355 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 23:07:59 +00:00
Alexey Samsonov
ee3948fdbe Use llvm-symbolizer to symbolize LLVM/Clang crash dumps.
This change modifies fatal signal handler used in LLVM tools.
Now it attempts to find llvm-symbolizer binary and communicates
with it in order to turn instruction addresses into
function/file/line info entries. This should significantly improve
stack traces readability in Debug builds.

This feature only works on selected platforms (including Darwin
and Linux). If the symbolization fails for some reason, signal
handler will fallback to the original behavior.

Reviewed in http://reviews.llvm.org/D5610


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219354 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 22:57:47 +00:00
David Blaikie
46e29705c6 Sink and coalesce DwarfDebug.cpp::addSectionLabel and DwarfUnit::addSectionLabel down into DwarfCompileUnit::addSectionLabel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219351 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 22:46:27 +00:00
Eric Christopher
50822e618c Remove dead call to getTypeToTransformTo. The result is
unused.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219347 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 22:25:45 +00:00
David Blaikie
3e9c8c557b DebugInfo: The rest of pushing DwarfDebug::constructScopeDIE down into DwarfCompileUnit
Funnily enough, I copied it, but didn't actually remove the original in
r219345. Let's do that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219346 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 22:23:10 +00:00
David Blaikie
3f2f9695c5 Push DwarfDebug::constructScopeDIE down into DwarfCompileUnit
One of many steps to generalize subprogram emission to both the DWO and
non-DWO sections (to emit -gmlt-like data under fission). Once the
functions are pushed down into DwarfCompileUnit some of the data
structures will be pushed at least into DwarfFile so that they can be
unique per-file, allowing emission to both files independently.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219345 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 22:20:02 +00:00
Eric Christopher
b05e2be02c Remove a bunch of getSubtargetImpl calls since we already have
a cached TLI instance.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219342 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 21:08:32 +00:00
Robin Morisset
48dfa127d7 [X86] Avoid generating inc/dec when slow for x.atomic_store(1 + x.atomic_load())
Summary:
I had forgotten to check for NotSlowIncDec in the patterns that can generate
inc/dec for the above pattern (added in D4796).
This currently applies to Atom Silvermont, KNL and SKX.

Test Plan: New checks on atomic_mi.ll

Reviewers: jfb, nadav

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5677

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219336 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 19:38:18 +00:00
David Majnemer
b5b306e6a9 Inliner: Non-local functions in COMDATs shouldn't be dropped
A function with discardable linkage cannot be discarded if its a member
of a COMDAT group without considering all the other COMDAT members as
well.  This sort of thing is already handled by GlobalOpt/GlobalDCE.

This fixes PR21206.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219335 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 19:32:32 +00:00
Timur Iskhodzhanov
0a5843e3b1 Fix COFF section index relocation should be 16 bits, not 32
Original patch by Andrey Guskov!
http://reviews.llvm.org/D5651



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219327 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 18:01:49 +00:00
Rafael Espindola
8e5fbd755f Correctly compute the size of common symbols in COFF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219324 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 17:37:19 +00:00
Rafael Espindola
c5dc4aa8ad Print symbol sizes in this test in preparation for fixing COFF common sizes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219320 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 17:19:42 +00:00
Justin Bogner
41c4eb79d8 Revert "[InstCombine] re-commit r218721 with fix for pr21199"
This seems to cause a miscompile when building clang, which causes a
bootstrapped clang to fail or crash in several of its tests.

See:
  http://lab.llvm.org:8013/builders/clang-x86_64-darwin11-RA/builds/1184
  http://bb.pgr.jp/builders/clang-3stage-x86_64-linux/builds/7813

This reverts commit r219282.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219317 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 16:30:22 +00:00
Robert Khasanov
0e3754615e [AVX512] Added intrinsics for 128-, 256- and 512-bit versions of VPCMP/VPCMPU{BWDQ}
Added CMP_MASK_CC intrinsic type.
Added tests for intrinsics.

Patch by Sergey Lisitsyn <sergey.lisitsyn@intel.com>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219316 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 15:49:26 +00:00
Rafael Espindola
8175be535a Remove bogus std::error_code returns form SectionRef.
There are two methods in SectionRef that can fail:

* getName: The index into the string table can be invalid.
* getContents: The section might point to invalid contents.

Every other method will always succeed and returning and std::error_code just
complicates the code. For example, a section can have an invalid alignment,
but if we are able to get to the section structure at all and create a
SectionRef, we will always be able to read that invalid alignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219314 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 15:28:58 +00:00
Rafael Espindola
1a98f792a5 Fix indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219312 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 15:12:20 +00:00
Frederic Riss
6c54948916 Update dwarf::ApplePropertyAttributes enum to meaningful values.
Summary:
We currently emit an DW_AT_APPLE_property_attribute with a value that is a
bitfield describing the various attributes applied to an ObjectiveC property.
While trying to add testing to one of my dwarfdump patches that would pretty
print that, I realized this information looks totally broken and has maybe
never been correct.

As with every DWARF info, we have some enum in Dwarf.h that describes this
attribute (enum ApplePropertyAttributes). It seems however that the attribute
value is set from another definition of these flags in Sema/DeclSpec.h (enum
ObjCPropertyAttributeKind). And these 2 enums aren't in sync.

This patch updates the Dwarf.h values to the ones we are (and have been for
a very long time) emitting. We change some publicly (and even documented
in SourceLevelDebugging.rst) values, but I doubt this could be an issue as
the information has been wrong for so long...

Reviewers: echristo, dblaikie, aprantl

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5653

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219311 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 14:59:44 +00:00
Robert Khasanov
e659ba92c8 [AVX512] Refactoring of avx512_binop_rm multiclass through AVX512_masking.
Added new argrument for AVX512_masking: InstrItinClass and bit isCommutable.
No functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219310 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-08 14:37:45 +00:00