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c886c460e4
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4718 Commits

Author SHA1 Message Date
Evan Cheng
c886c460e4 This is possible: 
vr1 = extract_subreg vr2, 3
...
vr3 = extract_subreg vr1, 2
The end result is vr3 is equal to vr2 with subidx 2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47592 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 08:03:41 +00:00
Chris Lattner
0254e7033a Fix isNegatibleForFree to not return true for ConstantFP nodes 
after legalize.  Just because a constant is legal (e.g. 0.0 in SSE) 
doesn't mean that its negated value is legal (-0.0).  We could make
this stronger by checking to see if the negated constant is actually
legal post negation, but it doesn't seem like a big deal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47591 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 07:04:54 +00:00
Evan Cheng
5c80760fdf Refactor inline asm constraint matching code out of SDIsel into TargetLowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47587 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 02:33:44 +00:00
Dan Gohman
f6283fd27b Make some static variables const. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47566 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-25 21:39:34 +00:00
Dan Gohman
2e68b6f52d Convert MaskedValueIsZero and all its users to use APInt. Also add 
a SignBitIsZero function to simplify a common use case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47561 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-25 21:11:39 +00:00
Evan Cheng
e83a27516c All remat'ed loads cannot be folded into two-address code. Not just argument loads. This change doesn't really have any impact on codegen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47557 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-25 19:24:01 +00:00
Duncan Sands
1a9c9df1db In debug builds check that the key property holds: all 
result and operand types are legal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47546 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-25 16:21:21 +00:00
Evan Cheng
79a0c1e46c Correctly determine whether a argument load can be folded into its uses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47545 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-25 08:50:41 +00:00
Duncan Sands
14fd63cae8 Add support to LegalizeTypes for building legal vectors 
out of illegal elements (BUILD_VECTOR).  Uses and beefs
up BUILD_PAIR, though it didn't really have to.  Like
most of LegalizeTypes, does not support soft-float.
This cures all "make check" vector building failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47537 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-24 07:36:03 +00:00
Bill Wendling
181eb737b2 Some platforms use the same name for 32-bit and 64-bit registers (like 
%r3 on PPC) in their ASM files. However, it's hard for humans to read
during debugging. Adding a new field to the register data that lets you
specify a different name to be printed than the one that goes into the
ASM file -- %x3 instead of %r3, for instance.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47534 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-24 00:56:13 +00:00
Evan Cheng
249ded3fa8 Rematerialization logic was overly conservative when it comes to loads from fixed stack slots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47529 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 03:38:34 +00:00
Evan Cheng
298bbe82cb If remating a machine instr with virtual register operand, make sure the vr is avaliable at all uses regardless of whether it would be folded. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47526 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 02:14:42 +00:00
Evan Cheng
dd3465eed1 Recognize loads of arguments as re-materializable first. Therefore if isReallyTriviallyReMaterializable() returns true it doesn't confuse it as a "normal" re-materializable instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47520 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 01:44:27 +00:00
Evan Cheng
313d4b8093 Fix spill weight updating bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47507 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 00:33:04 +00:00
Evan Cheng
672e550601 Same isPhysRegAvailable bug as local register allocator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47500 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 20:31:32 +00:00
Evan Cheng
bcfa1ca976 Really really bad local register allocator bug. On X86, it was never using ESI, EDI, and EBP because of a bug in RALocal::isPhysRegAvailable(). For example, when 
it checks if ESI is available, it then looks at registers aliases to ESI. SIL is marked -2 (not allocatable) but isPhysRegAvailable() incorrectly assumes it is in use and returns false for ESI.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47499 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 20:30:53 +00:00
Evan Cheng
9af7090392 Add debugging printfs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47496 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 19:57:06 +00:00
Evan Cheng
b2fd65f936 Make sure reload of implicit uses are issued before remat's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47492 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 19:22:06 +00:00
Dale Johannesen
08e78b18b8 Pass alignment on ByVal parameters, from FE, all 
the way through.  It is now used for codegen.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47484 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 17:49:45 +00:00
Evan Cheng
d70dbb5d62 Enable re-materialization of instructions which have virtual register operands if 
the definition of the operand also reaches its uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47475 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 09:24:50 +00:00
Evan Cheng
becda48f88 Fix compiler warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47468 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 01:48:00 +00:00
Dan Gohman
9e255b7df5 Fix a regression in 403.gcc and 186.crafty introduced in 47383. To test 
that a value is >= 32, check that all of the high bits are zero, not
just one or more.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47467 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 01:12:31 +00:00
Chris Lattner
69e6a8d5a8 Make the clobber analysis a bit more smart: we only are careful about 
early clobbers if the clobber list contains a *register* not some thing
like {memory}, {dirflag} etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47457 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 20:54:31 +00:00
Chris Lattner
0fe71e9bb1 Treat clobber operands like early clobbers: if we have 
any, we force sdisel to do all regalloc for an asm.  This
leads to gross but correct codegen.

This fixes the rest of PR2078.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47454 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 19:43:13 +00:00
Bill Wendling
1d5e8196c0 Clear PhysRegPartUse for the sub register as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47453 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 19:35:27 +00:00
Bill Wendling
20b76ab3c7 Adjust the MaxAlignment for the special register scavenging spill slot. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47452 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 19:33:53 +00:00
Evan Cheng
304983b93e Help testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47448 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 19:20:21 +00:00
Andrew Lenharth
c1c7bd610a Better names as per Evan's request 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47435 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 16:11:38 +00:00
Andrew Lenharth
ab0b949e0e Atomic op support. If any gcc test uses __sync builtins, it might start failing on archs that haven't implemented them yet 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47430 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 06:45:13 +00:00
Chris Lattner
f9853bc0d4 Add support for matching mem operands. This fixes PR1133, patch by 
Eli Friedman.  This implements CodeGen/Generic/2008-02-20-MatchingMem.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47428 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 05:27:19 +00:00
Chris Lattner
7cbeb2431c Fix a (harmless) but where vregs were added to the used reg lists for 
inline asms.

Fix PR2078 by marking aliases of registers used when a register is 
marked used.  This prevents EAX from being allocated when AX is listed
in the clobber set for the asm.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47426 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 04:55:52 +00:00
Evan Cheng
063284c001 Clean up some spilling code using MachineRegisterInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47416 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 00:34:19 +00:00
Bill Wendling
c927cc8731 Remove one of the fixmes that I put in there. From Evan: 
No need to go up more levels. A def of a register also sets its sub-registers
(so if PhysRegInfo[SuperReg] is NULL, it means SuperReg's super registers are
not previously defined).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47399 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 20:56:45 +00:00
Bill Wendling
55574c2cea Improve some comments explaining the "handle kills" stuff better. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47395 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 19:35:34 +00:00
Bill Wendling
fe8276cec2 Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47389 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 19:09:14 +00:00
Devang Patel
c40a84a877 assert is more effective reminder then FIXME tag for unimplemented features. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47388 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 18:37:40 +00:00
Duncan Sands
f83b1f63dd LegalizeTypes support for scalarizing a vector store 
and splitting extract_subvector.  This fixes nine
"make check" testcases, for example
2008-02-04-ExtractSubvector.ll and (partially)
CodeGen/Generic/vector.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47384 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 17:38:09 +00:00
Dan Gohman
91dc17ba49 Convert Legalize to use the APInt form of ComputeMaskedBits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47383 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 16:57:27 +00:00
Dan Gohman
b5660dc822 Add explicit keywords. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47382 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 16:44:09 +00:00
Dan Gohman
948d8eadec Convert DAGCombiner to use the APInt form of ComputeMaskedBits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47381 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 16:33:30 +00:00
Dan Gohman
ca93a43e84 Use APInt::intersects. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47380 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 16:30:17 +00:00
Anton Korobeynikov
4aefd6b7d4 Fix newly-introduced 4.3 warnings 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47375 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 12:07:57 +00:00
Anton Korobeynikov
4c71dfe356 Update gcc 4.3 warnings fix patch with recent head changes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47368 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 11:10:28 +00:00
Anton Korobeynikov
ae9f3a3b7c Unbreak build with gcc 4.3: provide missed includes and silence most annoying warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47367 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 11:08:44 +00:00
Bill Wendling
6d794746b7 Added some comments and reformatted others. No functionality change. 
Added two "FIXMEs" for code that looks dubious to me (but I could be
wrong).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47366 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 09:15:16 +00:00
Bill Wendling
420cdebbcb More constification of things. More comments added. No functionality 
changes. (Sorry for any formatting changes that creeped in.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47362 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 07:36:31 +00:00
Chris Lattner
19fc1d3742 Fix an incredibly subtle bug exposed by Ted's change to APInt profiling. 
AddNodeIDNode does profiling for a ConstantSDNode, but so does 
SelectionDAG::getConstant.  This profiling should be moved to a common
static function in ConstantSDNode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47359 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 06:28:01 +00:00
Bill Wendling
90a3868fe5 No functionality change: 
- Constified some MachineOperand values.
 - Added/Modified some comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47358 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 06:10:21 +00:00
Devang Patel
40a04216da Add GetResultInst. First step for multiple return value support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47348 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-19 22:15:16 +00:00
Evan Cheng
31886dbe37 PR1909: Tail merging pass ran wild. It makes no sense to merge blocks in order to save a single instruction since a branch will be inserted for each BB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47301 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-19 02:09:37 +00:00