Commit Graph

9791 Commits

Author SHA1 Message Date
Evan Cheng
c96a8e7df1 Rename isGVLazyPtr to isGVNonLazyPtr relocation. This represents Mac OS X
indirect gv reference. Please don't call it lazy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58746 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 01:50:32 +00:00
Evan Cheng
3eb22e835f Actually ARM / Mac OS X does have UINTTOFP_I64_F{64|32} libcalls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58725 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-04 22:19:55 +00:00
Evan Cheng
c7c77297e2 Custom lower bit_convert i64 -> f64 into FMDRR. This is now happening with legalizetypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58714 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-04 19:57:48 +00:00
Evan Cheng
142c15e052 Debug output tweak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58708 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-04 17:58:53 +00:00
Evan Cheng
e7fe672445 LDM_RET restores pc, do not set 's' bit which would restore CPSR from SPSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58707 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-04 17:57:07 +00:00
Evan Cheng
b0b53491ef For some targets, it's not possible to place GVs in the same memory buffer as the MachineCodeEmitter allocated memory. Code and data has different read / write / execution privilege requirements.
This is a short term workaround. The current solution is for the JIT memory manager to manage code and data memory separately.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58688 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-04 09:30:48 +00:00
Evan Cheng
e953b89b0d Stylistic change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58683 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-04 06:10:06 +00:00
Evan Cheng
25e04788bf Handle ARM machine constantpool entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58671 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-04 00:50:32 +00:00
Dan Gohman
f6503a031e The ANDMask node folds to a constant, and isn't the node that needs to
have its node id set. The new and and shift nodes are the nodes that need
the IDs. This fixes PR2982.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58655 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-03 23:43:55 +00:00
Evan Cheng
49987360ad Remove a dead switch statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58644 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-03 21:26:52 +00:00
Evan Cheng
afaf12036d Minor code restructuring. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58643 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-03 21:02:39 +00:00
Jim Grosbach
0a4b9dc9b1 Add binary encoding support for multiply instructions. Some blanks left to fill in, but the basics are there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58626 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-03 18:38:31 +00:00
Dan Gohman
8f092252d3 Refactor various TargetAsmInfo subclasses' TargetMachine members away
adding a TargetMachine member to the base TargetAsmInfo class instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58624 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-03 18:22:42 +00:00
Bill Wendling
7ab1fc1490 Whitespace fixes. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58539 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-31 21:26:08 +00:00
Evan Cheng
2583b2a713 Add comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58533 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-31 19:56:03 +00:00
Evan Cheng
938b9d8ef7 Use better data structure for ConstPoolId2AddrMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58532 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-31 19:55:13 +00:00
Evan Cheng
ba44df60d6 Actually make debug output understandable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58529 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-31 19:15:52 +00:00
Mon P Wang
fd532d7cd9 x86_64 rip-relative and magic mode address
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58528 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-31 19:13:42 +00:00
Evan Cheng
c072966838 Forgot this in last commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58527 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-31 19:11:09 +00:00
Evan Cheng
eb4ed4b266 Encode PICADD; some code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58526 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-31 19:10:44 +00:00
Bill Wendling
f7c094000f Revert r58489. It isn't correct for all cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58523 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-31 18:30:19 +00:00
Evan Cheng
9ed08f4a41 Change x86 register allocation ordering to match that of gcc. Otherwise some tools get confused by prologue generated by llvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58517 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-31 16:52:57 +00:00
Bill Wendling
f6a9988cea Don't skip over all "terminator" instructions when determining where to put the
callee-saved restore code. It could skip over conditional jumps
accidentally. Instead, just skip the "return" instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58489 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-31 04:00:23 +00:00
Dan Gohman
d17cfbe1ca Use MOVSSmr instead of EXTRACTPSmr in the case of extracting
vector element 0 for a store, as it's smaller and faster.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58483 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-31 00:57:24 +00:00
Evan Cheng
e53a5af966 I think we got non-machine specific constpool entries covered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58474 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-30 23:43:36 +00:00
Duncan Sands
2fbfbd2a05 Shift amounts should have type getShiftAmountTy
(i32 for PPC, not i8).  Correct this, and some
formatting while there.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58451 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-30 19:28:32 +00:00
Duncan Sands
fa7935fcb3 Shift amounts should have the type given by
getShiftAmountTy (i32 in the case of CellSPU).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58449 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-30 19:24:28 +00:00
Evan Cheng
65f244261c ARM JIT should observe -relocation-model command line option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58433 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-30 16:10:54 +00:00
Mon P Wang
0c39719bfc Add initial support for vector widening. Logic is set to widen for X86.
One will only see an effect if legalizetype is not active.  Will move
support to LegalizeType soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58426 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-30 08:01:45 +00:00
Scott Michel
d976c21241 Resolve bug 2947: vararg-marked functions must spill registers R3-R79 to stack
so that va_start/va_arg/et.al. will walk arguments correctly for Cell SPU.

N.B.: Because neither clang nor llvm-gcc-4.2 can be built for CellSPU, this is
still unexorcised code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58415 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-30 01:51:48 +00:00
Evan Cheng
0f282439be Correct way to handle CONSTPOOL_ENTRY instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58409 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-29 23:55:43 +00:00
Evan Cheng
5be59eace5 Add debugging support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58408 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-29 23:55:17 +00:00
Nate Begeman
110e3b3d1b Fix PEXTRQ encoding
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58403 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-29 23:07:17 +00:00
Dale Johannesen
b384ab9ea1 Add a RM pseudoreg for the rounding mode, which
allows ppcf128->int conversion to work with
DeadInstructionElimination.  This is now turned
off but RM is harmless.  It does not do a complete
job of modeling the rounding mode.

Revert marking MFCR as using all 7 CR subregisters;
while correct, this caused the problem in PR 2964,
plus the local RA crash noted in the comments.
This was needed to make DeadInstructionElimination,
but as we are not running that, it is backed out
for now.  Eventually it should go back in and the
other problems fixed where they're broken.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58391 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-29 18:26:45 +00:00
Jim Grosbach
bc6d876adf Support for constant islands in the ARM JIT.
Since the ARM constant pool handling supercedes the standard LLVM constant
pool entirely, the JIT emitter does not allocate space for the constants,
nor initialize the memory. The constant pool is considered part of the 
instruction stream.

Likewise, when resolving relocations into the constant pool, a hook into
the target back end is used to resolve from the constant ID# to the
address where the constant is stored.

For now, the support in the ARM emitter is limited to 32-bit integer. Future
patches will expand this to the full range of constants necessary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58338 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-28 18:25:49 +00:00
Duncan Sands
57760d96e2 Fix darwin ppc llvm-gcc build breakage: intercept
ppcf128 to i32 conversion and expand it into a code
sequence like in LegalizeDAG.  This needs custom
ppc lowering of FP_ROUND_INREG, so turn that on and
make it work with LegalizeTypes.  Probably PPC should
simply custom lower the original conversion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58329 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-28 15:00:32 +00:00
Chris Lattner
4002a1b6f1 Fix a nasty miscompilation of 176.gcc on linux/x86 where we synthesized
a memset using 16-byte XMM stores, but where the stack realignment code
didn't work.  Until it does (PR2962) disable use of xmm regs in memcpy
and memset formation for linux and other targets with insufficiently
aligned stacks.

This is part of PR2888



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58317 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-28 05:49:35 +00:00
David Greene
8ad4c00c00 Have TableGen emit setSubgraphColor calls under control of a -gen-debug
flag.  Then in a debugger developers can set breakpoints at these calls
to see waht is about to be selected and what the resulting subgraph
looks like.  This really helps when debugging instruction selection.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58278 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-27 21:56:29 +00:00
Evan Cheng
23066288fd For now, don't split live intervals around x87 stack register barriers. FpGET_ST0_80 must be right after a call instruction (and ADJCALLSTACKUP) so we need to find a way to prevent reload of x87 registers between them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58230 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-27 07:14:50 +00:00
Dan Gohman
71b7f646de Move the code that adds the DeadMachineInstructionElimPass from
target-independent code to target-specific code. This prevents it
from running on targets that aren't using fast-isel.

In addition to saving compile time, this addresses the problem
that not all targets are prepared for it. In order to use this
pass, all instructions must declare all their fixed uses and
defs of physical registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58144 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-25 17:46:52 +00:00
Nicolas Geoffray
46fa139e26 Support for allocation of TLS variables in the JIT. Allocation of a global
variable is moved to the execution engine. The JIT calls the TargetJITInfo
to allocate thread local storage. Currently, only linux/x86 knows how to
allocate thread local global variables.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58142 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-25 15:41:43 +00:00
Nicolas Geoffray
b74f370e43 Generate code for TLS instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58141 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-25 15:22:06 +00:00
Oscar Fuentes
28df32b559 CMake: lib/Target/ARM/AsmPrinter/CMakeLists.txt added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58133 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-25 03:40:32 +00:00
Dale Johannesen
f14df02340 Mark MFCR as reading all condition code registers.
Prevents some more overzealous deletions (mostly
in AltiVec code).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58121 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-24 22:08:01 +00:00
Dale Johannesen
c12e5812be Rewrite logic to figure out whether LR needs to
be saved/restored in the prolog/epilog.  We need
to do this iff something in the function stores
into it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58116 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-24 21:24:23 +00:00
Torok Edwin
61df3b751a move the note to the correct README
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58104 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-24 19:23:07 +00:00
Torok Edwin
db1b3bc276 add note about va_arg code on x86 and x86-64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58103 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-24 19:20:05 +00:00
Duncan Sands
4047f4a0b4 Fix translateX86CC: if SetCCOpcode is SETULE and
LHS is a foldable load, then LHS and RHS are swapped
and SetCCOpcode is changed to SETUGT.  But the later
code is expecting operands to be the wrong way round
for SETUGT, but they are not in this case, resulting
in an inverted compare.  The solution is to move the
load normalization before the correction for SETUGT.
This bug was tickled by LegalizeTypes which happened
to legalize the testcase slightly differently to
LegalizeDAG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58092 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-24 13:03:10 +00:00
Dan Gohman
c9f3cc3bda Fix constant-offset emission for x86-64 absolute addresses. This
fixes a bunch of test-suite JIT failures on x86-64 in
-relocation-model=static mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58066 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-24 01:57:54 +00:00
Dale Johannesen
639076fb84 Mark defs and uses of CTR and LR correctly.
Prevents DeadMachineInstructionElim from thinking
things like MTCTR are dead (fixes massive
testsuite breakage at -O0).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58043 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-23 20:41:28 +00:00