Jim Grosbach
5ca66696e7
Pseudo-ize Thumb2 jump tables with explicit MC lowering to the raw
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instructions. This simplifies instruction printing and disassembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120333 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 22:37:40 +00:00
Jim Grosbach
d092a87ba3
Rename t2 TBB and TBH instructions to reference that they encode the jump table
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data. Next up, pseudo-izing them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120320 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 21:28:32 +00:00
Jim Grosbach
f1aa47dc1a
ARM Pseudo-ize tBR_JTr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 19:32:47 +00:00
Bill Wendling
73fe34a3ee
Encode the multi-load/store instructions with their respective modes ('ia',
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'db', 'ib', 'da') instead of having that mode as a separate field in the
instruction. It's more convenient for the asm parser and much more readable for
humans.
<rdar://problem/8654088>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 01:16:36 +00:00
Chris Lattner
60d5b5fdee
stub out a powerpc MCInstPrinter implementation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119059 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 19:40:38 +00:00
Bill Wendling
04863d06fb
Minor cleanups:
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- Get the opcode once.
- Add a ParserMatchClass to reglist.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118997 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-13 10:40:19 +00:00
Evan Cheng
11c11f8ab0
For pre-v6t2 targets, only select MOVi32imm if the immediate can be handled with movi + orr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118945 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-12 23:46:13 +00:00
Bill Wendling
92b5a2eb16
The MC code couldn't handle ARM LDR instructions with negative offsets:
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vldr.64 d1, [r0, #-32]
The problem was with how the addressing mode 5 encodes the offsets. This change
makes sure that the way offsets are handled in addressing mode 5 is consistent
throughout the MC code. It involves re-refactoring the "getAddrModeImmOpValue"
method into an "Imm12" and "addressing mode 5" version. But not to worry! The
majority of the duplicated code has been unified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118144 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03 01:49:29 +00:00
Jim Grosbach
2915eb4430
Remove unused function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118141 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03 01:35:15 +00:00
Jim Grosbach
0a2287b909
Remove the no longer used 'Modifier' optional operand to the ARM
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printOperand() asm printer helper functions. rdar://8425198
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118140 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03 01:11:15 +00:00
Jim Grosbach
496e2b2908
Remove unused function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118139 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03 01:07:48 +00:00
Jim Grosbach
e6913600c7
Break ARM addrmode4 (load/store multiple base address) into its constituent
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parts. Represent the operation mode as an optional operand instead.
rdar://8614429
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118137 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03 01:01:43 +00:00
Chris Lattner
6274ec48b3
hook up getOpcodeName for ARM so that "llc -show-mc-inst" includes
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the opcode string in the inst dump, e.g.:
vmov r2, r3, d17 @ encoding: [0x31,0x2b,0x53,0xec]
@ <MCInst #989 VMOVRRD
@ <MCOperand Reg:68>
@ <MCOperand Reg:69>
@ <MCOperand Reg:19>
@ <MCOperand Imm:14>
@ <MCOperand Reg:0>>
The "VMOVRRD" is new.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117609 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 21:37:33 +00:00
Jim Grosbach
ab682a2090
PLD, PLDW, PLI encodings, plus refactor their use of addrmode2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117571 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 18:34:10 +00:00
Jim Grosbach
77aee8e22c
LDRi12 machine instructions handle negative offset operands normally (simple
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integer values), not with the addrmode2 encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117429 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 01:19:41 +00:00
Jim Grosbach
3e55612472
First part of refactoring ARM addrmode2 (load/store) instructions to be more
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explicit about the operands. Split out the different variants into separate
instructions. This gives us the ability to, among other things, assign
different scheduling itineraries to the variants. rdar://8477752.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117409 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:37:02 +00:00
Jim Grosbach
458f2dc5d1
imm12 operands aren't Thumb2 only, so rename the printer helper function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117291 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:00:01 +00:00
Jim Grosbach
b3af5de2d9
Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern
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and handle the operand explicitly. Flesh out encoding information. Add an
explicit disassembler testcase for the instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116432 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 21:00:04 +00:00
Jim Grosbach
1d6111c5ac
Kill of the vestiges of the 'call' Modifier (no longer needed for PLT).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115845 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-06 21:36:43 +00:00
Jim Grosbach
35636281c7
Now that VDUPfqf and VDUPfdfare properly pseudos, kill the no-longer-needed
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"lane" operand modifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115843 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-06 21:22:32 +00:00
Jim Grosbach
443e625d8a
PrintSpecial() can go away now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115376 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 23:27:48 +00:00
Jim Grosbach
7ac1609a3b
Rename the AsmPrinter directory to InstPrinter for those targets that have
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been MC-ized for assembly printing. MSP430 is mostly so, but still has the
asm printer and lowering code in the printer subdir for the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115360 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 22:39:28 +00:00