Commit Graph

3435 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
cb6404711b Add LiveIntervals::getLastSplitPoint().
A live range cannot be split everywhere in a basic block. A split must go before
the first terminator, and if the variable is live into a landing pad, the split
must happen before the call that can throw.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124894 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-04 19:33:11 +00:00
Andrew Trick
92e946630d Introducing a new method of tracking register pressure. We can't
precisely track pressure on a selection DAG, but we can at least keep
it balanced. This design accounts for various interesting aspects of
selection DAGS: register and subregister copies, glued nodes, dead
nodes, unused registers, etc.

Added SUnit::NumRegDefsLeft and ScheduleDAGSDNodes::RegDefIter.

Note: I disabled PrescheduleNodesWithMultipleUses when register
pressure is enabled, based on no evidence other than I don't think it
makes sense to have both enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124853 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-04 03:18:17 +00:00
Eric Christopher
0f43811903 Reapply this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124779 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-03 06:18:29 +00:00
Eric Christopher
463a2977b1 Temporarily revert 124765 in an attempt to find the cycle breaking bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124778 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-03 05:40:54 +00:00
Jakob Stoklund Olesen
2cd2111959 Defer SplitKit value mapping until all defs are available.
The greedy register allocator revealed some problems with the value mapping in
SplitKit. We would sometimes start mapping values before all defs were known,
and that could change a value from a simple 1-1 mapping to a multi-def mapping
that requires ssa update.

The new approach collects all defs and register assignments first without
filling in any live intervals. Only when finish() is called, do we compute
liveness and mapped values. At this time we know with certainty which values map
to multiple values in a split range.

This also has the advantage that we can compute live ranges based on the
remaining uses after rematerializing at split points.

The current implementation has many opportunities for compile time optimization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124765 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-03 00:54:23 +00:00
Devang Patel
e9a7ea6865 Keep track of incoming argument's location while emitting LiveIns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124611 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-31 21:38:14 +00:00
David Greene
cfe33c46aa [AVX] Add INSERT_SUBVECTOR and support it on x86. This provides a
default implementation for x86, going through the stack in a similr
fashion to how the codegen implements BUILD_VECTOR.  Eventually this
will get matched to VINSERTF128 if AVX is available.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124307 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26 19:13:22 +00:00
Devang Patel
a2e868d34c Provide an interface to transfer SDDbgValue from one SDNode to another.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124245 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-25 23:27:42 +00:00
Rafael Espindola
0cf5e3d51d Delay the creation of eh_frame so that the user can change the defaults.
Add support for SHT_X86_64_UNWIND.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124059 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 05:43:40 +00:00
Benjamin Kramer
ecb89fd06c Remove dead ivar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124028 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-22 12:13:28 +00:00
Andrew Trick
c8bfd1d78f Convert -enable-sched-cycles and -enable-sched-hazard to -disable
flags. They are still not enable in this revision.

Added TargetInstrInfo::isZeroCost() to fix a fundamental problem with
the scheduler's model of operand latency in the selection DAG.

Generalized unit tests to work with sched-cycles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123969 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 05:51:33 +00:00
Anton Korobeynikov
9a1ef4ef36 Add CFI directives-based frame information emission. Not hooked yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123474 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 21:57:53 +00:00
Jakob Stoklund Olesen
4f28c1c714 Teach frame lowering to ignore debug values after the terminators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123399 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 21:28:52 +00:00
Jakob Stoklund Olesen
7fd747ba24 Annotate VirtRegRewriter debug output with slot indexes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123333 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 22:28:48 +00:00
Jakob Stoklund Olesen
a5f1a900df Assert if anybody tries to put a slot index on a DBG_VALUE instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123323 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 21:27:45 +00:00
Anton Korobeynikov
16c29b5f28 Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123170 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 12:39:04 +00:00
Jakob Stoklund Olesen
c9df025e33 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
These functions not longer assert when passed 0, but simply return false instead.

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123155 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 02:58:51 +00:00
Jakob Stoklund Olesen
42e9c96392 Remove MachineRegisterInfo::getLastVirtReg(), it was giving wrong results
when no virtual registers have been allocated.

It was only used to resize IndexedMaps, so provide an IndexedMap::resize()
method such that

 Map.grow(MRI.getLastVirtReg());

can be replaced with the simpler

 Map.resize(MRI.getNumVirtRegs());

This works correctly when no virtuals are allocated, and it bypasses the to/from
index conversions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123130 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 21:58:20 +00:00
Jakob Stoklund Olesen
be97e906e0 Teach TargetRegisterInfo how to cram stack slot indexes in with the virtual and
physical register numbers.

This makes the hack used in LiveInterval official, and lets LiveInterval be
oblivious of stack slots.

The isPhysicalRegister() and isVirtualRegister() predicates don't know about
this, so when a variable may contain a stack slot, isStackSlot() should always
be tested first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123128 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 21:17:37 +00:00
Jakob Stoklund Olesen
0804ead404 Simplify LiveDebugVariables by storing MachineOperand copies locations instead
of using a Location class with the same information.

When making a copy of a MachineOperand that was already stored in a
MachineInstr, it is necessary to clear the parent pointer on the copy. Otherwise
the register use-def lists become inconsistent.

Add MachineOperand::clearParent() to do that. An alternative would be a custom
MachineOperand copy constructor that cleared ParentMI. I didn't want to do that
because of the performance impact.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123109 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 05:33:21 +00:00
Jakob Stoklund Olesen
994c727b57 Use IndexedMap for MachineRegisterInfo as well. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 03:05:46 +00:00
Jakob Stoklund Olesen
b421c566f5 Use an IndexedMap for LiveVariables::VirtRegInfo.
Provide MRI::getNumVirtRegs() and TRI::index2VirtReg() functions to allow
iteration over virtual registers without depending on the representation of
virtual register numbers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123098 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-08 23:10:57 +00:00
Jakob Stoklund Olesen
56e4d89642 Do not talk about TargetRegisterInfo::FirstVirtualRegister.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123097 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-08 23:10:53 +00:00
Jakob Stoklund Olesen
358de24dc1 Use an IndexedMap for LiveOutRegInfo to hide its dependence on TargetRegisterInfo::FirstVirtualRegister.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123096 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-08 23:10:50 +00:00
Evan Cheng
55d4200336 Recognize inline asm 'rev /bin/bash, ' as a bswap intrinsic call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123048 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-08 01:24:27 +00:00
Evan Cheng
c36b7069b4 Do not model all INLINEASM instructions as having unmodelled side effects.
Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.

This allows memory instructions to be moved around INLINEASM instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123044 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 23:50:32 +00:00
Evan Cheng
7c7e2da4aa Fix comment. INLINEASM node operand #3 is IsAlignStack bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123036 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 21:38:59 +00:00
Bob Wilson
6736e19f4c Change EXTRACT_SUBVECTOR to require a constant index.
We were never generating any of these nodes with variable indices, and there
was one legalizer function asserting on a non-constant index.  If we ever have
a need to support variable indices, we can add this back again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122993 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 04:58:56 +00:00
Jakob Stoklund Olesen
8bfe50871f Add the SpillPlacement analysis pass.
This pass precomputes CFG block frequency information that can be used by the
register allocator to find optimal spill code placement.

Given an interference pattern, placeSpills() will compute which basic blocks
should have the current variable enter or exit in a register, and which blocks
prefer the stack.

The algorithm is ready to consume block frequencies from profiling data, but for
now it gets by with the static estimates used for spill weights.

This is a work in progress and still not hooked up to RegAllocGreedy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122938 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06 01:21:53 +00:00
Wesley Peck
4351bfbd4d Fix small bug in setDebugInfoAvailability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122886 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-05 17:01:57 +00:00
Jakob Stoklund Olesen
631ee4b89f Use the EdgeBundles analysis in X86FloatingPoint instead of recomputing CFG
bundles in the pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122833 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-04 21:10:11 +00:00
Jakob Stoklund Olesen
8dd070edc2 Turn the EdgeBundles class into a stand-alone machine CFG analysis pass.
The analysis will be needed by both the greedy register allocator and the
X86FloatingPoint pass. It only needs to be computed once when the CFG doesn't
change.

This pass is very fast, usually showing up as 0.0% wall time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122832 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-04 21:10:05 +00:00
Owen Anderson
19af2ed415 Give MachineFunctionAnalysis a getPassName() implementation to make timing reports prettier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122816 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-04 18:21:18 +00:00
Eric Christopher
7853ae1d97 Header warning patrol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122551 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-25 02:38:01 +00:00
Andrew Trick
a75ce9f5d2 Minor cleanup related to my latest scheduler changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122545 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 07:10:19 +00:00
Andrew Trick
2da8bc8a5f Various bits of framework needed for precise machine-level selection
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.

Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.

Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.

Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.

ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.

ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 05:03:26 +00:00
Andrew Trick
6e8f4c4048 whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122539 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 04:28:06 +00:00
Chris Lattner
29d8f0cae4 flags -> glue for selectiondag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122509 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 17:24:32 +00:00
Chris Lattner
a4359be032 sdisel flag -> glue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122507 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-23 17:13:18 +00:00
Chris Lattner
f1b4eafbfe rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
something that just glues two nodes together, even if it is
sometimes used for flags.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-21 02:38:05 +00:00
Jakob Stoklund Olesen
b907e8a2d4 Use IntEqClasses to compute connected components of live intervals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122296 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-21 00:48:17 +00:00
Chris Lattner
4d8455ea4d update comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122212 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20 00:56:59 +00:00
Jakob Stoklund Olesen
89cab93fe9 Pass a Banner argument to the machine code verifier both from
createMachineVerifierPass and MachineFunction::verify.

The banner is printed before the machine code dump, just like the printer pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122113 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 00:06:56 +00:00
Jakob Stoklund Olesen
8d12140437 Avoid dereferencing end() in collectInterferingVRegs() when there is no
interference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122108 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 23:16:38 +00:00
Jakob Stoklund Olesen
f428eb6c1b Enable loop splitting in RegAllocGreedy.
The heuristics split around the largest loop where the current register may be
allocated without interference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122106 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 23:16:32 +00:00
Jakob Stoklund Olesen
090100fdb1 Add MachineLoopRange comparators for sorting loop lists by number and by area.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122073 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 18:13:52 +00:00
Jakob Stoklund Olesen
ff2e9b4225 Provide LiveIntervalUnion::Query::checkLoopInterference.
This is a three-way interval list intersection between a virtual register, a
live interval union, and a loop. It will be used to identify interference-free
loops for live range splitting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122034 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 04:09:47 +00:00
Jakob Stoklund Olesen
ceadc01e91 Add MachineLoopRanges analysis.
A MachineLoopRange contains the intervals of slot indexes covered by the blocks
in a loop. This representation of the loop blocks is more efficient to compare
against interfering registers during register coalescing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121917 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:41:23 +00:00
Jakob Stoklund Olesen
e69b4ab829 Add SlotIndexes::getMBBRange() to get the range of a basic block in a single
lookup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121893 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 20:40:22 +00:00
Rafael Espindola
89b9372605 Fixed version of 121434 with no new memory leaks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121471 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 07:39:47 +00:00