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Author SHA1 Message Date
Bill Wendling
150c4a1a89 Rework the logic that determines if a store completely overlaps an ealier store. 
There are two ways that a later store can comletely overlap a previous store:

1. They both start at the same offset, but the earlier store's size is <= the
   later's size, or
2. The earlier store's offset is > the later's offset, but it's offset + size
   doesn't extend past the later's offset + size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128332 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-26 08:02:59 +00:00
Cameron Zwarich
c77a10fe0a Fix a typo and add a test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128331 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-26 04:58:50 +00:00
Douglas Gregor
32ce3f944d Extend Clang's TableGen emitter for attributes to support bool arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128330 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-26 03:40:01 +00:00
Jakob Stoklund Olesen
adb877d62e Collect and coalesce DBG_VALUE instructions before emitting the function. 
Correctly terminate the range of register DBG_VALUEs when the register is
clobbered or when the basic block ends.

The code is now ready to deal with variables that are sometimes in a register
and sometimes on the stack. We just need to teach emitDebugLoc to say 'stack
slot'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128327 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-26 02:19:36 +00:00
Johnny Chen
eca915fb52 Fixed the t2PLD and friends disassembly and add two test cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128322 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-26 01:32:48 +00:00
Eric Christopher
29aeed1bf8 Fix the bfi handling for or (and a mask) (and b mask). We need the two 
masks to match inversely for the code as is to work. For the example given
we actually want:

bfi r0, r2, #1, #1

not #0, however, given the way the pattern is written it's not possible
at the moment.

Fixes rdar://9177502


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128320 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-26 01:21:03 +00:00
Bill Wendling
e420449e80 PR9561: A store with a negative offset (via GEP) could erroniously say that it 
completely overlaps a previous store, thus mistakenly deleting that store. Check
for this condition.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128319 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-26 01:20:37 +00:00
Kevin Enderby
17cbaa3c82 Remove the files for r128308 as it is causing a buildbot failure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128309 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-26 00:23:05 +00:00
Kevin Enderby
12b04be85d Adding a C API to the disassembler for use by such tools as Darwin's otool(1). 
This is a work in progress as the interface for producing symbolic operands is
not done.  But a hacked prototype using information from the object file's
relocation entiries and replacing immediate operands with MCExpr's has been
shown to work with no changes to the instrucion printer.  These APIs will be
moved into a dynamic library at some point.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128308 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-26 00:06:33 +00:00
Johnny Chen
cf0fe4650f Add test for A8.6.246 UMULL to both arm-tests.txt amd thumb-tests.txt. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128306 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 23:02:58 +00:00
Johnny Chen
65c0a59869 Add two test cases t2SMLABT and t2SMMULR for DisassembleThumb2Mul(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128305 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 22:43:28 +00:00
Johnny Chen
a2755b9829 Fix DisassembleThumb2DPReg()'s handling of RegClass. Cannot hardcode GPRRegClassID. 
Also add some test cases.

rdar://problem/9189829


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128304 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 22:19:07 +00:00
Johnny Chen
abeea57639 DisassembleThumb2LdSt() did not handle t2LDRs correctly with respect to RegClass. Add two test cases. 
rdar://problem/9182892


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128299 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 19:35:37 +00:00
Johnny Chen
b66a097612 A8.6.226 TBB, TBH: 
Add two test cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128295 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 18:40:21 +00:00
Johnny Chen
ceceabd4b1 Modify DisassembleThumb2LdStEx() to be more robust/correct in light of recent change to 
t2LDREX/t2STREX instructions.  Add two test cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128293 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 18:29:49 +00:00
Daniel Dunbar
8b2b43c41d MC: Improve some diagnostics on uses of '.' pseudo-symbol. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128289 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 17:47:17 +00:00
Daniel Dunbar
0143ac1368 Tidyness. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128288 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 17:47:14 +00:00
Benjamin Kramer
ef7b8d9e5a Add a note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128286 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 17:32:40 +00:00
Johnny Chen
6c3891067b Instruction formats of SWP/SWPB were changed from LdStExFrm to MiscFrm. Modify the disassembler to handle that. 
rdar://problem/9184053


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128285 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 17:31:16 +00:00
Jakob Stoklund Olesen
15a3ea0628 Emit less labels for debug info and stop emitting .loc directives for DBG_VALUEs. 
The .dot directives don't need labels, that is a leftover from when we created
line number info manually.

Instructions following a DBG_VALUE can share its label since the DBG_VALUE
doesn't produce any code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128284 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 17:20:59 +00:00
Johnny Chen
f14d5cf33a Also need to handle invalid imod values for CPS2p. 
rdar://problem/9186136


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128283 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 17:03:12 +00:00
Duncan Sands
067e2e2adb Useful script for finding regressions in the nightly testsuite. 
I think it was written by Pawel Worach.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128268 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 07:17:44 +00:00
Bill Wendling
1a59243c25 Remove redundant compression option. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128267 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 06:43:59 +00:00
Andrew Trick
336298cf2c Fix for -pre-RA-sched=source. 
Yet another case of unchecked NULL node (for physreg copy).
May fix PR9509.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128266 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 06:40:55 +00:00
Nick Lewycky
628b337561 No functionality change, just adjust some whitespace for coding style compliance. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128257 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 06:05:50 +00:00
Nick Lewycky
d56acb36ab No functionality change. Fix up some whitespace and switch out "" for '' when 
printing a single character.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128256 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 06:04:26 +00:00
Jakob Stoklund Olesen
eb5067e0d9 Ignore special ARM allocation hints for unexpected register classes. 
Add an assertion to linear scan to prevent it from allocating registers outside
the register class.

<rdar://problem/9183021>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128254 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 01:48:18 +00:00
Johnny Chen
a7078c4f27 Modify the wrong logic in the assert of DisassembleThumb2LdStDual() (the register classes were changed), 
modify the comment to be up-to-date, and add a test case for A8.6.66 LDRD (immediate) Encoding T1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128252 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 01:09:48 +00:00
Johnny Chen
ef74e9ab40 delegate the disassembly of t2ADR to the more generic t2ADDri12/t2SUBri12 instructions, and add a test case for that. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128249 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 00:17:42 +00:00
Johnny Chen
8c13335c9a The opcode names ("tLDM", "tLDM_UPD") used for conflict resolution have been stale since 
the change to ("tLDMIA", "tLDMIA_UPD").  Update the conflict resolution code and add
test cases for that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128247 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 23:42:31 +00:00
Johnny Chen
1090d7711b The ARM disassembler was confused with the 16-bit tSTMIA instruction. 
According to A8.6.189 STM/STMIA/STMEA (Encoding T1), there's only tSTMIA_UPD available.
Ignore tSTMIA for the decoder emitter and add a test case for that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128246 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 23:21:14 +00:00
Devang Patel
439e0c79f5 Move test in x86 specific area. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128245 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 22:39:09 +00:00
Matt Beaumont-Gay
1866af4a98 Suppress an unused variable warning in -asserts builds 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128244 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 22:05:48 +00:00
Johnny Chen
c39b6271be Handle the added VBICiv*i* NEON instructions, too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128243 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 22:04:39 +00:00
Eric Christopher
18a41c92c3 Testcase for llvm-gcc commit r128230. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128242 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 21:59:03 +00:00
Johnny Chen
8cb988686d Plug a leak by ThumbDisassembler::getInstruction(), thanks to Benjamin Kramer! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128241 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 21:42:55 +00:00
Johnny Chen
9091bf25d9 T2 Load/Store Multiple: 
These instructions were changed to not embed the addressing mode within the MC instructions
We also need to update the corresponding assert stmt.  Also add a test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128240 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 21:36:56 +00:00
Benjamin Kramer
83ccbff84f Plug a leak in the arm disassembler and put the tests back. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128238 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 21:14:28 +00:00
Bruno Cardoso Lopes
505f3cd296 Add asm parsing support w/ testcases for strex/ldrex family of instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128236 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 21:04:58 +00:00
Johnny Chen
02af767dca Remove these two test files as they cause llvm-i686-linux-vg_leak build to fail 'test-llvm'. 
These two are test cases which should result in 'invalid instruction encoding' from running llvm-mc -disassemble.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128235 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 20:56:23 +00:00
Johnny Chen
e6d69e7dbe ADR was added with the wrong encoding for inst{24-21}, and the ARM decoder was fooled. 
Set the encoding bits to {0,?,?,0}, not 0.  Plus delegate the disassembly of ADR to
the more generic ADDri/SUBri instructions, and add a test case for that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128234 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 20:42:48 +00:00
Devang Patel
23670e5b95 Keep track of directory namd and fIx regression caused by Rafael's patch r119613. 
A better approach would be to move source id handling inside MC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128233 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 20:30:50 +00:00
Jim Grosbach
d31d304f83 Clean up assembly statement separator support. 
The MC asm lexer wasn't honoring a non-default (anything but ';') statement
separator. Fix that, and generalize a bit to support multi-character
statement separators.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128227 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 18:46:34 +00:00
Johnny Chen
b4ac342ea0 The r118201 added support for VORR (immediate). Update ARMDisassemblerCore.cpp to disassemble the 
VORRiv*i* instructions properly within the DisassembleN1RegModImmFrm() function.  Add a test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128226 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 18:40:38 +00:00
Johnny Chen
ce1868b21c Add comments to the handling of opcode CPS3p to reject invalid instruction encoding, 
a test case of invalid CPS3p encoding and one for invalid VLDMSDB due to regs out of range.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128220 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 17:04:22 +00:00
Andrew Trick
0a828fd7ef revert r128199 until it can be made to work with Frontend/dependency-gen.c. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128218 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 16:43:37 +00:00
Cameron Zwarich
9035484200 Debug intrinsics must be skipped at the beginning and ends of blocks, lest they 
affect the generated code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128217 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 16:34:59 +00:00
Jay Foad
0d4b81519d Fix typo in comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128216 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 16:18:19 +00:00
Chris Lattner
49e0ccfa78 fix description, PR9542 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128214 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 16:13:31 +00:00
Cameron Zwarich
dc31cfeb74 It is enough for the CallInst to have no uses to be made a tail call with a ret 
void; it doesn't need to have a void type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128212 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 15:54:11 +00:00