Commit Graph

991 Commits

Author SHA1 Message Date
Rafael Espindola
f7ad048f1e Add some limited support for labels in org directives. Hopefully enough to fix
PR9245.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126091 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-20 20:20:07 +00:00
Chris Lattner
824a9076ea implement PR9264: disambiguating 'bt mem, imm' as a btl.
This is reasonable to do since all bt-mem forms do the
same thing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-19 21:06:36 +00:00
Bruno Cardoso Lopes
584bf7bb03 Add assembly parsing support for "msr" and also fix its encoding. Also add
testcases for the disassembler to make sure it still works for "msr".



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125948 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-18 19:45:59 +00:00
Joerg Sonnenberger
5ad596f9d2 Recognize monitor/mwait with explicit register arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125805 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-18 00:48:11 +00:00
Joerg Sonnenberger
97755a063e Recognize leavel and leaveq aliases for leave.
Validate encoding of leave in 64bit mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125795 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-17 23:36:39 +00:00
Rafael Espindola
908159b46a Gas is very inconsistent about when a relaxation/relocation is needed. Do
the right thing and stop trying to copy it. Fixes PR8944.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125648 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-16 03:25:55 +00:00
Rafael Espindola
7768a9dce1 Add support for pushsection and popsection. Patch by Joerg Sonnenberger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125629 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-16 01:08:29 +00:00
Roman Divacky
738a00eb86 Add support for parsing [expr].
This is submitted by Joerg Sonnenberger and fixes his PR8685.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125595 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-15 20:43:39 +00:00
Bruno Cardoso Lopes
a2b6e4151b Fix encoding and add parsing support for the arm/thumb CPS instruction:
- Add custom operand matching for imod and iflags.
- Rename SplitMnemonicAndCC to SplitMnemonic since it splits more than CC
  from mnemonic.
- While adding ".w" as an operand, don't change "Head" to avoid passing the
  wrong mnemonic to ParseOperand.
- Add asm parser tests.
- Add disassembler tests just to make sure it can catch all cps versions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125489 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14 13:09:44 +00:00
Reid Kleckner
26f23100ac Add encodings and mnemonics for FXSAVE64 and FXRSTOR64.
These are just FXSAVE and FXRSTOR with REX.W prefixes.  These versions use
64-bit pointer values instead of 32-bit pointer values in the memory map they
dump and restore.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125446 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-12 23:24:13 +00:00
Jim Grosbach
b9db0c50d8 Do AsmMatcher operand classification per-opcode.
When matching operands for a candidate opcode match in the auto-generated
AsmMatcher, check each operand against the expected operand match class.
Previously, operands were classified independently of the opcode being
handled, which led to difficulties when operand match classes were
more complicated than simple subclass relationships.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125245 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-10 00:08:28 +00:00
Owen Anderson
971b83b67a Revert both r121082 (which broke a bunch of constant pool stuff) and r125074 (which worked around it). This should get us back to the old, correct behavior, though it will make the integrated assembler unhappy for the time being.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125127 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-08 22:39:40 +00:00
Benjamin Kramer
0fd90bc12f Support for .ifdef / .ifndef in the assembler parser. Patch by Joerg Sonnenberger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125120 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-08 22:29:56 +00:00
Bruno Cardoso Lopes
706d946cfe Add support for parsing dmb/dsb instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125055 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-07 22:09:15 +00:00
Jason W Kim
953a2a3dee Teach ARM/MC/ELF about gcc compatible reloc output to get past odd linkage
failures with relocations.

The code committed is a first cut at compatibility for emitted relocations in
ELF .o.

Why do this? because existing ARM tools like emitting relocs symbols as
explicit relocations, not as section-offset relocs.

Result is that with these changes,
1) relocs are now substantially identical what to gcc outputs.
2) larger apps (including many spec2k tests) compile, cross-link, and pass

Added reminder fixme to tests for future conversion to .s form.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124996 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-07 01:11:15 +00:00
Jason W Kim
2d7a53aec2 Teach ARM/MC/ELF about EF_ARM_EABI_VERSION. The magic number is set to
5 to match the current doc.
Added FIXME reminder Make it really configurable later.





git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124899 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-04 21:41:11 +00:00
Jason W Kim
685c350ae7 Teach ARM/MC/ELF to handle R_ARM_JUMP24 relocation type for conditional jumps.
(yes, this is different from R_ARM_CALL)

- Adds a new method getARMBranchTargetOpValue() which handles the
  necessary distinction between the conditional and unconditional br/bl
  needed for ARM/ELF

At least for ARM mode, the needed fixup for conditional versus unconditional
br/bl is identical, but the ARM docs and existing ARM tools expect this
reloc type...

Added a few FIXME's for future naming fixups in ARMInstrInfo.td




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124895 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-04 19:47:15 +00:00
Evan Cheng
4d98ee5234 Fix test for non-darwin targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124640 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-01 01:16:18 +00:00
Bob Wilson
d11c57a937 PR9030: Fix disassembly of ARM "mov pc, lr" instruction.
Patch by Jyun-Yan You.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124492 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-28 17:50:30 +00:00
Roman Divacky
14e66553d5 Add support for parsing .float
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124485 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-28 14:20:32 +00:00
Nico Weber
4c4c732960 PR8951: Support for .equiv in integrated assembler, patch by Jörg Sonnenberger!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124467 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-28 03:04:41 +00:00
Evan Cheng
c3a20bab75 Fix PLD encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124458 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-27 23:48:34 +00:00
Roman Divacky
54b0f4f2a4 Add support for specifying register name in cfi-register/offset/def
as well as register number.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124379 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-27 17:16:37 +00:00
Bruno Cardoso Lopes
106df6da36 Add encoding testcases for ARM vcvtr variations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124289 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26 13:53:38 +00:00
Bruno Cardoso Lopes
1b10d5be40 fix the encoding and add testcases for ARM nop, yield, wfe and wfi instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124288 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26 13:28:14 +00:00
Rafael Espindola
59b8cf4512 Jörg Sonnenberger noticed that we were missing this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124139 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-24 19:40:38 +00:00
Rafael Espindola
184640e96e Handle strings in section names the same way as gas:
* If the name is a single string, we remove the quotes
* If the name starts without a quote, we include any quotes in the name

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124127 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-24 18:02:54 +00:00
Rafael Espindola
96aa78c8c5 Add support for the --noexecstack option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124077 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 17:55:27 +00:00
Rafael Espindola
54104db434 Add support for lowercase variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124071 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 16:11:25 +00:00
Rafael Espindola
0cf5e3d51d Delay the creation of eh_frame so that the user can change the defaults.
Add support for SHT_X86_64_UNWIND.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124059 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 05:43:40 +00:00
Bruno Cardoso Lopes
030160073d Fix the encoding of QADD/SUB, QDADD/SUB. While qadd16, qadd8 use "rd, rn, rm",
qadd and qdadd uses "rd, rm, rn", the same applies to the 'sub' variants. This
is described in ARM manuals and matches the encoding used by the gnu assembler.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123975 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21 14:07:40 +00:00
Bruno Cardoso Lopes
1115c47203 Add testcases for clz encoding
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123937 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20 19:27:16 +00:00
Bruno Cardoso Lopes
e47f3751d7 Fix the encoding and parsing of clrex instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123936 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20 19:18:32 +00:00
Bruno Cardoso Lopes
8dd37f7b7d Add cdp/cdp2 instructions for thumb/thumb2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123929 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20 18:32:09 +00:00
Bruno Cardoso Lopes
b32f7a5f4b - Use a more appropriate name for Owen's ARM Parser isMCR hack since the same operands can be present
in cdp/cdp2 instructions. Also increase the hack with cdp/cdp2 instructions.
- Fix the encoding of cdp/cdp2 instructions for ARM (no thumb and thumb2 yet) and add testcases for t
hem.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123927 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20 18:06:58 +00:00
Bruno Cardoso Lopes
6b3a999f22 Add mcr*2 and mr*c2 support to thumb2 targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123919 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20 16:58:48 +00:00
Bruno Cardoso Lopes
fa5bd27fbe Add mcr* and mr*c support to thumb targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123917 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20 16:35:57 +00:00
Bruno Cardoso Lopes
3abd75bf1d Fix the encoding of mrrc and mcrr family of instructions. Also add testcases for mcr and mrc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123837 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-19 16:56:52 +00:00
Owen Anderson
6cd0b17ba7 When matching asm operands, always try to match the most restricted type first.
Unfortunately, while this is the "right" thing to do, it breaks some ARM
asm parsing tests because MemMode5 and ThumbMemModeReg are ambiguous.  This
is tricky to resolve since neither is a subset of the other.

XFAIL the test for now.  The old way was broken in other ways, just ways
we didn't happen to be testing, and our ARM asm parsing is going to require
significant revisiting at a later point anyways.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123786 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 23:01:21 +00:00
Bruno Cardoso Lopes
61505907f5 Create two new generic classes to represent the following VMRS/VMSR variations:
vmrs  reg, fpexc
vmrs  reg, fpsid
vmsr  fpexc, reg
vmsr  fpsid, reg



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123783 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 21:58:20 +00:00
Bruno Cardoso Lopes
e7255a80e3 Fix MRS encoding for arm and thumb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123778 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 21:31:35 +00:00
Bruno Cardoso Lopes
892fc6d7b6 Fix the encoding of t2ISB by using the right class and also parse it correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123776 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 21:17:09 +00:00
Bruno Cardoso Lopes
fdcee77887 Follow the current hack set and enable the correct parsing of bkpt while in thumb mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123772 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 20:55:11 +00:00
Bruno Cardoso Lopes
a461d42228 Add support for parsing and encoding ARM's official syntax for the BFI instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123770 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 20:45:56 +00:00
Daniel Dunbar
2e3cea3153 McARM: Start marking T2 address operands as such, for the benefit of the parser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123722 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18 03:06:03 +00:00
Rafael Espindola
1c10db3da9 Update tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123591 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16 18:02:57 +00:00
Evan Cheng
f3eb3bba16 Completed :lower16: / :upper16: support for movw / movt pairs on Darwin.
- Fixed :upper16: fix up routine. It should be shifting down the top 16 bits first.
- Added support for Thumb2 :lower16: and :upper16: fix up.
- Added :upper16: and :lower16: relocation support to mach-o object writer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123424 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14 02:38:49 +00:00
Owen Anderson
0fba714359 As far as I can tell, unified syntax uses c0-c15 instead of cr0-cr15 for mcr and friends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123407 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 22:38:16 +00:00
Evan Cheng
7597212abc Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a step
in the right direction. It eliminated some hacks and will unblock codegen
work. But it's far from being done. It doesn't reject illegal expressions,
e.g. (FOO - :lower16:BAR). It also doesn't work in Thumb2 mode at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123369 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 07:58:56 +00:00
Bill Wendling
7caebff83d Sort the register list based on the *actual* register numbers rather than the
enum values we give to them. <rdar://problem/8823730>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 21:20:59 +00:00
Jason W Kim
86a97f2e4d 1. Support ELF pcrel relocations for movw/movt:
R_ARM_MOVT_PREL and R_ARM_MOVW_PREL_NC.
2. Fix minor bug in ARMAsmPrinter - treat bitfield flag as a bitfield, not an enum.
3. Add support for 3 new elf section types (no-ops)




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123294 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 00:19:25 +00:00
Jason W Kim
9081b4b4cf Workaround for bug 8721.
.s Test added.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123292 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 23:53:41 +00:00
Chris Lattner
3a5004dc3e Fix PR8946, a missing reg/reg form of movdqu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123242 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 17:04:55 +00:00
Daniel Dunbar
352e148cbe McARM: Add more hard coded logic to SplitMnemonicAndCC to also split out the
carry setting flag from the mnemonic.

Note that this currently involves me disabling a number of working cases in
arm_instructions.s, this is a hopefully short term evil which will be rapidly
fixed (and greatly surpassed), assuming my current approach flies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123238 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 15:59:50 +00:00
Daniel Dunbar
8ab1112bdc McARM: Flush out hard coded known non-predicated mnemonic list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 21:01:03 +00:00
Rafael Espindola
2f867a63da Correctly disassemble truncated asm.
Patch by Richard Simth.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122962 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06 16:48:42 +00:00
Evan Cheng
bbdcd44361 Convert MC tests to .s so codegen changes won't break them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122786 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-03 23:47:14 +00:00
Rafael Espindola
7a54997d67 Fix PR8878.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122658 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-01 19:05:35 +00:00
Nick Lewycky
c00210cef2 Add another non-commutable instruction that gas accepts commuted forms for.
Fixes PR8861.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122641 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-30 22:10:49 +00:00
Daniel Dunbar
b2624eda5a MC/Mach-O/Thumb: Set the thumb bit in the symbol table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122630 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-29 14:14:06 +00:00
Rafael Espindola
caf1158b0f Correctly encode pcrel|indirect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122624 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-29 04:31:26 +00:00
Rafael Espindola
a7e450574c Fix bug when trying to output uint16_t or uint32_t.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122615 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-29 02:30:49 +00:00
Rafael Espindola
b40a71fda1 Implement cfi_def_cfa. Also don't convert to dwarf reg numbers twice. Looks
like 6 is a fixed point of that and so the previous tests were OK :-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122614 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-29 01:42:56 +00:00
Rafael Espindola
b4601bd2ff Implement cfi_def_cfa_register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122612 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-29 00:26:06 +00:00
Rafael Espindola
b790a17efb Initial .cfi_offset implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122611 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-29 00:09:59 +00:00
Rafael Espindola
3b78cdc57a Don't produce a "DW_CFA_advance_loc 0".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122609 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-28 23:38:03 +00:00
Rafael Espindola
fe024d0a62 Implement .cfi_remember_state and .cfi_restore_state.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122602 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-28 18:36:23 +00:00
Rafael Espindola
245a1e2041 Relax address updates in the eh_frame section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122591 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-28 05:39:27 +00:00
Rafael Espindola
5bba084253 Start adding basic support for emitting the call frame instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122590 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-28 04:15:37 +00:00
Rafael Espindola
bdc3167c08 Add support for .cfi_lsda.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122584 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-27 15:56:22 +00:00
Daniel Dunbar
e862453806 MC/Mach-O/Thumb: Select appropriate relocation types for Thumb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122583 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-27 14:49:49 +00:00
Rafael Espindola
c3a561cb8e Handle reloc_riprel_4byte_movq_load. Should make the bots happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122579 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-27 02:03:24 +00:00
Rafael Espindola
3a83c40ab6 Add support for the same encodings of the personality function that gnu as
supports.

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2010-12-27 00:36:05 +00:00
Rafael Espindola
98976610d2 Add support for @note. Patch by Jörg Sonnenberger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122568 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-26 21:30:59 +00:00
Rafael Espindola
d7c8ccae8e Add basic support for .cfi_personality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122566 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-26 20:20:31 +00:00
Chris Lattner
7ab3cc32d6 Generalize a previous change, fixing PR8855 - an valid large immediate
rejected by the mc assembler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122557 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-25 21:36:35 +00:00
Daniel Dunbar
4010dd72b8 MC/Mach-O/ARM: Start handling some Thumb branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122547 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 16:41:46 +00:00
Kevin Enderby
d82ed5b734 In llvm-mc parse a Hash token as a full line comment. Allows handling of
preprocessed .s files and matches darwin gas.  rdar://8798690
Also fix a comment on the next line of AsmParser.cpp after this new code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122531 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-24 00:12:02 +00:00
Daniel Dunbar
72123334ad MC/Mach-O/ARM: Don't try to use scattered relocs for BR24 fixups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122441 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 21:26:43 +00:00
Rafael Espindola
ecbbf40d5c Add reduced test from 8845.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122438 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 21:15:13 +00:00
Daniel Dunbar
df561e0234 MC/Mach-O/ARM: We always use the SECTDIFF reloc type on ARM, which is
esp. important given that the LOCAL_SECTDIFF enumeration got redefined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122412 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 16:52:19 +00:00
Daniel Dunbar
294e67861c MC/Mach-O/ARM: Add enough relocation logic to get BR24 relocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122407 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 16:19:24 +00:00
Rafael Espindola
f01212489b Simplify the handling of .size expressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-22 16:03:00 +00:00
Wesley Peck
d66a32c35f Teach the MBlaze disassembler to disassemble special purpose registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122269 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20 21:18:04 +00:00
Roman Divacky
d149186e15 Set the value of absolute symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122268 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20 21:14:39 +00:00
Roman Divacky
1ae3c165f7 Print all 64bits for st_value and st_size. Adjust tests accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122263 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20 20:49:43 +00:00
Wesley Peck
9c0068f0a3 Teach the MBlaze asm parser how to parse special purpose register names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122261 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20 20:43:24 +00:00
Roman Divacky
7529b16410 Add support for lexing single quotes like 'c'.
This fixed 8615.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122150 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 08:56:37 +00:00
Rafael Espindola
54f08852f6 Add a test that shows that we produce no fixups when computing the difference
of two symbols in the same fragment.

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2010-12-18 05:07:45 +00:00
Rafael Espindola
a5ff979c11 Test for push being relaxed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122124 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 01:16:59 +00:00
Daniel Dunbar
17304b3489 MC/Expr: Implemnt more aggressive folding during symbol evaluation using
IsSymbolRefDifferenceFullyResolved(). For example, we will now fold away
something like:
--
_a:
...
L0:
...
L1:
...
.long (L1 - L0) / 2
--

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2010-12-17 05:50:33 +00:00
Rafael Espindola
dfe125cc9c "Fix" FDE alignment to match what gas does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122006 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 00:28:02 +00:00
Rafael Espindola
3ee33aa6f9 Make pushq produce signed relocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122005 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 22:50:01 +00:00
Bob Wilson
0406356cd4 Add Neon VCVT instructions for f32 <-> f16 conversions.
Clang is now providing intrinsics for these and so we need to support them
in the backend.  Radar 8068427.

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2010-12-15 22:14:12 +00:00
Bob Wilson
8d1b7e57e5 Fix misspelled target triples in MC/ARM test commands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121901 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 22:14:01 +00:00
Rafael Espindola
2bf6afc277 Relax alignment fragments.
With this we don't need the EffectiveSize field anymore. Without that field
LayoutFragment only updates offsets and we don't need to invalidate the
current fragment when it is relaxed (only the ones following it).

This is also a very small improvement in the accuracy of the layout info as
we now use the after relaxation size immediately.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121857 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 08:45:53 +00:00
Rafael Espindola
f9a4476173 Patch by David Meyer to avoid a O(N^2) behaviour when relaxing fragments.
Since we now don't update addresses so early, we might relax a bit more than
we need to. This is simillar to the issue in PR8467.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121856 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 07:39:29 +00:00
Kevin Enderby
53ef11884f Add some more MC tests for ARM arithmetic instructions that update or don't
update the condition codes.  These come from my test generator and are just
the ones that MC currently assembles correctly.


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2010-12-15 01:24:36 +00:00
Daniel Dunbar
abfbac52df MC/ARM: Fix-up fixup offset for fixup_arm_branch target specific fixup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121772 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 17:37:16 +00:00
Rafael Espindola
89b9372605 Fixed version of 121434 with no new memory leaks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121471 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 07:39:47 +00:00