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106 Commits

Author SHA1 Message Date
Evan Cheng
c356a572e3 Reflects MachineConstantPoolEntry changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30279 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-12 21:04:05 +00:00
Evan Cheng
25ab690a43 Committing X86-64 support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30177 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 06:48:29 +00:00
Evan Cheng
1453de5aa9 Oops. Bad typo. Without the check of N1.hasOneUse() bad things can happen. 
Suppose the TokenFactor can reach the Op:

       [Load chain]
           ^
           |
         [Load]
         ^    ^
         |    |
        /      \-
       /         |
      /          [Op]
     /          ^ ^
     |        ..  |
     |       /    |
   [TokenFactor]  |
       ^          |
       |          |
        \        /
         \      /
         [Store]

If we move the Load below the TokenFactor, we would have created a cycle in
the DAG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30040 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 22:52:28 +00:00
Evan Cheng
4a888584ea Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29962 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 21:42:58 +00:00
Evan Cheng
780413d462 Don't performance load/op/store transformation if op produces a floating point 
or vector result. X86 does not have load/mod/store variants of those
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29957 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 18:37:37 +00:00
Evan Cheng
e50794adda - Enable x86 isel preprocessing by default unless -fast is specified. 
- Also disable isel load folding if -fast.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29956 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 18:28:33 +00:00
Evan Cheng
82a35b34fb Avoid making unneeded load/mod/store transformation which can hurt performance. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29952 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 06:44:17 +00:00
Evan Cheng
70e674e95e Add an optional pass to preprocess the DAG before x86 isel to allow selecting more load/mod/store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29943 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-28 20:10:17 +00:00
Chris Lattner
a4f0b3a084 s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29911 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-27 12:54:02 +00:00
Evan Cheng
0b828e08f9 Do not use getTargetNode() and SelectNodeTo() which takes more than 3 
SDOperand arguments. Use the variants which take an array and number instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29907 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-27 08:14:06 +00:00
Evan Cheng
95514bae73 SelectNodeTo now returns a SDNode*. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29901 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 08:00:10 +00:00
Evan Cheng
9ade218533 Select() no longer require Result operand by reference. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29898 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 05:34:46 +00:00
Evan Cheng
0469990e79 Match tblgen changes; clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29894 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 01:05:16 +00:00
Evan Cheng
eb8730d131 Doh. Incorrectly inverted condition. Also add a isOnlyUse check to match tablegen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29741 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-16 23:59:00 +00:00
Evan Cheng
23329f5e03 SelectNodeTo() may return a SDOperand that is different from the input. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29726 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-16 07:30:09 +00:00
Evan Cheng
64a752f7c7 Match tablegen changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29604 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-11 09:08:15 +00:00
Evan Cheng
f4b4c416d3 Eliminate reachability matrix. It has to be calculated before any instruction 
selection is done. That's rather expensive especially in situations where it
isn't really needed.
Move back to a searching the predecessors, but make use of topological order
to trim the search space.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29559 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-08 00:31:00 +00:00
Evan Cheng
2ef88a09b7 Match tablegen isel changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29549 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-07 22:28:20 +00:00
Evan Cheng
4876dc5b13 Reflect change to AssignTopologicalOrder(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29480 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-02 22:01:32 +00:00
Evan Cheng
686c4a18f1 Use of vector<bool> causes some horrendous compile time regression (2x)! 
Looks like libstdc++ implementation does not scale very well. Switch back
to using directly managed arrays.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29469 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-02 09:18:33 +00:00
Evan Cheng
db3cc3d7d6 Factor topological order code to SelectionDAG. Clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29430 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-01 08:17:22 +00:00
Evan Cheng
37e1803a66 Can't spell. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29383 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 06:33:41 +00:00
Evan Cheng
ba27731f35 Some clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29382 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 06:05:06 +00:00
Evan Cheng
f2dfafcbc1 Rename IsFoldableBy to CanBeFoldedleBy 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29376 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 01:03:48 +00:00
Evan Cheng
2584d93acf Node selected into address mode cannot be folded. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29374 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 00:49:31 +00:00
Evan Cheng
63ce5682e2 Another duh. Determine topological order before any target node is added. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29371 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 00:10:59 +00:00
Evan Cheng
0e2c36fcc2 Brain cramp.. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29370 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 23:35:40 +00:00
Evan Cheng
b3c334674d Allocating too large an array for ReachibilityMatrix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29367 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 22:35:40 +00:00
Evan Cheng
5fa5de80e2 Calculate the portion of reachbility matrix on demand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29366 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 22:10:00 +00:00
Evan Cheng
8cbc93aadb isNonImmUse is replaced by IsFoldableBy 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29365 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 21:19:10 +00:00
Evan Cheng
a8df1b4296 Use reachbility information to determine whether a node can be folded into another during isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29346 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 16:44:36 +00:00
Chris Lattner
2c79de8018 Hide x86 symbols 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28976 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-28 23:27:49 +00:00
Chris Lattner
c0bad5706e Add support for "m" inline asm constraints. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28728 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-08 18:03:49 +00:00
Evan Cheng
3649b0efa5 Cygwin support. Patch by Anton Korobeynikov! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28672 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-02 22:38:37 +00:00
Evan Cheng
aede9b9598 Use xor to clear a register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28667 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-02 21:20:34 +00:00
Evan Cheng
eaf1e31775 Remove bogus comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28564 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 20:24:48 +00:00
Evan Cheng
e6ad27e917 A addressing mode folding enhancement: 
Fold c2 in (x << c1) | c2 where (c2 < c1)
e.g.
int test(int x) {
  return (x << 3) + 7;
}

This can be codegen'd as:
leal 7(,%eax,8), %eax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28550 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 06:59:36 +00:00
Evan Cheng
6a3d5a62f0 Assert if InflightSet is not cleared after instruction selecting a BB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28459 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 00:24:28 +00:00
Evan Cheng
afe358e7d4 Clear HandleMap and ReplaceMap after instruction selection. Or it may cause 
non-deterministic behavior.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28454 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-24 20:46:25 +00:00
Chris Lattner
d74ea2bbd8 Patches to make the LLVM sources more -pedantic clean. Patch provided 
by Anton Korobeynikov!  This is a step towards closing PR786.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28447 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-24 17:04:05 +00:00
Evan Cheng
3c380e71e1 Back out indirect branch load folding hack. It broke some tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28425 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-21 06:28:50 +00:00
Evan Cheng
4f7f71de43 - Use of load's chain result should be redirected to load's chain operand. 
If it reads the chain result of the call, then the use, callseq_start,
  and call would form a cycle!
- Don't forget handle node replacement!
- There could also be a TokenFactor between the load and the callseq_start.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28420 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-20 09:21:39 +00:00
Evan Cheng
6b2e254437 Missing break statements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28418 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-20 07:44:28 +00:00
Evan Cheng
fb914c43ba Remove unused patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28417 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-20 01:40:16 +00:00
Evan Cheng
b245d92328 Handle indirect call which folds a load manually. This never matches by 
the TableGen generated code since the load's chain result is read by
the callseq_start node.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28416 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-20 01:36:52 +00:00
Evan Cheng
069287d460 X86 integer register classes naming changes. Make them consistent with FP, vector classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28324 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 07:21:53 +00:00
Evan Cheng
0bbac9ffd1 Remove dead code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28261 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 19:03:56 +00:00
Evan Cheng
403be7eafc Fixing truncate. Previously we were emitting truncate from r16 to r8 as 
movw. That is we promote the destination operand to r16. So
        %CH = TRUNC_R16_R8 %BP
is emitted as
        movw %bp, %cx.

This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
        movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.

We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.

Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28164 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 08:01:26 +00:00
Evan Cheng
8f7f7125e9 Better implementation of truncate. ISel matches it to a pseudo instruction 
that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28119 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 05:40:20 +00:00
Chris Lattner
420736dc85 #include Intrinsics.h into all dag isels 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27109 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 06:47:10 +00:00