Commit Graph

99523 Commits

Author SHA1 Message Date
Saleem Abdulrasool
d28c094c80 tools: support decoding ARM EHABI opcodes in readobj
Add support to llvm-readobj to decode the actual opcodes.  The ARM EHABI opcodes
are a variable length instruction set that describe the operations required for
properly unwinding stack frames.

The primary motivation for this change is to ease the creation of tests for the
ARM EHABI object emission as well as the unwinding directive handling in the ARM
IAS.

Thanks to Logan Chien for an extra test case!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199708 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-21 02:33:15 +00:00
Saleem Abdulrasool
e502a6aad3 ARM IAS: add support for .unwind_raw directive
This implements the unwind_raw directive for the ARM IAS.  The unwind_raw
directive takes the form of a stack offset value followed by one or more bytes
representing the opcodes to be emitted.  The opcode emitted will interpreted as
if it were assembled by the opcode assembler via the standard unwinding
directives.

Thanks to Logan Chien for an extra test!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199707 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-21 02:33:10 +00:00
Saleem Abdulrasool
27276437ae ARM IAS: support .personalityindex
The .personalityindex directive is equivalent to the .personality directive with
the ARM EABI personality with the specific index (0, 1, 2).  Both of these
directives indicate personality routines, so enhance the personality directive
handling to take into account personalityindex.

Bonus fix: flush the UnwindContext at the beginning of a new function.

Thanks to Logan Chien for additional tests!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199706 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-21 02:33:02 +00:00
Kevin Qin
9fe8c2b527 [AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.
It was commited as r199628 but reverted in r199628 as causing
regression test failed. It's because of old vervsion of patch
I used to commit. Sorry for mistake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199704 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-21 01:48:52 +00:00
Nick Lewycky
665b92322a Add operator!= for FoldingSetNodeID and FoldingSetNodeIDRef. Implementation in
the header forwards to operator== which is not in the header.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199702 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-21 01:29:37 +00:00
Kevin Enderby
527d783837 Tweak the MCExternalSymbolizer to not use the SymbolLookUp() call back
to not guess at a symbol name in some cases.

The problem is that in object files assembled starting at address 0, when
trying to symbolicate something that starts like this:

% cat x.s
_t1:
	vpshufd	$0x0, %xmm1, %xmm0

the symbolic disassembly can end up like this:

% otool -tV x.o 
x.o:
(__TEXT,__text) section
_t1:
0000000000000000	vpshufd	$_t1, %xmm1, %xmm0

Which is in this case produced incorrect symbolication.

But it is useful in some cases to use the SymbolLookUp() call back
to guess at some immediate values.  For example one like this
that does not have an external relocation entry:

% cat y.s
_t1:
	movl	$_d1, %eax
.data
_d1:	.long	0

% clang -c -arch i386 y.s

% otool -tV y.o 
y.o:
(__TEXT,__text) section
_t1:
0000000000000000	movl	$_d1, %eax

% otool -rv y.o 
y.o:
Relocation information (__TEXT,__text) 1 entries
address  pcrel length extern type    scattered symbolnum/value
00000001 False long   False  VANILLA False     2 (__DATA,__data)

So the change is based on it is not likely that an immediate Value
coming from an instruction field of a width of 1 byte, other than branches
and items with relocation, are not likely symbol addresses.

With the change the first case above simply becomes:

% otool -tV x.o 
x.o:
(__TEXT,__text) section
_t1:
0000000000000000	vpshufd	$0x0, %xmm1, %xmm0

and the second case continues to work as expected.

rdar://14863405


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199698 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-21 00:23:17 +00:00
Kevin Enderby
bf2712ae43 To allow the X86 verbose assembly to print its informative comments
when used with symbolic disassembly, add a check that the operand
is an immediate and has not been symbolicated to MCExpr operand.

I’m trying to enable the ‘C’ disassembly API option
LLVMDisassembler_Option_SetInstrComments for darwin’s
otool(1) that uses the llvm disassembler API.  The problem is
that the disassembler API can change an immediate operand to
an MCExpr operand if it symbolicates it with the call backs.
And if it does the code in llvm::EmitAnyX86InstComments()
will crash when it assumes these operands are immediates.

The fix for this is very straight forward to just protect the call
to getImm() with a check of isImm().  So if the immediate for
an instruction is symbolicated it simply doesn’t get the X86
verbose assembly comments:

% otool -tV test_asm.o
test_asm.o:
(__TEXT,__text) section
_t1:
0000000000000000	vpshufd	$_t1, %xmm1, %xmm0
0000000000000005	retq
0000000000000006	nopw	%cs:_t1(%rax,%rax)
_t2:
0000000000000010	vpshufd	$-0x1, %xmm0, %xmm0     ## xmm0 = xmm0[3,3,3,3]
0000000000000015	retq
0000000000000016	nopw	%cs:_t1(%rax,%rax)
_t3:
0000000000000020	vpshufd	$_t1, %xmm1, %xmm0
0000000000000025	retq
0000000000000026	nopw	%cs:_t1(%rax,%rax)
_t4:
0000000000000030	vpshufd	$0x2d, %xmm0, %xmm0     ## xmm0 = xmm0[1,3,2,0]
0000000000000035	retq

The fact that the immediate $0x0 is being symbolicated at
all in this case is a different problem which my next patch
will address.

rdar://10989286


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199697 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-21 00:18:51 +00:00
Hal Finkel
07b072b24d Update StackProtector when coloring merges stack slots
StackProtector keeps a ValueMap of alloca instructions to layout kind tags for
use by PEI and other later passes. When stack coloring replaces one alloca with
a bitcast to another one, the key replacement in this map does not work.
Instead, provide an interface to manage this updating directly. This seems like
an improvement over the old behavior, where the layout map would not get
updated at all when the stack slots were merged. In practice, however, there is
likely no observable difference because PEI only did anything special with
'large array' kinds, and if one large array is merged with another, than the
replacement should already have been a large array.

This is an attempt to unbreak the clang-x86_64-darwin11-RA builder.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199684 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 19:49:14 +00:00
Andrea Di Biagio
825b93b2df [X86] Teach how to combine a vselect into a movss/movsd
Add target specific rules for combining vselect dag nodes into movss/movsd
when possible.

If the vector type of the vselect dag node in input is either MVT::v4i13 or
MVT::v4f32, then try to fold according to rules:

  1) fold (vselect (build_vector (0, -1, -1, -1)), A, B) -> (movss A, B)
  2) fold (vselect (build_vector (-1, 0, 0, 0)), A, B) -> (movss B, A)

If the vector type of the vselect dag node in input is either MVT::v2i64 or
MVT::v2f64 (and we have SSE2), then try to fold according to rules:

  3) fold (vselect (build_vector (0, -1)), A, B) -> (movsd A, B)
  4) fold (vselect (build_vector (-1, 0)), A, B) -> (movsd B, A)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199683 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 19:35:22 +00:00
Adrian Prantl
16d00e4b64 Debug info: On ARM ensure that all __TEXT sections come before the
optional DWARF sections, so compiling with -g does not result in
different code being generated for PC-relative loads.

This is reapplying a diet r197922 (__TEXT-only).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199681 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 19:15:59 +00:00
Adrian Prantl
6e08a410aa Revert "Debug info: On ARM ensure that the data sections come before the"
Cut back on the cargo cult. The order of __DATA sections doesn't affect
generated code.

This reverts commit r197922.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199680 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 19:15:55 +00:00
Owen Anderson
daa4c91647 Allow SMUL_LOHI and UMUL_LOHI to be narrow to MUL on targets where MUL is Custom rather than Legal. Even if the target is doing some kind of expansion for MUL, it's pretty much guaranteed to be more efficent than whatever it does for SMUL_LOHI or UMUL_LOHI!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199678 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 18:41:34 +00:00
James Molloy
61a7bb039a Remove the useless pseudo instructions VDUPfdf and VDUPfqf, replacing them with patterns to match VDUPLN.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199675 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 17:14:48 +00:00
NAKAMURA Takumi
95dd2f4e8d [CMake] LLVMProcessSources.cmake: Add include(CMakeParseArguments).
I didn't realize that cmake_parse_arguments() would require explicit inclusion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199674 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 17:05:49 +00:00
NAKAMURA Takumi
04a62614a3 Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199667 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 15:47:15 +00:00
Hal Finkel
54c251c77f Fix misched-aa-colored.ll to require asserts (trying again)
Perhaps it needs to be in caps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199661 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 14:15:28 +00:00
Hal Finkel
42691ad862 Fix misched-aa-colored.ll to require asserts.
-misched=shuffle is NDEBUG only. Maybe we should change that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199659 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 14:09:34 +00:00
Hal Finkel
48f7a2389e Update IR when merging slots in stack coloring
The way that stack coloring updated MMOs when merging stack slots, while
correct, is suboptimal, and is incompatible with the use of AA during
instruction scheduling. The solution, which involves the use of const_cast (and
more importantly, updating the IR from within an MI-level pass), obviously
requires some explanation:

When the stack coloring pass was originally committed, the code in
ScheduleDAGInstrs::buildSchedGraph tracked possible alias sets by using
GetUnderlyingObject, and all load/store and store/store memory control
dependencies where added between SUs at the object level (where only one
object, that returned by GetUnderlyingObject, was used to identify the object
associated with each MMO). When stack coloring merged stack slots, it would
replace MMOs derived from the remapped alloca with the alloca with which the
remapped alloca was being replaced. Because ScheduleDAGInstrs only used single
objects, and tracked alias sets at the object level, this was a fine solution.

In r169744, (Andy and) I updated the code in ScheduleDAGInstrs to use
GetUnderlyingObjects, and track alias sets using, potentially, multiple
underlying objects for each MMO. This was done, primarily, to provide the
ability to look through PHIs, and provide better scheduling for
induction-variable-dependent loads and stores inside loops. At this point, the
MMO-updating code in stack coloring became suboptimal, because it would clear
the MMOs for (i.e. completely pessimize) all instructions for which r169744
might help in scheduling. Updating the IR directly is the simplest fix for this
(and the one with, by far, the least compile-time impact), but others are
possible (we could give each MMO a small vector of potential values, or make
use of a remapping table, constructed from MFI, inside ScheduleDAGInstrs).

Unfortunately, replacing all MMO values derived from the remapped alloca with
the base replacement alloca fundamentally breaks our ability to use AA during
instruction scheduling (which is critical to performance on some targets). The
reason is that the original MMO might have had an offset (either constant or
dynamic) from the base remapped alloca, and that offset is not present in the
updated MMO. One possible way around this would be to use
GetPointerBaseWithConstantOffset, and update not only the MMO's value, but also
its offset based on the original offset. Unfortunately, this solution would
only handle constant offsets, and for safety (because AA is not completely
restricted to deducing relationships with constant offsets), we would need to
clear all MMOs without constant offsets over the entire function. This would be
an even worse pessimization than the current single-object restriction. Any
other solution would involve passing around a vector of remapped allocas, and
teaching AA to use it, introducing additional complexity and overhead into AA.

Instead, when remapping an alloca, we replace all IR uses of that alloca as
well (optionally inserting a bitcast as necessary). This is even more efficient
that the old MMO-updating code in the stack coloring pass (because it removes
the need to call GetUnderlyingObject on all MMO values), removes the
single-object pessimization in the default configuration, and enables the
correct use of AA during instruction scheduling (all without any additional
overhead).

LLVM now no longer miscompiles itself on x86_64 when using -enable-misched
-enable-aa-sched-mi -misched-bottomup=0 -misched-topdown=0 -misched=shuffle!
Fixed PR18497.

Because the alloca replacement is now done at the IR level, unless the MMO
directly refers to the remapped alloca, the change cannot be seen at the MI
level. As a result, there is no good way to fix test/CodeGen/X86/pr14090.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199658 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 14:03:16 +00:00
Hal Finkel
5e908e3bab Track multiple stores per object when using AA in ScheduleDAGInstrs
When using AA to break false chain dependencies, we need to track multiple
stores per object in ScheduleDAGInstrs. Historically, we tracked potential alias
chains at the object level, and so all loads of an object would retain
dependencies on any store to that object. With AA, however, this is not
sufficient: non-overlapping stores and loads to the same object all need to be
tested for dependencies separately, we cannot only test all loads to an object
against only the last store (see PR18497 for an explicit example).

To mitigate any unwelcome compile-time impact when not using AA, only one store
is kept in the list per object when not using AA.

This, along with a stack coloring change to come shortly, will provide a test
case, fix PR18497 (and allow LLVM to compile itself using -enable-aa-sched-mi
on x86-64).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199657 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 14:03:02 +00:00
David Woodhouse
9334b07527 [x86] Fix disassembly of MOV16ao16 et al.
The addition of IC_OPSIZE_ADSIZE in r198759 wasn't quite complete. It
also turns out to have been unnecessary. The disassembler handles the
AdSize prefix for itself, and doesn't care about the difference between
(e.g.) MOV8ao8 and MOB8ao8_16 definitions. So just let them coexist and
don't worry about it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199654 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 12:02:53 +00:00
David Woodhouse
a3fb0f9773 [x86] Fix 16-bit disassembly of JCXZ/JECXZ
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199653 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 12:02:48 +00:00
David Woodhouse
fc19ac9654 [x86] Rename MOVSD/STOSD/LODSD/OUTSD to MOVSL/STOSL/LODSL/OUTSL
The disassembler has a special case for 'L' vs. 'W' in its heuristic for
checking for 32-bit and 16-bit equivalents. We could expand the heuristic,
but better just to be consistent in using the 'L' suffix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199652 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 12:02:44 +00:00
David Woodhouse
d1c3f6664e [x86] Fix disassembly of callw instruction
Not quite sure why this was marked isAsmParserOnly, but it means that the
disassembler can't see it either.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199651 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 12:02:40 +00:00
David Woodhouse
7360e8caa3 [x86] Fix 16-bit handling of OpSize bit
When disassembling in 16-bit mode the meaning of the OpSize bit is
inverted. Instructions found in the IC_OPSIZE context will actually
*not* have the 0x66 prefix, and instructions in the IC context will
have the 0x66 prefix. Make use of the existing special-case handling
for the 0x66 prefix being in the wrong place, to cope with this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199650 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 12:02:35 +00:00
David Woodhouse
e6f5bb99fc [x86] Infer disassembler mode from SubtargetInfo feature bits
Aside from cleaning up the code, this also adds support for the -code16
environment and actually enables the MODE_16BIT mode that was previously
not accessible.

There is no point adding any testing for 16-bit yet though; basically
nothing will work because we aren't handling the OpSize prefix correctly
for 16-bit mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199649 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 12:02:31 +00:00
David Woodhouse
70ece0ada7 [x86] Support i386-*-*-code16 triple for emitting 16-bit code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199648 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 12:02:25 +00:00
Chandler Carruth
1d9ab25560 [PM] Wire up the Verifier for the new pass manager and connect it to the
various opt verifier commandline options.

Mostly mechanical wiring of the verifier to the new pass manager.
Exercises one of the more unusual aspects of it -- a pass can be either
a module or function pass interchangably. If this is ever problematic,
we can make things more constrained, but for things like the verifier
where there is an "obvious" applicability at both levels, it seems
convenient.

This is the next-to-last piece of basic functionality left to make the
opt commandline driving of the new pass manager minimally functional for
testing and further development. There is still a lot to be done there
(notably the factoring into .def files to kill the current boilerplate
code) but it is relatively uninteresting. The only interesting bit left
for minimal functionality is supporting the registration of analyses.
I'm planning on doing that on top of the .def file switch mostly because
the boilerplate for the analyses would be significantly worse.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199646 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 11:34:08 +00:00
Kai Nacke
843fa74d38 ARM: add tlsldo relocation
Add support for the symbol(tlsldo) relocation. This is required in order to 
solve PR18554.

Reviewed by R. Golin, A. Korobeynikov.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199644 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 11:00:40 +00:00
NAKAMURA Takumi
b924b8b56c [CMake] llvm_process_sources: Introduce a parameter, ADDITIONAL_HEADERS.
ADDITIONAL_HEADERS is intended to add header files for IDEs as hint.

For example:
  add_llvm_library(LLVMSupport
    Host.cpp
    ADDITIONAL_HEADERS
      Unix/Host.inc
      Windows/Host.inc
    )

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199639 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 10:20:23 +00:00
Artyom Skrobov
3767c7446e [ARM] Do not generate Tag_DIV_use=AllowDIVExt when hardware div is non-optional: it should have the default value of AllowDIVIfExists
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199638 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 10:18:42 +00:00
Chandler Carruth
70662820ee Revert my commit in r199620 that added sections about namespaces to the
coding standards, and instead fix the existing section.

Thanks to Daniel Jasper for pointing out we already had a section
devoted to this topic. Instead of adding sections, just hack on this
section some. Also fix the example in the anonymous namespace section
below it to agree with the new advice.

As a re-cap, this switches the LLVM preferred style to never indent
namespaces. Having two approaches just led to endless (and utterly
pointless) debates about what was "small enough". This wasn't helping
anyone. The no-indent rule is easy to understand and doesn't really make
anything harder to read. Moreover, with tools like clang-format it is
considerably nicer to have simple consistent rules.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199637 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 10:15:32 +00:00
Chandler Carruth
ce30a8106d Revert r199628: "[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT."
This test fails the newly added regression tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199631 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 08:18:01 +00:00
Chandler Carruth
d15717170f Fix a DenseMap iterator invalidation bug causing lots of crashes when
type units were enabled. The crux of the issue is that the
addDwarfTypeUnitType routine can end up being indirectly recursive. In
this case, the reference into the dense map (TU) became invalid by the
time we popped all the way back and used it to add the DIE type
signature.

Instead, use early return in the case where we can bypass the recursive
step and creating a type unit. Then use the pointer to the new type unit
to set up the DIE type signature in the case where we have to.

I tried really hard to reduce a testcase for this, but it's really
annoying. You have to get this to be mid-recursion when the densemap
grows. Even if we got a test case for this today, it'd be very unlikely
to continue exercising this pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199630 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 08:07:07 +00:00
Owen Anderson
1e1446bf84 Fix all the remaining lost-fast-math-flags bugs I've been able to find. The most important of these are cases in the generic logic for combining BinaryOperators.
This logic hadn't been updated to handle FastMathFlags, and it took me a while to detect it because it doesn't show up in a simple search for CreateFAdd.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199629 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 07:44:53 +00:00
Kevin Qin
f55ec9ac18 [AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199628 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 07:32:26 +00:00
Saleem Abdulrasool
773e8d0dd6 MC: whitespace
Remove hard tabs in favour of spaces.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199624 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 04:10:11 +00:00
Chandler Carruth
3bbede5a24 [PM] Fix a contradiction in the comments noticed by Anders.
Have I mentioned that functions returning true on error and false on
success are confusing? They're more confusing when their name is
"verify". Anyways...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199622 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 02:32:02 +00:00
Kevin Qin
7582d8d76f [AArch64 NEON] Accept both #0.0 and #0 for comparing with floating point zero in asm parser.
For FCMEQ, FCMGE, FCMGT, FCMLE and FCMLT, floating point zero will be
printed as #0.0 instead of #0. To support the history codes using #0,
we consider to let asm parser accept both #0.0 and #0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199621 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 02:14:05 +00:00
Chandler Carruth
5d696a91c8 Add some wording to the coding standards to say how to indent namespaces
(and to mention namespace ending comments). This is based on a quick
discussion on the developer mailing list where there was essentially no
objections to a simple and consistent rule. This should avoid future
debates about whether or not a namespace is "big enough" to indent. It
also matches clang-format's current behavior with LLVM source code which
hasn't really seen any opposition in code reviews that I spot checked.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199620 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-20 01:40:43 +00:00
Michael Gottesman
ee804f423d Move the retrieval of VT after all of the early exits from PerformOrCombine that do not use VT. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199612 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-19 21:06:00 +00:00
Michael Gottesman
7320de5ce2 [APInt] Fix nearestLogBase2 to return correct answers for very large APInt and APInt with a bitwidth of 1.
I also improved the comments, added some more tests, etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199610 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-19 20:33:48 +00:00
Michael Gottesman
e7413972a4 [APInt] Fixed bug where APInt(UINT32_MAX, 0) would blow up when being constructed.
This was due to arithmetic overflow in the getNumBits() computation. Now we
cast BitWidth to a uint64_t so that does not occur during the computation. After
the computation is complete, the uint64_t is truncated when the function
returns.

I know that this is not something that is likely to happen, but it *IS* a valid
input and we should not blow up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199609 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-19 20:33:38 +00:00
Benjamin Kramer
b45edea9b3 InstCombine: Modernize a bunch of cast combines.
Also make them vector-aware.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199608 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-19 20:05:13 +00:00
Benjamin Kramer
2b03d0051f InstCombine: Hoist 3 copies of AddOne/SubOne into a header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199605 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-19 16:56:10 +00:00
Benjamin Kramer
c7645e860a InstCombine: Replace a hand-rolled version of isKnownToBeAPowerOfTwo with the real thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199604 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-19 16:48:41 +00:00
Benjamin Kramer
0487faa97b InstCombine: Teach most integer add/sub/mul/div combines how to deal with vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199602 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-19 15:24:22 +00:00
Benjamin Kramer
3f6a9d705a InstCombine: Refactor fmul/fdiv combines to handle vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199598 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-19 13:36:27 +00:00
NAKAMURA Takumi
6a9e4a8254 [CMake] Introduce new scheme of LLVM_TOOLS_BINARY_DIR and LLVM_LIBRARY_DIR
In LLVM build tree, they points corresponding INTDIR.

  In Clang standalone tree, they points external dir (llvm-config's --bindir and --libdir).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199595 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-19 12:52:10 +00:00
NAKAMURA Takumi
f594ef9a1a [CMake] Add comments in llvm/CMakeLists.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199594 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-19 12:47:26 +00:00
NAKAMURA Takumi
a0375d550f [CMake] Deprecate LLVM_TOOLS_BINARY_DIR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199593 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-19 12:47:22 +00:00