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19850 Commits

Author SHA1 Message Date
Justin Holewinski
d57c1bc0b6 PTX: Add new patterns for bitconvert and any_extend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140753 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-29 01:13:12 +00:00
Jakob Stoklund Olesen
5cd4ee7770 Revert r140731, "Define classes for unary and binary FP instructions and use them to define" 
It broke the unit tests.  Please reapply with tests fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140735 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 23:59:28 +00:00
Evan Cheng
9b88d2d782 Tighten a ARM dag combine condition to avoid an identity transformation, which 
ends up introducing a cycle in the DAG.

rdar://10196296


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140733 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 23:16:31 +00:00
Akira Hatanaka
d42ca4607b Define classes for unary and binary FP instructions and use them to define 
multiclasses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140731 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 21:58:01 +00:00
Eli Friedman
7d3e2b78c7 PR11033: Make sure we don't generate PCMPGTQ and PCMPEQQ if the target CPU does not support them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140723 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 21:00:25 +00:00
Bill Wendling
b18abd077e Perform the lowering only if there are invokes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140719 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 20:29:45 +00:00
Bill Wendling
39689c8154 Ahem...actually *add* the ARMSjLjLowering pass to the pass manager. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140718 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 20:29:28 +00:00
Justin Holewinski
cfab2be391 PTX: Fix alignment logic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140709 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 18:24:58 +00:00
Akira Hatanaka
aa7579025f Rename predicate In32BitMode to NotFP64bit and add definition of IsFP64bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140705 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 18:11:19 +00:00
Akira Hatanaka
d9f958375f Remove definitions of branch-on-FP-likely instructions. They are deprecated. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140704 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 17:56:55 +00:00
Akira Hatanaka
d2d00edc01 Mips64 predicate definitions. Patch by Liu. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140703 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 17:50:27 +00:00
Justin Holewinski
ed0e4c85c4 PTX: MC-ize the PTX backend (patch 2 of N) 
Get rid of some of the no-longer-needed parts of PTXAsmPrinter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140698 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 14:32:06 +00:00
Justin Holewinski
d8e4ed2686 PTX: MC-ize the PTX back-end (patch 1 of N) 
Lay some groundwork for converting to MC-based asm printer. This is the first
of probably many patches to bring the back-end back up-to-date with all of the
recent MC changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140697 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 14:32:04 +00:00
James Molloy
acad68da50 Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit. 
Build on previous patches to successfully distinguish between an M-series and A/R-series MSR and MRS instruction. These take different mask names and have a *slightly* different opcode format.

Add decoder and disassembler tests.

Improvement on the previous patch - successfully distinguish between valid v6m and v7m masks (one is a subset of the other). The patch had to be edited slightly to apply to ToT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140696 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 14:21:38 +00:00
Benjamin Kramer
ca9215970d PTX: Simplify code. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140680 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 04:32:36 +00:00
Benjamin Kramer
8adae0c940 PTX: Pass param name strings per const reference. 
The copies caused use-after-free bugs on std::string implementations without COW (i.e. anything but libstdc++)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140679 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 04:08:02 +00:00
Jakob Stoklund Olesen
d4d4fca9c3 Rename SSEDomainFix -> lib/CodeGen/ExecutionDepsFix. 
I'll clean up the source in the next commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140663 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 00:01:54 +00:00
Akira Hatanaka
6c6db25c10 Remove MipsFPRound. Mips1 is no longer supported. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140661 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 23:55:37 +00:00
Jakob Stoklund Olesen
df4b35e3dd Remove X86-dependent stuff from SSEDomainFix. 
This also enables domain swizzling for AVX code which required a few
trivial test changes.

The pass will be moved to lib/CodeGen shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140659 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 23:50:46 +00:00
Ted Kremenek
833217bfb9 Unbreak CMake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140655 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 23:29:59 +00:00
Jakob Stoklund Olesen
13fd601e0f Implement TII::get/setExecutionDomain() for ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140653 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 22:57:21 +00:00
Jakob Stoklund Olesen
98e933f9ad Promote the X86 Get/SetSSEDomain functions to TargetInstrInfo. 
I am going to unify the SSEDomainFix and NEONMoveFix passes into a
single target independent pass.  They are essentially doing the same
thing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140652 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 22:57:18 +00:00
Jim Grosbach
25ddc2bf7e ARM Thumb2 asm parsing [SU]XT[BH] without rotate but with .w. 
Add inst alias to handle these assembly forms. Add tests, too.

rdar://10178799


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140647 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 22:18:54 +00:00
Bill Wendling
0481d29d49 This is the start of the new SjLj EH preparation pass, which will replace the 
current IR-level pass.

The old SjLj EH pass has some problems, especially with the new EH model. Most
significantly, it violates some of the new restrictions the new model has. For
instance, the 'dispatch' table wants to jump to the landing pad, but we cannot
allow that because only an invoke's unwind edge can jump to a landing pad. This
requires us to mangle the code something awful. In addition, we need to keep the
now dead landingpad instructions around instead of CSE'ing them because the
DWARF emitter uses that information (they are dead because no control flow edge
will execute them - the control flow edge from an invoke's unwind is superceded
by the edge coming from the dispatch).

Basically, this pass belongs not at the IR level where SSA is king, but at the
code-gen level, where we have more flexibility.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140646 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 22:14:12 +00:00
Akira Hatanaka
8eea4616bf Embed patterns in definitions of MFC1 and MTC1 instead of defining them outside 
of the instruction definitions using Pat<>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140644 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 22:01:01 +00:00
Jim Grosbach
5405d58e21 Rename AddSelectionDAGCSEId() to addSelectionDAGCSEId(). 
Naming conventions consistency. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140636 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 20:59:33 +00:00
Justin Holewinski
332850d8cc PTX: Fix case where printed alignment could be 0 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140624 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 19:25:49 +00:00
Justin Holewinski
f47dfba023 PTX: Use external symbols to keep track of params and locals. This also fixes 
a couple of outstanding issues with frame objects occuring as instruction
operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140616 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 18:12:55 +00:00
Jakob Stoklund Olesen
8e695eb5fa Use existing function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140615 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 17:55:08 +00:00
Akira Hatanaka
237e7a278a Fix function MipsRegisterInfo::getRegisterNumbering. 
Return numbers of 64-bit registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140609 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 17:15:27 +00:00
Akira Hatanaka
78fec58c07 Do not add the pass that restores $gp if target is Mips64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140607 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 16:58:43 +00:00
Akira Hatanaka
854222fa47 Mark MipsPseudo isPseudo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140598 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 04:57:54 +00:00
Justin Holewinski
13e0c805a2 PTX: Add support for sitofp in backend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140593 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 01:04:47 +00:00
Owen Anderson
2dafe200ca Remove extraneous commit garbage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140581 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 23:14:02 +00:00
Akira Hatanaka
f40de9d287 Set register class of a register according to value of HasMips64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140570 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 21:55:17 +00:00
Akira Hatanaka
8b4198da9d Define variable HasMips64 in MipsTargetLowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140569 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 21:47:02 +00:00
Akira Hatanaka
09dd60feef In single float mode, double precision FP arguments are passed in integer 
registers, so there is no need to check here.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140568 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 21:37:50 +00:00
Owen Anderson
0afa0094af ASR #32 is not allowed on Thumb2 USAT and SSAT instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140560 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 21:06:22 +00:00
Justin Holewinski
22d54da918 PTX: Fix memcpy intrinsic to handle 64-bit pointers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140556 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 19:19:48 +00:00
Justin Holewinski
bc97f4402b PTX: Implement PTXSelectionDAGInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140549 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 18:57:27 +00:00
Justin Holewinski
63bce90c0d PTX: Implement ISD::ANY_EXTEND 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140548 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 18:57:24 +00:00
Justin Holewinski
63602ed876 PTX: Fix detection of stack load/store vs. global load/store, as well as fix the 
printing of local offsets

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140547 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 18:57:22 +00:00
Justin Holewinski
22f3c59ec3 PTX: SM > 2.0 implies +double 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140536 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 16:20:36 +00:00
Justin Holewinski
58788503b8 PTX: Fix some lingering issues with stack allocation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140535 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 16:20:34 +00:00
Justin Holewinski
d5c3920f8d PTX: Split up the TableGen instruction definitions into logical units 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140534 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 16:20:31 +00:00
Justin Holewinski
c1d8fbd41a PTX: Unify handling of loads/stores 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140533 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 16:20:28 +00:00
Justin Holewinski
6b8990df42 PTX: Handle FrameIndex nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140532 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 16:20:25 +00:00
David Meyer
8f418b11d2 PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 2011-06-09-TailCallByVal and 2010-11-04-BigByval 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140516 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 06:13:20 +00:00
Craig Topper
100d86ada5 Fix VEX decoding in i386 mode. Fixes PR11008. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140515 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 05:12:43 +00:00
Jakob Stoklund Olesen
74e2d6ea66 Clean up code after renaming LowerSubregs -> ExpandPostRAPseudos. 
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140470 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-25 16:46:08 +00:00