6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-10-21 16:24:47 +00:00
Code Issues Projects Releases Wiki Activity
30,989 Commits 39 Branches 0 Tags 277 MiB
d592a28ca1
Commit Graph

18063 Commits

Author SHA1 Message Date
Evan Cheng
d592a28ca1 Fix for PR1279. Dead def has a live interval of length 1. Copy coalescing should 
not violate that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35396 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 01:30:37 +00:00
Bill Wendling
a80d7bd665 Remove cruft I put in there... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35394 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 01:02:54 +00:00
Chris Lattner
f2177b89a1 Fix a problem building llvm-gcc on amd64-unknown-freebsd6.2, due to the 
system assembler not groking legal instructions like "leal (,%esi,8), %ecx".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35393 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 00:58:40 +00:00
Bill Wendling
826f36ff80 Unbreak mmx arithmetic. It was barfing trying to do v8i8 arithmetic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35392 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 00:57:11 +00:00
Bill Wendling
6dc29ece6e Add the "unpack low packed data" instructions. This should be the last of 
the MMX instructions that are needed...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35389 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-27 21:20:36 +00:00
Devang Patel
2ad28e6c48 Use SmallPtrSet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35388 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-27 20:50:46 +00:00
Bill Wendling
ccc44add81 Fix so that pandn is emitted instead of an xor/and combo. Add integer 
comparison operators.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35385 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-27 20:22:40 +00:00
Evan Cheng
c7baf687ba Unbreaks non-debug builds. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35383 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-27 16:44:48 +00:00
Lauro Ramos Venancio
1baa1971a6 "The C standards do say that "char" may either be a "signed char" or "unsigned 
char" and it is up to the compilers implementation or the platform which is
followed."
http://www.arm.linux.org.uk/docs/faqs/signedchar.php


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35382 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-27 16:33:08 +00:00
Lauro Ramos Venancio
b8a93a45f8 bugfix: sometimes the spiller puts a load between the "mov lr, pc" and "bx" of a CALL_NOLINK. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35381 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-27 16:19:21 +00:00
Anton Korobeynikov
dd43321079 Remove dead code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35380 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-27 12:05:48 +00:00
Anton Korobeynikov
b17b08d1f2 Split big monster into small helpers. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35379 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-27 11:29:11 +00:00
Evan Cheng
d0083bc5ec SDISel does not preserve all, it changes CFG and other info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35376 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-27 00:53:36 +00:00
Evan Cheng
018d6e1537 Don't call getOperandConstraint() if operand index is greater than 
TID->numOperands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35375 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-27 00:48:28 +00:00
Devang Patel
40d2cd13a5 Spell check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35374 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-27 00:16:08 +00:00
Reid Spencer
6eb0d99f5f Implement some minor review feedback. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35373 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 23:58:26 +00:00
Reid Spencer
68d27cf84e For PR1271: 
Fix another incorrectly converted shift mask.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35371 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 23:45:51 +00:00
Devang Patel
d64d3a1d28 Reduce malloc/free traffic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35370 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 23:19:29 +00:00
Devang Patel
b9dbc4decc It is not possible to determie dominance between two PHI nodes 
based on their ordering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35369 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 23:18:28 +00:00
Devang Patel
9be98dd9c0 Use std::vector<DFCalculateWorkObject> instead of 
std::vector<DFCalculateWorkObject *> to reduce malloc/free traffic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35368 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 23:17:19 +00:00
Evan Cheng
f6fa5ee5c2 findRegisterUseOperand() changed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35366 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 22:41:48 +00:00
Evan Cheng
ad7ccf34b5 Fix for PR1266. Don't mark a two address operand IsKill. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35365 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 22:40:42 +00:00
Evan Cheng
32eb1f1ca4 Change findRegisterUseOperand() to return operand index instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35363 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 22:37:45 +00:00
Dale Johannesen
c6b9ef80a8 Fix reversed logic in getRegsUsed. Rename RegStates to RegsAvailable to 
hopefully forestall similar errors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35362 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 22:23:54 +00:00
Chris Lattner
0e5444bb20 eliminate use of std::set 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35361 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 20:40:50 +00:00
Reid Spencer
4ada00d166 Add a comment to explain a folding transform. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35360 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 20:09:02 +00:00
Reid Spencer
a9b8101333 Get better debug output by having modified instructions print both the 
original and new instruction. A slight performance hit with ostringstream
but it is only for debug.
Also, clean up an uninitialized variable warning noticed in a release build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35358 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 17:44:01 +00:00
Reid Spencer
d5e30f0a01 Get the number of bits to set in a mask correct for a shl/lshr transform. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35357 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 17:18:58 +00:00
Bill Wendling
ab5b49d92e Promote to v1i64 type... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35353 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 08:03:33 +00:00
Bill Wendling
aadcea33d1 Updated. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35352 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 07:55:58 +00:00
Bill Wendling
eebc8a1bc5 Add support for the v1i64 type. This makes better code for this: 
#include <mmintrin.h>

extern __m64 C;

void baz(__v2si *A, __v2si *B)
{
  *A = C;
  _mm_empty();
}

We get this:

_baz:
        call "L1$pb"
"L1$pb":
        popl %eax
        movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
        movq (%eax), %mm0
        movl 4(%esp), %eax
        movq %mm0, (%eax)
        emms
        ret

GCC gives us this:

_baz:
        pushl   %ebx
        call    L3
"L00000000001$pb":
L3:
        popl    %ebx
        subl    $8, %esp
        movl    L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
        movl    (%eax), %edx
        movl    4(%eax), %ecx
        movl    16(%esp), %eax
        movl    %edx, (%eax)
        movl    %ecx, 4(%eax)
        emms
        addl    $8, %esp
        popl    %ebx
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35351 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 07:53:08 +00:00
Evan Cheng
15213b77cf SIGN_EXTEND_INREG requires one extra operand, a ValueType node. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35350 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 07:12:51 +00:00
Reid Spencer
1be1284fe6 For PR1271: 
Fix SingleSource/Regression/C/2003-05-21-UnionBitFields.c by changing a
getHighBitsSet call to getLowBitsSet call that was incorrectly converted
from the original lshr constant expression.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35348 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 05:25:00 +00:00
Dale Johannesen
da91f49751 Look through bitcast when finding IVs. (Chris' patch really.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35347 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 03:01:27 +00:00
Reid Spencer
55702aaa52 For PR1271: 
Remove a use of getLowBitsSet that caused the mask used for replacement of
shl/lshr pairs with an AND instruction to be computed incorrectly. Its not
clear exactly why this is the case. This solves the disappearing shifts
problem, but it doesn't fix Regression/C/2003-05-21-UnionBitFields. It
seems there is more going on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35342 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 21:11:44 +00:00
Chris Lattner
db9654e284 implement Transforms/InstCombine/cast2.ll:test3 and PR1263 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35341 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 20:43:09 +00:00
Reid Spencer
2149a9dfec Some cleanup from review: 
* Don't assume shift amounts are <= 64 bits
* Avoid creating an extra APInt in SubOne and AddOne by using -- and ++
* Add another use of getLowBitsSet
* Convert a series of if statements to a switch


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35339 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 19:55:33 +00:00
Anton Korobeynikov
3a84b9baf6 First step of switch lowering refactoring: perform worklist-driven 
strategy, emit JT's where possible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35338 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 15:07:15 +00:00
Anton Korobeynikov
4be4e51a50 Fix authorship 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35337 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 13:44:26 +00:00
Chris Lattner
2ef14d9f7c fold constantexprs more aggressively, fixing PR1265 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35336 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 05:47:04 +00:00
Reid Spencer
7177c3a60a Refactor several ConstantExpr::getXXX calls with ConstantInt arguments 
using the facilities of APInt. While this duplicates a tiny fraction of
the constant folding code, it also makes the code easier to read and
avoids large ConstantExpr overhead for simple, known computations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35335 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 05:33:51 +00:00
Chris Lattner
86c9c341e9 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35334 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 05:10:46 +00:00
Zhou Sheng
0fc5095d0e 1. Avoid unnecessary APInt construction if possible. 
2. Use isStrictlyPositive() instead of isPositive() in two places where
   they need APInt value > 0 not only >=0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35333 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 05:01:29 +00:00
Chris Lattner
5df99b376f Implement support for vector operands to inline asm, implementing 
CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35332 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 05:00:54 +00:00
Chris Lattner
013e051aac add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35330 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 04:46:28 +00:00
Chris Lattner
b6ead97b7e Fix CodeGen/PowerPC/2007-03-24-cntlzd.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35329 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 04:44:03 +00:00
Chris Lattner
c13dd1cf4c implement initial support for the silly X constraint. Testcase here: CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35327 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 04:35:41 +00:00
Reid Spencer
2f5491791b Make more uses of getHighBitsSet and get rid of some pointless & of an 
APInt with its type mask.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35325 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 04:26:16 +00:00
Chris Lattner
065421f99f Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35324 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 02:18:14 +00:00
Chris Lattner
4234f57fa0 switch TargetLowering::getConstraintType to take the entire constraint, 
not just the first letter.  No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 02:14:49 +00:00