Commit Graph

41 Commits

Author SHA1 Message Date
2d64c553b4 Remove most of the TargetMachine::getSubtarget/getSubtargetImpl
calls that don't take a Function argument from Mips. Notable
exceptions: the AsmPrinter and MipsTargetObjectFile. The
latter needs to be fixed, and the former will be fixed when the
general AsmPrinter changes happen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227512 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-29 23:27:36 +00:00
fcd3c4065d Move the Mips target to storing the ABI in the TargetMachine rather
than on MipsSubtargetInfo.

This required a bit of massaging in the MC level to handle this since
MC is a) largely a collection of disparate classes with no hierarchy,
and b) there's no overarching equivalent to the TargetMachine, instead
only the subtarget via MCSubtargetInfo (which is the base class of
TargetSubtargetInfo).

We're now storing the ABI in both the TargetMachine level and in the
MC level because the AsmParser and the TargetStreamer both need to
know what ABI we have to parse assembly and emit objects. The target
streamer has a pointer to the one in the asm parser and is updated
when the asm parser is created. This is fragile as the FIXME comment
notes, but shouldn't be a problem in practice since we always
create an asm parser before attempting to emit object code via the
assembler. The TargetMachine now contains the ABI so that the DataLayout
can be constructed dependent upon ABI.

All testcases have been updated to use the -target-abi command line
flag so that we can set the ABI without using a subtarget feature.

Should be no change visible externally here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227102 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 17:33:46 +00:00
ad017096fc [mips][microMIPS] Implement BEQZ16 and BNEZ16 instructions
Differential Revision: http://reviews.llvm.org/D5271


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225627 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-12 12:03:34 +00:00
9bf73516cb Replace several 'assert(false' with 'llvm_unreachable' or fold a condition into the assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225160 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-05 10:15:49 +00:00
d9accc1e5f [mips][microMIPS] This patch implements functionality in MIPS delay slot
filler such as if delay slot filler have to put NOP instruction into the
delay slot of microMIPS BEQ or BNE instruction which uses the register $0,
then instead of emitting NOP this instruction is replaced by the corresponding
microMIPS compact branch instruction, i.e. BEQZC or BNEZC.

Differential Revision: http://reviews.llvm.org/D3566


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222580 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 22:04:35 +00:00
2992ea0cb5 [mips] Replace MipsABIEnum with a MipsABIInfo class.
Summary:
No functional change yet, it's just an object replacement for an enum.
It will allow us to gather ABI information in a single place so that we can
start testing for properties of the ABI's instead of the ABI itself.

For example we will eventually be able to use:
  ABI.MinStackAlignmentInBytes()
instead of:
  (isABI_N32() || isABI_N64()) ? 16 : 8
which is clearer and more maintainable.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://reviews.llvm.org/D3341

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220568 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-24 16:15:27 +00:00
d5dd8ce2a5 Reinstate "Nuke the old JIT."
Approved by Jim Grosbach, Lang Hames, Rafael Espindola.

This reinstates commits r215111, 215115, 215116, 215117, 215136.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216982 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-02 22:28:02 +00:00
aa5b9c0f6f Temporarily Revert "Nuke the old JIT." as it's not quite ready to
be deleted. This will be reapplied as soon as possible and before
the 3.6 branch date at any rate.

Approved by Jim Grosbach, Lang Hames, Rafael Espindola.

This reverts commits r215111, 215115, 215116, 215117, 215136.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215154 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 22:02:54 +00:00
875710a2fd Nuke the old JIT.
I am sure we will be finding bits and pieces of dead code for years to
come, but this is a good start.

Thanks to Lang Hames for making MCJIT a good replacement!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215111 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 14:21:18 +00:00
9f85dccfc6 Remove the TargetMachine forwards for TargetSubtargetInfo based
information and update all callers. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214781 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-04 21:25:23 +00:00
394e6d2b9e Make non-module passes unconditionally added in the pass
manager for mips, and early exit if we don't want to do
anything because of the current subtarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213407 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-18 20:29:02 +00:00
21ed78f564 [mips][mips64r6] b(ge|lt)zal are not available on MIPS32r6/MIPS64r6 and bal is a normal instruction
Summary:
b(ge|lt)zal have been removed in MIPS32r6/MIPS64r6. However, bal (an alias
for 'bgezal $zero, $offset') still remains with the same encoding it had
prior to MIPS32r6/MIPS64r6.

Updated the MipsNaCLELFStreamer, and MipsLongBranch to correctly handle the
MIPS32r6/MIPS64r6 BAL instruction in addition to the existing BAL_BR pseudo.

No changes were required to the CodeGen test that looks for BAL
(test/CodeGen/Mips/longbranch.ll) since the new instruction has the same
syntax.

Depends on D4113

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4114

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210898 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 13:02:52 +00:00
2181b2319e [mips] Modify long branch for NaCl:
* Move the instruction that changes sp outside of the branch delay slot.
  * Bundle-align the target of indirect branch.

Differential Revision: http://llvm-reviews.chandlerc.com/D3928


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210262 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-05 13:52:08 +00:00
95ce098219 [mips] Optimize long branch for MIPS64 by removing %higher and %highest.
%higher and %highest can have non-zero values only for offsets greater
than 2GB, which is highly unlikely, if not impossible when compiling a
single function. This makes long branch for MIPS64 3 instructions smaller.

Differential Revision: http://llvm-reviews.chandlerc.com/D3281.diff


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209678 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-27 18:53:06 +00:00
fbe7448e5d [mips] Fix MipsLongBranch pass to work when the offset from the branch to the
target cannot be determined accurately. This is the case for NaCl where the
sandboxing instructions are added in MC layer, after the MipsLongBranch pass.
It is also the case when the code has inline assembly. Instead of calculating
offset in the MipsLongBranch pass, use %hi(sym1 - sym2) and %lo(sym1 - sym2)
expressions that are resolved during the fixup.

This patch also deletes microMIPS test file test/CodeGen/Mips/micromips-long-branch.ll
and implements microMIPS CHECKs in a much simpler way in a file
test/CodeGen/Mips/longbranch.ll, together with MIPS32 and MIPS64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207656 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-30 15:06:25 +00:00
91b10fb0e9 [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Mips edition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207506 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 07:58:02 +00:00
c848b1bbcf [C++] Use 'nullptr'. Target edition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207197 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-25 05:30:21 +00:00
42e8630239 [Modules] Fix potential ODR violations by sinking the DEBUG_TYPE
definition below all of the header #include lines, lib/Target/...
edition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206842 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-22 02:41:26 +00:00
d628f19f5d [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.
Remove the old functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202636 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 12:27:27 +00:00
304964c103 Fixed issue with microMIPS long branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195975 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-30 19:12:28 +00:00
eb47ca4561 Revert revision 195965.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195967 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-29 22:10:02 +00:00
ee7f913c98 Fixed issue with microMIPS long branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195965 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-29 21:41:24 +00:00
3e6a3becd5 [mips] Simplify and optimize code.
No intended functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192213 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 18:13:24 +00:00
60ccc3b0ec [mips] Fix a bug in MipsLongBranch::replaceBranch, which was erasing
instructions in delay slots along with the original branch instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191978 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 20:51:40 +00:00
6227d5c690 Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid specifying the vector size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185606 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-04 01:31:24 +00:00
41e632d9e1 Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183493 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 07:04:14 +00:00
6daba28683 [mips] Rename functions. No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181713 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-13 17:43:19 +00:00
a430cb613b This patch enables llvm to switch between compiling for mips32/mips64
and mips16 on a per function basis.

Because this patch is somewhat involved I have provide an overview of the
key pieces of it.

The patch is written so as to not change the behavior of the non mixed
mode. We have tested this a lot but it is something new to switch subtargets
so we don't want any chance of regression in the mainline compiler until
we have more confidence in this.

Mips32/64 are very different from Mip16 as is the case of ARM vs Thumb1.
For that reason there are derived versions of the register info, frame info, 
instruction info and instruction selection classes.

Now we register three separate passes for instruction selection.
One which is used to switch subtargets (MipsModuleISelDAGToDAG.cpp) and then
one for each of the current subtargets (Mips16ISelDAGToDAG.cpp and
MipsSEISelDAGToDAG.cpp).

When the ModuleISel pass runs, it determines if there is a need to switch
subtargets and if so, the owning pointers in MipsTargetMachine are
appropriately changed.

When 16Isel or SEIsel is run, they will return immediately without doing
any work if the current subtarget mode does not apply to them.

In addition, MipsAsmPrinter needs to be reset on a function basis.

The pass BasicTargetTransformInfo is substituted with a null pass since the
pass is immutable and really needs to be a function pass for it to be
used with changing subtargets. This will be fixed in a follow on patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179118 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-09 19:46:01 +00:00
e11dda8631 This is a resubmittal. For some reason it broke the bots yesterday
but I cannot reproduce the problem and have scrubed my sources and
even tested with llvm-lit -v --vg.
Formatting fixes. Mostly long lines and 
blank spaces at end of lines.

Contributer: Jack Carter
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172882 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-19 02:00:40 +00:00
0b8c9a80f2 Move all of the header files which are involved in modelling the LLVM IR
into their new header subdirectory: include/llvm/IR. This matches the
directory structure of lib, and begins to correct a long standing point
of file layout clutter in LLVM.

There are still more header files to move here, but I wanted to handle
them in separate commits to make tracking what files make sense at each
layer easier.

The only really questionable files here are the target intrinsic
tablegen files. But that's a battle I'd rather not fight today.

I've updated both CMake and Makefile build systems (I think, and my
tests think, but I may have missed something).

I've also re-sorted the includes throughout the project. I'll be
committing updates to Clang, DragonEgg, and Polly momentarily.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-02 11:36:10 +00:00
06180bf3f2 Use the new MIBundleBuilder class in the Mips target.
This is the preferred way of creating bundled machine instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169585 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-07 04:23:40 +00:00
d04a8d4b33 Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03 16:50:05 +00:00
c984657c74 Add assertions in MipsLongBranch which check the size of basic blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168078 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-15 20:05:11 +00:00
173192fa71 [mips] Delete MipsFunctionInfo::EmitNOAT. Unconditionally print directive
"set .noat" so that the assembler doesn't issue warnings when register $AT is
used.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167310 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-02 20:56:25 +00:00
4fb08317af Follow-up patch to r162731.
Fix a couple of bugs in mips' long branch pass.
This patch was supposed to be committed along with r162731, so I don't have a
new test case.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162777 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-28 18:58:57 +00:00
273956d8c6 Fix mips' long branch pass.
Instructions emitted to compute branch offsets now use immediate operands
instead of symbolic labels. This change was needed because there were problems
when R_MIPS_HI16/LO16 relocations were used to make shared objects.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162731 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-28 03:03:05 +00:00
0bc1adbbc4 Add definitions of two subclasses of MipsInstrInfo, MipsInstrInfo (for mips16),
and MipsSEInstrInfo (for mips32/64).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161081 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31 21:49:49 +00:00
60287963c7 Fix Mips long branch pass.
This pass no longer requires that the global pointer value be saved to the
stack or register since it uses bal instruction to compute branch distance.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160601 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-21 03:30:44 +00:00
bde801b2a7 Make MipsLongBranch::runOnMachineFunction return true.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158702 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-19 03:45:29 +00:00
f1ece22612 MipsLongBranch.cpp: Tweak llvm::next() to appease msvc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158446 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 12:29:48 +00:00
a32ccf92c1 Add file MipsLongBranch.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158436 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 01:22:24 +00:00