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da47e6e0d0
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1662 Commits

Author SHA1 Message Date
Evan Cheng
da47e6e0d0 Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-15 00:03:38 +00:00
Evan Cheng
f8e43be758 Back out r48353. Not needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48375 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-14 22:01:01 +00:00
Evan Cheng
15fda403f3 Add an MO_Undef MachineOperandType, intended for INSERT_SUBREG. Next up MO_Undead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48353 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-14 01:47:49 +00:00
Evan Cheng
1090fc99cd Forgot this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48349 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-14 00:17:29 +00:00
Dan Gohman
8131a50f44 Fix a typo in a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48345 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-13 23:04:27 +00:00
Evan Cheng
fe666a3592 Improve VarInfo::removeKill() by using std::find instead of linear search. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48321 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-13 02:42:55 +00:00
Evan Cheng
b27087f5aa Refactor some code out of MachineSink into a MachineInstr query. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48311 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-13 00:44:09 +00:00
Evan Cheng
9e23336d0c Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted: 
entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1028<def> = MOV32rr %EAX
        %reg1029<def> = MOV32rr %EDX
        %reg1030<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0]
        %reg1025<def> = MOV32rr %reg1029
        %reg1026<def> = MOV32rr %reg1030
        %reg1024<def> = MOV32rr %reg1028

The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled.

With -schedule-livein-copies:
entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1024<def> = MOV32rr %EAX
        %reg1025<def> = MOV32rr %EDX
        %reg1026<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0]

Much better!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48307 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-12 22:19:41 +00:00
Duncan Sands
25eb043759 Don't try to extract an i32 from an f64. This 
getCopyToParts problem was noticed by the new
LegalizeTypes infrastructure.  In order to avoid
this kind of thing in the future I've added a
check that EXTRACT_ELEMENT is only used with
integers.  Once LegalizeTypes is up and running
most likely BUILD_PAIR and EXTRACT_ELEMENT can
be removed, in favour of using apints instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48294 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-12 20:30:08 +00:00
Evan Cheng
709d19fb66 Document an implementation detail about EXTRACT_SUBREG and INSERT_SUBREG sub-register operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48283 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-12 07:52:15 +00:00
Dan Gohman
bfae83139d Use PassManagerBase instead of FunctionPassManager for functions 
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48256 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 22:29:46 +00:00
Evan Cheng
676dd7c80b When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48218 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 07:19:34 +00:00
Dan Gohman
a2e9485e34 Implement more support for fp-to-i128 and i128-to-fp conversions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48189 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 23:03:31 +00:00
Evan Cheng
4499e495ea Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48167 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 19:31:26 +00:00
Dale Johannesen
845ca36544 Use uint64_t not unsigned long long. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48154 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 17:05:01 +00:00
Christopher Lamb
3feb0170a8 Allow insert_subreg into implicit, target-specific values. 
Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48130 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 06:12:08 +00:00
Dale Johannesen
b8cafe3427 Increase ISD::ParamFlags to 64 bits. Increase the ByValSize 
field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff.  Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and 
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48122 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 02:17:22 +00:00
Evan Cheng
27b7db549e Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-08 00:58:38 +00:00
Bill Wendling
ed1fcd8987 When setting the "unused" info, take into account something like this: 
%r3<def> = OR %x3<kill>, %x3

We don't want to mark the %r3 as unused even though it's a sub-register of %x3.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48003 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-06 23:22:43 +00:00
Dale Johannesen
0ea0356dff Clarify that CALLSEQ_START..END may not be nested, 
and add some protection against creating such.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47957 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 19:14:03 +00:00
Dan Gohman
d91446de7a Codegen support for i128 SINT_TO_FP. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47928 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 01:08:17 +00:00
Evan Cheng
6130f66eaa Refactor code. Remove duplicated functions that basically do the same thing as 
findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47927 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 00:59:57 +00:00
Evan Cheng
917be6814e Rename isOperand() to isOperandOf() (and other similar methods). It always confuses me. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47872 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-04 00:41:45 +00:00
Bill Wendling
7194aaf738 This is the initial check-in for adding register scavenging to PPC. (Currently, 
PPC-64 doesn't work.) This also lowers the spilling of the CR registers so that
it uses a register other than the default R0 register (the scavenger scrounges
for one). A significant part of this patch fixes how kill information is
handled.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47863 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-03 22:19:16 +00:00
Dale Johannesen
3c8b59c546 Add MVT::is128BitVector and is64BitVector. Shrink 
unaligned load/store code using them.  Per review
of unaligned load/store vector patch.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47782 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-01 03:40:57 +00:00
Evan Cheng
05548eb174 Don't fill eh frames even though these are text sections. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47765 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-29 19:36:59 +00:00
Duncan Sands
59c2e868ff Document that the shuffle mask may contain undef 
values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47719 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 17:12:11 +00:00
Evan Cheng
fb8075d03f Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47703 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 00:43:03 +00:00
Evan Cheng
21b3f31f8f Fix a bug in dead spill slot elimination. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47687 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 19:57:11 +00:00
Duncan Sands
4f069e6db1 LegalizeTypes support for INSERT_VECTOR_ELT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47669 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 10:18:23 +00:00
Evan Cheng
be680dcea6 Don't track max alignment during stack object allocations since they can be deleted later. Let PEI compute it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47668 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 10:04:56 +00:00
Evan Cheng
d36531249a Spiller now remove unused spill slots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47657 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 03:04:06 +00:00
Dan Gohman
b3564aa836 Convert the last remaining users of the non-APInt form of 
ComputeMaskedBits to use the APInt form, and remove the
non-APInt form.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47654 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 01:23:58 +00:00
Bill Wendling
e85fe660e4 Detabify 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47597 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 10:49:39 +00:00
Dan Gohman
437d452adb Factor the assert for indexed loads/stores out of LoadSDNode 
and StoreSDNode into LSBaseSDNode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47570 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-25 22:16:29 +00:00
Dan Gohman
2e68b6f52d Convert MaskedValueIsZero and all its users to use APInt. Also add 
a SignBitIsZero function to simplify a common use case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47561 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-25 21:11:39 +00:00
Chris Lattner
63602b8a69 add LSBaseSDNode::getOffset at Dan's request. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47558 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-25 19:31:21 +00:00
Dan Gohman
4fc3d5dac2 Add a new method to SDNode/SDOperand named getValueSizeInBits 
that combines getValueType and MVT::getSizeInBits, since this
occurrs frequently.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47552 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-25 19:08:02 +00:00
Evan Cheng
79a0c1e46c Correctly determine whether a argument load can be folded into its uses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47545 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-25 08:50:41 +00:00
Evan Cheng
0cc83b6e85 Forgot this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47510 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 00:46:11 +00:00
Evan Cheng
d70dbb5d62 Enable re-materialization of instructions which have virtual register operands if 
the definition of the operand also reaches its uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47475 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 09:24:50 +00:00
Chris Lattner
59a8cdd36d minor cleanups to LSBaseSDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47469 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 01:54:35 +00:00
Andrew Lenharth
c1c7bd610a Better names as per Evan's request 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47435 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 16:11:38 +00:00
Andrew Lenharth
ab0b949e0e Atomic op support. If any gcc test uses __sync builtins, it might start failing on archs that haven't implemented them yet 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47430 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 06:45:13 +00:00
Anton Korobeynikov
ae9f3a3b7c Unbreak build with gcc 4.3: provide missed includes and silence most annoying warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47367 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 11:08:44 +00:00
Bill Wendling
5ec3ab7f67 Fixed typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47365 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 09:14:09 +00:00
Bill Wendling
420cdebbcb More constification of things. More comments added. No functionality 
changes. (Sorry for any formatting changes that creeped in.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47362 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 07:36:31 +00:00
Evan Cheng
efec751a1b - When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type. 
- X86 now normalize SCALAR_TO_VECTOR to (BIT_CONVERT (v4i32 SCALAR_TO_VECTOR)). Get rid of X86ISD::S2VEC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47290 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-18 23:04:32 +00:00
Roman Levenstein
8dd25288f9 New helper function getMBBFromIndex() that given an index in any instruction of an MBB returns a pointer the MBB. Reviewed by Evan. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47267 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-18 09:35:30 +00:00
Andrew Lenharth
22c5c1b2df llvm.memory.barrier, and impl for x86 and alpha 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47204 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-16 01:24:58 +00:00