Commit Graph

1135 Commits

Author SHA1 Message Date
Dan Gohman
dbe664adcd Fix SelectionDAG::ReplaceAllUsesWith to behave correctly when
uses are added to the From node while it is processing From's
use list, because of automatic local CSE. The fix is to avoid
visiting any new uses.

Fix a few places in the DAGCombiner that assumed that after
a RAUW call, the From node has no users and may be deleted.

This fixes PR3018.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62533 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 21:44:21 +00:00
Dale Johannesen
1f54f58e64 compile-time fmod was done incorrectly. PR 3316.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62528 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 21:17:05 +00:00
Evan Cheng
2722e7b139 DIVREM isel deficiency: If sign bit is known zero, zero out DX/EDX/RDX instead of sign extending the low part (in AX/EAX/RAX) into it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62519 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 19:06:11 +00:00
Evan Cheng
a06ec9efe1 Now not UINT_TO_FP is legal (it's marked custom), dag combiner won't
optimize it to a SINT_TO_FP when the sign bit is known zero. X86 isel should perform the optimization itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62504 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 08:08:22 +00:00
Chris Lattner
d62284a804 Fix rdar://6505632, an llc crash on 483.xalancbmk
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62470 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-18 20:35:00 +00:00
Bill Wendling
959fb88949 Testcase for last commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62418 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-17 07:42:44 +00:00
Evan Cheng
8e27826649 Fix MatchAddress bug that's preventing negative displacement from being folded in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62413 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-17 07:09:27 +00:00
Mon P Wang
7ac9cdfc99 Simplify extract element of a scalar to vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62383 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-17 00:07:25 +00:00
Dan Gohman
3326f16036 Disable the post-RA scheduler on this test, since it uses a
simple %prcontext which doesn't find what it's looking for
if the scheduler has rearranged the instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62363 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-16 21:40:12 +00:00
Evan Cheng
e57187cbe3 CreateVirtualRegisters does trivial copy coalescing. If a node def is used by a single CopyToReg, it reuses the virtual register assigned to the CopyToReg. This won't work for SDNode that is a clone or is itself cloned. Disable this optimization for those nodes or it can end up with non-SSA machine instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62356 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-16 20:57:18 +00:00
Bill Wendling
64e87326d9 Add support for non-zero __builtin_return_address values on X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62338 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-16 19:25:27 +00:00
Mon P Wang
fa9c5eac33 Added missing support to widen an operand from a bit convert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62285 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 22:43:38 +00:00
Mon P Wang
f0fcdd8e26 Expand insert/extract of a <4 x i32> with a variable index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62281 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 21:10:20 +00:00
Rafael Espindola
bb46f52027 Add the private linkage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62279 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 20:18:42 +00:00
Dan Gohman
f31408d75c Disable the register+memory forms of the bt instructions for now. Thanks
to Eli for pointing out that these forms don't ignore the high bits of
their index operands, and as such are not immediately suitable for use
by isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62194 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 23:23:30 +00:00
Duncan Sands
2ecf88d175 When replacing uses and the same node is reached
via two paths, process it once not twice, d'oh!
Analysis, testcase and original patch thanks to
Mon Ping Wang.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62169 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 15:17:14 +00:00
Evan Cheng
1d8a76d7d5 FIX llvm-gcc bootstrap on x86_64 linux. If a virtual register is copied to a physical register, it's not necessarily defined by a copy. We have to watch out it doesn't clobber any sub-register that might be live during its live interval. If the live interval crosses a basic block, then it's not safe to check with the less conservative check (by scanning uses and defs) because it's possible a sub-register might be live out of the block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 03:57:45 +00:00
Devang Patel
6fbbe4390b Use DebugInfo interface to lower dbg_* intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62126 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 00:32:17 +00:00
Evan Cheng
c29a56dedb Fix PR3241: Currently EmitCopyFromReg emits a copy from the physical register to a virtual register unless it requires an expensive cross class copy. That means we are only treating "expensive to copy" register dependency as physical register dependency.
Also future proof the scheduler to handle "normal" physical register dependencies. The code is not exercised yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62074 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-12 03:19:55 +00:00
Evan Cheng
5c30667af9 This is a dup of pr2659.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62029 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-10 19:06:32 +00:00
Evan Cheng
5c3c5a4d9c Duplicated node may produce a non-physical register def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62015 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-09 22:44:02 +00:00
Evan Cheng
0cb24f8131 Add test case from PR2659.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-09 21:01:31 +00:00
Dan Gohman
b24380804c PR2659 was fixed by r61847. Add the testcase as a regression test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-09 08:16:12 +00:00
Evan Cheng
8f90b6eb2f The coalescer does not coalesce a virtual register to a physical register if any of the physical register's sub-register live intervals overlaps with the virtual register. This is overly conservative. It prevents a extract_subreg from being coalesced away:
v1024 = EDI  // not killed
      =
      = EDI

One possible solution is for the coalescer to examine the sub-register live intervals in the same manner as the physical register. Another possibility is to examine defs and uses (when needed) of sub-registers. Both solutions are too expensive. For now, look for "short virtual intervals" and scan instructions to look for conflict instead.

This is a small win on x86-64. e.g. It shaves 403.gcc by ~80 instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61847 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-07 02:08:57 +00:00
Chris Lattner
d37eaa3b97 add a testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61845 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-07 01:48:08 +00:00
Dan Gohman
fbb7486560 Add patterns to match conditional moves with loads folded
into their left operand, rather than their right. Do this
by commuting the operands and inverting the condition.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61842 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-07 01:00:24 +00:00
Dan Gohman
653456c351 X86_COND_C and X86_COND_NC are alternate mnemonics for
X86_COND_B and X86_COND_AE, respectively.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61835 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-07 00:15:08 +00:00
Dan Gohman
0a79a2f8b0 Now that fold-pcmpeqd-0.ll is effectively testing that scheduling helps
avoid the need for spilling, add a new testcase that tests that the
pcmpeqd used for V_SETALLONES is changed to a constant-pool load as
needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61831 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-06 23:48:10 +00:00
Dan Gohman
cca2983291 Revert r42653 and forward-port the code that lets INC64_32r be
converted to LEA64_32r in x86's convertToThreeAddress. This
replaces code like this:
   movl  %esi, %edi
   inc   %edi
with this:
   lea   1(%rsi), %edi
which appears to be beneficial.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61830 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-06 23:34:46 +00:00
Dan Gohman
fd2163bcf7 Use a latency value of 0 for the artificial edges inserted by
AddPseudoTwoAddrDeps. This lets the scheduling infrastructure
avoid recalculating node heights. In very large testcases this
was a major bottleneck. Thanks to Roman Levenstein for finding
this!

As a side effect, fold-pcmpeqd-0.ll is now scheduled better
and it no longer requires spilling on x86-32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61778 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-06 01:19:04 +00:00
Evan Cheng
7e66c0d43a Find loop back edges only after empty blocks are eliminated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61752 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05 21:17:27 +00:00
Dan Gohman
cc91d63ab7 Fix a DAGCombiner abort on an invalid shift count constant. This fixes PR3250.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61613 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-03 19:22:06 +00:00
Evan Cheng
ccb6976a69 Do not isel load folding bt instructions for pentium m, core, core2, and AMD processors. These are significantly slower than a load followed by a bt of a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61557 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-02 05:35:45 +00:00
Evan Cheng
52ceafa5c7 Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61555 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-02 05:29:08 +00:00
Chris Lattner
1323e8bf6a add PR #
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61427 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-25 05:40:38 +00:00
Chris Lattner
e55484eb45 Add a simple pattern for matching 'bt'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61426 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-25 05:34:37 +00:00
Dan Gohman
82779704ff Fix a compiler-abort on a testcase where the stack-pointer is added to
a symbolic constant. This is unlikely to be intentional, but it
shouldn't crash the compiler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61408 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-24 00:27:51 +00:00
Dale Johannesen
f9cbc1f9ac Add another permutation where we should get rid of a-a.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61401 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 23:01:27 +00:00
Mon P Wang
2fe269def2 Added shuffle and splat test cases for r61365.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61366 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 04:05:08 +00:00
Dale Johannesen
58e39b0200 One more permutation of subtracting off a base value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61361 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 01:59:54 +00:00
Dan Gohman
b12b1a27f5 Fix fast-isel to not emit invalid assembly when presented with a
constant shift count that doesn't fit in the shift instruction's
immediate field. This fixes PR3242.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61281 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-20 17:19:40 +00:00
Dan Gohman
f89e6e6577 Use the correct Preds and Succs lists in setHeightDirty()
and setDepthDirty(), respectively. This fixes PR3241.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61276 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-20 16:34:57 +00:00
Evan Cheng
5379f412bc Fix PR3149. If an early clobber def is a physical register and it is tied to an input operand, it effectively extends the live range of the physical register. Currently we do not have a good way to represent this.
172     %ECX<def> = MOV32rr %reg1039<kill>
180     INLINEASM <es:subl $5,$1
        sbbl $3,$0>, 10, %EAX<def>, 14, %ECX<earlyclobber,def>, 9, %EAX<kill>,
36, <fi#0>, 1, %reg0, 0, 9, %ECX<kill>, 36, <fi#1>, 1, %reg0, 0
188     %EAX<def> = MOV32rr %EAX<kill>
196     %ECX<def> = MOV32rr %ECX<kill>
204     %ECX<def> = MOV32rr %ECX<kill>
212     %EAX<def> = MOV32rr %EAX<kill>
220     %EAX<def> = MOV32rr %EAX
228     %reg1039<def> = MOV32rr %ECX<kill>

The early clobber operand ties ECX input to the ECX def.

The live interval of ECX is represented as this:
%reg20,inf = [46,47:1)[174,230:0)  0@174-(230) 1@46-(47)

The right way to represent this is something like
%reg20,inf = [46,47:2)[174,182:1)[181:230:0)  0@174-(182) 1@181-230 @2@46-(47)

Of course that won't work since that means overlapping live ranges defined by two val#.

The workaround for now is to add a bit to val# which says the val# is redefined by a early clobber def somewhere. This prevents the move at 228 from being optimized away by SimpleRegisterCoalescing::AdjustCopiesBackFrom.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61259 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-19 20:58:01 +00:00
Evan Cheng
ab63152871 - CodeGenPrepare does not split loop back edges but it only knows about back edges of single block loops. It now does a DFS walk to find loop back edges.
- Use SplitBlockPredecessors to factor out common predecessors of the critical edge destination. This is disabled for now due to some regressions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61248 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-19 18:03:11 +00:00
Rafael Espindola
2f6fea90a5 Fix bug 3202.
The EH_frame and .eh symbols are now private, except for darwin9 and earlier.
The patch also fixes the definition of PrivateGlobalPrefix on pcc linux.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61242 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-19 10:55:56 +00:00
Mon P Wang
7538454f9f Fix test to account for generating some vector code for mul v2i64 instead
of incorrectly generating pmuldq


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61228 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-18 23:42:37 +00:00
Mon P Wang
1d045486ca Added some basic test cases for r61209
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61210 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-18 20:05:58 +00:00
Eli Friedman
28dc98f752 Fix for PR3225: disable a broken optimization in
DAGTypeLegalizer::ExpandShiftWithKnownAmountBit.

In terms of restoring the optimization, the best fix here isn't 
obvious... any ideas?



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61119 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-17 03:35:17 +00:00
Dale Johannesen
fd3b7b7df3 A new dag combine; several permutations of this
are there under ADD, this one was missing.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61107 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-16 22:13:49 +00:00
Dan Gohman
812d7506d0 Enable anti-dependence breaking by default when post-RA scheduling is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61078 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-16 06:21:45 +00:00