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dd3a87912b
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9675 Commits

Author SHA1 Message Date
Daniel Dunbar
dd3a87912b Revert "reject forward references to functions whose type don't match", because DJG told me to! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101675 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-17 21:24:55 +00:00
Nick Lewycky
8e13af309b Fix intrinsic signature in this test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101674 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-17 21:12:55 +00:00
Chris Lattner
77e80deabc reject forward references to functions whose type don't match 
up with the definition (and fix a broken testcase).  PR6491.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101670 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-17 20:45:56 +00:00
Chris Lattner
0dd0d49e78 doh, didn't mean to check in my hackaround lit sucking. :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101663 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-17 19:04:03 +00:00
Chris Lattner
34e9d17d1b fix PR6332, allowing an index of zero into a zero sized array 
even if the element of the array has no size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101662 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-17 19:02:33 +00:00
Chris Lattner
eef6d78be1 teach the x86 asm parser how to handle segment prefixes 
in memory operands.  rdar://7874844


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101661 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-17 18:56:34 +00:00
Chris Lattner
0fb372a497 testcase for r101538, patch by Nico Schmidt! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101642 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-17 17:22:06 +00:00
Dan Gohman
9f23dee08c Start function numbering at 0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101638 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-17 16:29:15 +00:00
Chris Lattner
65de1b9eb3 a bunch of ssse3 instructions are misencoded to think they have an 
i8 field when they really do not.  This fixes rdar://7840289


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101629 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-17 07:38:24 +00:00
Evan Cheng
8d1092be64 Add nounwind. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101613 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-17 03:43:36 +00:00
Bob Wilson
84bd6b0c31 Re-commit my previous SSAUpdater changes. The previous version naively tried 
to determine where to place PHIs by iteratively comparing reaching definitions
at each block.  That was just plain wrong.  This version now computes the
dominator tree within the subset of the CFG where PHIs may need to be placed,
and then places the PHIs in the iterated dominance frontier of each definition.
The rest of the patch is mostly the same, with a few more performance
improvements added in.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101612 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-17 03:08:24 +00:00
Johnny Chen
f7e2bc80d1 Minor change to make the test case comply with Vd<0> == '0' when Q == '1'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101559 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-16 22:48:31 +00:00
Johnny Chen
c7b65914e0 Fixed a bug in DisassembleN1RegModImmFrm() where a break stmt was missing for a 
case.  Also, the 0xFF hex literal involved in the shift for ESize64 should be
suffixed "ul" to preserve the shift result.

Implemented printHex*ImmOperand() by copying from ARMAsmPrinter.cpp and added a
test case for DisassembleN1RegModImmFrm()/printHex64ImmOperand().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101557 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-16 22:40:20 +00:00
Johnny Chen
16fda6982b In the same spirit of r101524, which removed the assert() from printAddrMode2OffsetOperand(), 
this patch removes the assert() from printAddrMode3OffsetOperand() and adds a test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101529 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-16 19:57:21 +00:00
Johnny Chen
2fb10f17d8 Multiclass LdStCop was using pre-UAL syntax LDC<c>L for the L fragment. Changed 
to the UAL syntax of LDCL<c>, instead.

Add a test case for this change which also tests the removal of assert() from
printAddrMode2OffsetOperand().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101527 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-16 19:33:23 +00:00
Dan Gohman
ec1fb6d09a Revert r101455, which fails on the llvm-arm-linux buildbot. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101515 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-16 18:37:31 +00:00
Dan Gohman
b391bb8947 Disable inlining of recursive calls. It can complicate tailcallelim and 
dependent analyses, and increase code size, so doing it profitably would
require more complex heuristics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101471 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-16 16:01:18 +00:00
Dan Gohman
ea25b48af3 Refine the detection of seemingly infinitely recursive calls where the 
callee is expected to be expanded to something else by codegen, so that
normal infinitely recursive calls are still transformed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101468 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-16 15:57:50 +00:00
Bill Wendling
fef4c69728 Add JIT exception handling test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101455 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-16 09:04:28 +00:00
Chris Lattner
5f0378251c move comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101433 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-16 01:05:52 +00:00
Chris Lattner
d55c1c1659 fix PR6832: we were using the alignment of a pointer when we 
wanted the alignment of the pointee.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101432 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-16 01:05:38 +00:00
Johnny Chen
cd52932dce Added another test case for am3offset operand, testing Rn, #+/-imm8. 
Previous checkin tested Rn, #+/-Rm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101418 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-15 23:23:40 +00:00
Jakob Stoklund Olesen
4b231c5705 Add test case for machine-sink on critical edges 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101416 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-15 23:19:16 +00:00
Johnny Chen
1cfa094562 Fixed a bug in ARM disassembly where LDRSBT should have am3offset operand, not 
am2offset.  Modified the instruction table entry and added a new test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101415 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-15 23:12:47 +00:00
Evan Cheng
3a1588a2e3 Use default lowering of DYNAMIC_STACKALLOC. As far as I can tell, ARM isle is doing the right thing and codegen looks correct for both Thumb and Thumb2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101410 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-15 22:20:34 +00:00
Jakob Stoklund Olesen
5ef9d76f6f Fix PR6847. RegScavenger should ignore DebugValues. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101392 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-15 20:28:39 +00:00
Evan Cheng
0ea7d219ec ARM SelectDYN_ALLOC should emit a copy from SP rather than referencing SP directly. In cases where there are two dyn_alloc in the same BB it would have caused the old SP value to be reused and badness ensues. rdar://7493908 
llvm is generating poor code for dynamic alloca, I'll fix that later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101383 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-15 18:42:28 +00:00
Chris Lattner
e6987587d6 enhance the load/store narrowing optimization to handle a 
tokenfactor in between the load/store.  This allows us to 
optimize test7 into:

_test7:                                 ## @test7
## BB#0:                                ## %entry
	movl	(%rdx), %eax
                                        ## kill: SIL<def> ESI<kill>
	movb	%sil, 5(%rdi)
	ret

instead of:

_test7:                                 ## @test7
## BB#0:                                ## %entry
	movl	4(%esp), %ecx
	movl	$-65281, %eax           ## imm = 0xFFFFFFFFFFFF00FF
	andl	4(%ecx), %eax
	movzbl	8(%esp), %edx
	shll	$8, %edx
	addl	%eax, %edx
	movl	12(%esp), %eax
	movl	(%eax), %eax
	movl	%edx, 4(%ecx)
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101355 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-15 06:10:49 +00:00
Chris Lattner
6dc868581b teach codegen to turn trunc(zextload) into load when possible. 
This doesn't occur much at all, it only seems to formed in the case
when the trunc optimization kicks in due to phase ordering.  In that
case it is saves a few bytes on x86-32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101350 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-15 05:40:59 +00:00
Chris Lattner
efcddc3325 add a simple dag combine to replace trivial shl+lshr with 
and.  This happens with the store->load narrowing stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101348 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-15 05:28:43 +00:00
Chris Lattner
2392ae7d73 Implement rdar://7860110 (also in target/readme.txt) narrowing 
a load/or/and/store sequence into a narrower store when it is
safe.  Daniel tells me that clang will start producing this sort
of thing with bitfields, and this does  trigger a few dozen times
on 176.gcc produced by llvm-gcc even now.

This compiles code like CodeGen/X86/2009-05-28-DAGCombineCrash.ll 
into:

        movl    %eax, 36(%rdi)

instead of:

        movl    $4294967295, %eax       ## imm = 0xFFFFFFFF
        andq    32(%rdi), %rax
        shlq    $32, %rcx
        addq    %rax, %rcx
        movq    %rcx, 32(%rdi)

and each of the testcases into a single store.  Each of them used
to compile into craziness like this:

_test4:
	movl	$65535, %eax            ## imm = 0xFFFF
	andl	(%rdi), %eax
	shll	$16, %esi
	addl	%eax, %esi
	movl	%esi, (%rdi)
	ret




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101343 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-15 04:48:01 +00:00
Chris Lattner
dc7d6c9ddc further tweak this to do something useful. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101341 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-15 04:31:42 +00:00
Chris Lattner
23ab896c13 remove undef control flow. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101340 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-15 04:30:19 +00:00
Daniel Dunbar
4c7276a4eb tests: MC/Disassembler tests depend on ARM support being compiler in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101337 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-15 03:47:20 +00:00
Jakob Stoklund Olesen
d394e272d2 Remove unneeded types from test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101286 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-14 20:56:09 +00:00
Bob Wilson
164cd8b8d3 Don't custom lower bit converts to ARM VMOVDRRD or VMOVDRR when the operand 
does not have a legal type.  The legalizer does not know how to handle those
nodes.  Radar 7854640.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101282 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-14 20:45:23 +00:00
Evan Cheng
dda54eef23 Trim tests and convert to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101277 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-14 20:22:17 +00:00
Nick Lewycky
3715e45da5 Revert r101213. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101231 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-14 04:51:58 +00:00
Chris Lattner
d305035155 implement mc asmparser support for '.', which gets the 
current PC.  rdar://7834775

We now produce an identical .o file compared to the cctools
assembler for something like this:

_f0:
L0:
        jmp L1
        .long . - L0
L1:
        jmp A
        .long . - L1

        .zerofill __DATA,_bss,A,0



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101227 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-14 04:40:28 +00:00
Nick Lewycky
05f1498efa Commit testcase for r101213. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101214 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-14 03:46:42 +00:00
Devang Patel
7cc11ce5a6 XFAIL this test for powerpc. 
This test relies on iSel lowering dbg_declare intrinsic when CodeGen::OptLevel is None. On PPC side, CodeGen::OptLevel stays to default when -O0 is used on the command line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101190 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-13 23:23:09 +00:00
Evan Cheng
370aac4a28 Add test for post-ra machine licm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101182 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-13 22:10:03 +00:00
Bob Wilson
6a234f07fa Handle a v2f64 formal parameter that is split between registers and memory 
such that the entire second half is in memory.  Radar 7855014.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101181 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-13 22:03:22 +00:00
Devang Patel
50d80e394d Do not include types without any definition in pubtypes list. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101171 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-13 20:35:04 +00:00
Evan Cheng
005de5ef33 Fix test on non-x86 hosts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101163 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-13 18:54:04 +00:00
Evan Cheng
fc5a03e469 Re-apply 101075 and fix it properly. Just reuse the debug info of the branch instruction being optimized. There is no need to --I which can deref off start of the BB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101162 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-13 18:50:27 +00:00
Eric Christopher
97e6992e3e Temporarily revert r101075, it's causing invalid iterator assertions 
in a nightly tester.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101158 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-13 18:37:58 +00:00
Dan Gohman
28287794d4 Teach ScalarEvolution to simplify smax and umax when it can prove 
that one operand is always greater than another.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101142 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-13 16:51:03 +00:00
Dan Gohman
a590b79ee2 Teach IndVarSimplify how to eliminate remainder operators where the 
numerator is an induction variable. For example, with code like this:

  for (i=0;i<n;++i)
    x[i%n] = 0;

IndVarSimplify will now recognize that i is always less than n inside
the loop, and eliminate the remainder.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101113 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-13 01:46:36 +00:00
Chris Lattner
43ac721e3b add llvm codegen support for -ffunction-sections and -fdata-sections, 
patch by Sylvere Teissier!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101106 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-13 00:36:43 +00:00