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8201 Commits

Author SHA1 Message Date
Craig Topper
1203f2f138 Enable detection of AVX and AVX2 support through CPUID. Add AVX/AVX2 to corei7-avx, core-avx-i, and core-avx2 cpu names. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155618 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-26 06:40:15 +00:00
Craig Topper
c16f851569 Use vector_shuffles instead of target specific unpack nodes for AVX ZERO_EXTEND/ANY_EXTEND combine. These will be converted to target specific nodes during lowering. This is more consistent with other code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155537 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-25 06:39:39 +00:00
Nadav Rotem
7bc9698f3a AVX: Add additional vbroadcast replacement sequences for integers. 
Remove the v2f64 patterns because it does not match any vbroadcast
instruction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155461 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-24 18:09:59 +00:00
Nadav Rotem
87ffdbcb7b AVX2: The BLENDPW instruction selects between vectors of v16i16 using an i8 
immediate. We can't use it here because the shuffle code does not check that
the lower part of the word is identical to the upper part.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155440 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-24 11:27:53 +00:00
Nadav Rotem
d1a79136e3 AVX: We lower VECTOR_SHUFFLE and BUILD_VECTOR nodes into vbroadcast instructions 
using the pattern (vbroadcast (i32load src)). In some cases, after we generate
this pattern new users are added to the load node, which prevent the selection
of the blend pattern. This commit provides fallback patterns which perform
in-vector broadcast (using in-vector vbroadcast in AVX2 and pshufd on AVX1).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155437 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-24 11:07:03 +00:00
Craig Topper
3ef43cf3a2 Remove dangling spaces. Fix some other formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155429 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-24 06:36:35 +00:00
Craig Topper
7fd5e16d3b Simplify code a bit and make it compile better. Remove unused parameters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155428 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-24 06:02:29 +00:00
Nadav Rotem
a35407705d Optimize the vector UINT_TO_FP, SINT_TO_FP and FP_TO_SINT operations where the integer type is i8 (commonly used in graphics). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155397 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 21:53:37 +00:00
Preston Gurd
6a8c7bf8e7 This patch fixes a problem which arose when using the Post-RA scheduler 
on X86 Atom. Some of our tests failed because the tail merging part of
the BranchFolding pass was creating new basic blocks which did not
contain live-in information. When the anti-dependency code in the Post-RA
scheduler ran, it would sometimes rename the register containing
the function return value because the fact that the return value was
live-in to the subsequent block had been lost. To fix this, it is necessary
to run the RegisterScavenging code in the BranchFolding pass.

This patch makes sure that the register scavenging code is invoked
in the X86 subtarget only when post-RA scheduling is being done.
Post RA scheduling in the X86 subtarget is only done for Atom.

This patch adds a new function to the TargetRegisterClass to control
whether or not live-ins should be preserved during branch folding.
This is necessary in order for the anti-dependency optimizations done
during the PostRASchedulerList pass to work properly when doing
Post-RA scheduling for the X86 in general and for the Intel Atom in particular.

The patch adds and invokes the new function trackLivenessAfterRegAlloc()
instead of using the existing requiresRegisterScavenging().
It changes BranchFolding.cpp to call trackLivenessAfterRegAlloc() instead of
requiresRegisterScavenging(). It changes the all the targets that
implemented requiresRegisterScavenging() to also implement
trackLivenessAfterRegAlloc().  

It adds an assertion in the Post RA scheduler to make sure that post RA
liveness information is available when it is needed.

It changes the X86 break-anti-dependencies test to use –mcpu=atom, in order
to avoid running into the added assertion.

Finally, this patch restores the use of anti-dependency checking
(which was turned off temporarily for the 3.1 release) for
Intel Atom in the Post RA scheduler.

Patch by Andy Zhang!

Thanks to Jakob and Anton for their reviews.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155395 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 21:39:35 +00:00
Craig Topper
708e44fc96 Use MVT instead of EVT through all of LowerVECTOR_SHUFFLEtoBlend and not just the switch. Saves a little bit of binary size. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155339 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 07:36:33 +00:00
Craig Topper
9d35240eee Make getZeroVector and getOnesVector more alike as far as how they detect 128-bit versus 256-bit vectors. Be explicit about both sizes and use llvm_unreachable. Similar changes to getLegalSplat. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155337 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 07:24:41 +00:00
Craig Topper
69947b9cea Tidy up by removing some 'else' after 'return' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155336 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 06:57:04 +00:00
Craig Topper
1842ba0dfc Tidy up spacing in LowerVECTOR_SHUFFLEtoBlend. Remove code that checks if shuffle operand has a different type than the the shuffle result since it can never happen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155333 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 06:38:28 +00:00
Craig Topper
731dfd0da9 Add a couple llvm_unreachables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155332 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 03:42:40 +00:00
Craig Topper
0fbf364fd7 Remove some tab characers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155331 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 03:28:34 +00:00
Craig Topper
e8eb116ff3 Remove some 'else' after 'return'. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155330 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-23 03:26:18 +00:00
Craig Topper
b14940a047 Make Extract128BitVector and Insert128BitVector take an unsigned instead of an ConstantNode SDValue. getConstant was almost always called just before only to have the functions take it apart and build a new ConstantSDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155325 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-22 20:55:18 +00:00
Craig Topper
767b4f64a0 Convert getNode(UNDEF) to getUNDEF. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155321 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-22 19:29:34 +00:00
Craig Topper
df966f6bee Make calls to getVectorShuffle more consistent. Use shuffle VT for calls to getUNDEF instead of requerying. Use &Mask[0] instead of Mask.data(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155320 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-22 19:17:57 +00:00
Craig Topper
d63fa657e4 Tidy up. 80 columns and argument alignment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155319 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-22 18:51:37 +00:00
Craig Topper
4c7972d638 Simplify code by converting multiple places that were manually concatenating 128-bit vectors to use either CONCAT_VECTORS or a helper function. CONCAT_VECTORS will itself be lowered to the same pattern as before. The helper function is needed for concats of BUILD_VECTORs since getNode(CONCAT_VECTORS) will just return a large BUILD_VECTOR and we may be trying to lower large BUILD_VECTORS when this occurs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155318 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-22 18:15:59 +00:00
Elena Demikhovsky
1da5867236 ZERO_EXTEND/SIGN_EXTEND/TRUNCATE optimization for AVX2 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155309 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-22 09:39:03 +00:00
Craig Topper
9e401f22ec Make some fixed arrays const. Use array_lengthof in a couple places instead of a hardcoded number. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155294 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-21 18:58:38 +00:00
Craig Topper
d0cf565e79 Tidy up. 80 columns and some other spacing issues. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155291 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-21 18:13:35 +00:00
Craig Topper
c909950c38 Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155186 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-20 06:31:50 +00:00
Kevin Enderby
c007eff536 Fixed the llvm-mv X86 disassembler so the 'C' API gets jumps properly 
symbolicated.  These have and operand type of TYPE_RELv which was not handled
as isBranch in translateImmediate() in X86Disassembler.cpp.  rdar://11268426 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155074 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-18 23:12:11 +00:00
Craig Topper
a963c81819 Remove AVX vpermil intrinsics. I removed their uses from clang headers and builtins a while back. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154985 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-18 05:24:00 +00:00
Craig Topper
2091df3d09 Don't decode vperm2i128 or vperm2f128 into a shuffle if bit 3 or 7 of the immediate is set. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154907 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-17 05:54:54 +00:00
Preston Gurd
f23293793a Temporarily turn off anti-dependency checking 
during Post RA scheduling in X86,
until the X86 target is changed to properly set up
post RA liveness.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154874 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-16 22:52:28 +00:00
Richard Smith
2c651fe6f4 Fix incorrect atomics codegen introduced in r154705, and extend test to catch it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154845 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-16 18:43:53 +00:00
Craig Topper
ffa6c40ecf Replace vpermd/vpermps intrinic patterns with custom lowering to target specific nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154801 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-16 07:13:00 +00:00
Craig Topper
9204074598 Change type profile for vpermv back to using operand type for the mask argument to match intrinsic behavior. Add a bitcast to the lowering code to convert mask from v8i32 to v8f32 for vpermps. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154798 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-16 06:43:40 +00:00
Craig Topper
7e9f7fbc11 Flip the arguments when converting vpermd/vpermps intrinsics into instructions. The intrinsic has the mask as the last operand, but the instruction has it as the second. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154797 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-16 06:26:15 +00:00
Craig Topper
8325c11d47 Merge vpermps/vpermd and vpermpd/vpermq SD nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154782 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-16 00:41:45 +00:00
Craig Topper
ca9ee66e36 Fix SDTypeProfile for vpermps. The mask operand should be v8i32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154781 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-16 00:12:20 +00:00
Craig Topper
095c528f30 Spacing fixes and 80 column fixes. Use 0 instead of 0x80 for undef indices in vpermps/vpermd. Hardware only looks at lower 3-bits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154780 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-15 23:48:57 +00:00
Craig Topper
2cb1e9dc7d Remove AVX2 vpermq and vpermpd intrinsics. These can now be handled with normal shuffle vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154778 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-15 22:43:31 +00:00
Nadav Rotem
f16af0a053 Fix PR12529. The Vxx family of instructions are only supported by AVX. 
Use non-vex instructions for SSE4.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154770 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-15 19:36:44 +00:00
Elena Demikhovsky
73c504af9d Added VPERM optimization for AVX2 shuffles 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154761 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-15 11:18:59 +00:00
Richard Smith
42fc29e717 Fix X86 codegen for 'atomicrmw nand' to generate *x = ~(*x & y), not *x = ~*x & y. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154705 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-13 22:47:00 +00:00
Evan Cheng
f0bcecc0d5 Generalize r153635 to deal with TokenFactor chains; also clean up the logic and fix the tests. rdar://11069732, rdar://11236106 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154604 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-12 19:14:21 +00:00
Craig Topper
bf596c9c61 Fix 128-bit ptest intrinsics to take v2i64 instead of v4f32 since these are integer instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154580 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-12 07:23:00 +00:00
Nadav Rotem
91794872ce remove unused argument 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154494 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-11 11:05:21 +00:00
Nadav Rotem
e611378a6e Reapply 154396 after fixing a test. 
Original message:
Modify the code that lowers shuffles to blends from using blendvXX to vblendXX.
blendV uses a register for the selection while Vblend uses an immediate.
On sandybridge they still have the same latency and execute on the same execution ports.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154483 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-11 06:40:27 +00:00
Charles Davis
0d82fe77f2 Add retw and lretw instructions. Also, fix Intel syntax parsing for all 
ret instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154468 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-11 01:10:53 +00:00
Chad Rosier
7f1f145389 Whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154427 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-10 19:42:07 +00:00
Chad Rosier
9142ed58eb Revert r154396, which looks to be the real culprit behind the bot failures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154426 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-10 19:39:18 +00:00
Eric Christopher
a139051654 Temporarily revert this patch to see if it brings the buildbots back. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154425 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-10 19:33:16 +00:00
David Blaikie
2330636a66 Remove unused variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154398 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-10 15:23:13 +00:00
Nadav Rotem
50e64cfe6e Modify the code that lowers shuffles to blends from using blendvXX to vblendXX. 
blendv uses a register for the selection while vblend uses an immediate.
On sandybridge they still have the same latency and execute on the same execution ports.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154396 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-10 14:33:13 +00:00