Commit Graph

57 Commits

Author SHA1 Message Date
Andrew Lenharth
b5884d3116 fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21693 91177308-0d34-0410-b5e6-96231b3b80d8
2005-05-04 19:25:37 +00:00
Duraid Madina
40c9e6be3e support multiplication by constant negative integers
this constmul code is still buggy though, so beware. mul by 7427 is currently
broken, for example. will fix it when I get a moment :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21652 91177308-0d34-0410-b5e6-96231b3b80d8
2005-05-02 07:27:14 +00:00
Duraid Madina
4bd708d8a6 add support for bools to SELECT, this fixes Prolangs-C/bison from the
testsuite, however 09-vor is still dead (hopefully for other reasons!)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21651 91177308-0d34-0410-b5e6-96231b3b80d8
2005-05-02 06:41:13 +00:00
Chris Lattner
17234b7d78 This target doesn't support the FSIN/FCOS/FSQRT nodes yet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21633 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-30 04:26:06 +00:00
Andrew Lenharth
2d86ea21dd Implement Value* tracking for loads and stores in the selection DAG. This enables one to use alias analysis in the backends.
(TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*.  Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21599 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-27 20:10:01 +00:00
Duraid Madina
85d5f6067d clean up some warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21590 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-27 11:57:39 +00:00
Duraid Madina
4706c0395b constmul bugfix: multiply by 27611 was broken
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21564 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-26 09:42:50 +00:00
Duraid Madina
3b84bac3ef clean up the code! (oops) lots more cleaning left, however.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21563 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-26 08:43:47 +00:00
Duraid Madina
b2322561cb * Add code to reduce multiplies by constant integers to shifts, adds and
subtracts. This is a very rough and nasty implementation of Lefevre's
  "pattern finding" algorithm. With a few small changes though, it should
  end up beating most other methods in common use, regardless of the size
  of the constant (currently, it's often one or two shifts worse)

  TODO: rewrite it so it's not hideously ugly (this is a translation from
        perl, which doesn't help ;)
        bypass most of it for multiplies by 2^n+1
	(eventually) teach it that some combinations of shift+add are
	cheaper than others (e.g. shladd on ia64, scaled adds on alpha)
	get it to try multiple booth encodings in search of the cheapest
	routine
	make it work for negative constants

  This is hacked up as a DAG->DAG transform, so once I clean it up I hope
  it'll be pulled out of here and put somewhere else. The only thing backends
  should really have to worry about for now is where to draw the line
  between using this code vs. going ahead and doing an integer multiply
  anyway.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21560 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-26 07:23:02 +00:00
Misha Brukman
7847fcac17 Convert tabs to spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21452 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-22 17:54:37 +00:00
Misha Brukman
4633f1cde8 Remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21424 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-21 23:13:11 +00:00
Duraid Madina
1ce0c015ad print negative 64 bit immediates as negative numbers, makes things a little
easier on the eyes, not that numbers like 18446744073709541376 are bad or
anything


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21300 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-14 10:08:01 +00:00
Duraid Madina
3eb7150c3e oops, this stopped us turning movl r4=0xFFFFFFFF;; and rX, r4 into zxt4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21299 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-14 10:06:35 +00:00
Duraid Madina
c4ccc2db6b we have zextloads, not sextloads!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21296 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-14 08:37:32 +00:00
Duraid Madina
ed09502a0b * add the shladd instruction
* fold left shifts of 1, 2, 3 or 4 bits into adds

  This doesn't save much now, but should get a serious workout once
  multiplies by constants get converted to shift/add/sub sequences.
  Hold on! :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21282 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 06:12:04 +00:00
Duraid Madina
c02780eed1 * if ANDing with a constant of the form:
0x00000..00FFF..FF
      ^      ^
      ^      ^
    any number of
    0's followed by
    some number of
    1's

    then we use dep.z to just paste zeros over the input. For the special
    cases where this is zxt1/zxt2/zxt4, we use those instructions instead,
    because we're all about readability!!!
    that's what it's about!! readability!

  *twitch* ;D


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21279 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 04:50:54 +00:00
Chris Lattner
6ac614a4f2 Remove special handling of ZERO_EXTEND_INREG. This pessimizes code, causing
things like this:

       mov r9 = 65535;;
       and r8 = r8, r9;;

To be emitted instead of:

        zxt2 r8 = r8;;

To get this back, the selector for ISD::AND should recognize this case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21269 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-13 02:41:52 +00:00
Duraid Madina
e8fd25f5c5 * OK, after changing to use liveIn/liveOut instead of IDEFs,
to avoid redundant mov out3=r44 type instructions, we need to
tell the register allocator the truth about out? registers.

FIXME: unfortunately, since the list of allocatable registers is immutable,
we can't simply 'delete r127' from the allocation order, say, if 'out0' is
used. The only correct thing we can do is have a linear order of regs:

out7, out6 ... out2, out1, out0, r32, r33, r34 ... r126, r127

and slide a 'window' of 96 registers along this line, depending on how many
of the out? regs a function actually uses. The only downside of this is
that the out? registers will be allocated _first_, which makes the
resulting assembly ugly. :( Note this in the README. Hope this gets fixed
soon. :) (note the 3rd person speech there)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21252 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 18:42:59 +00:00
Chris Lattner
9c24ba642e Put out* into the allocation order, allowing the register allocator to
coallesce moves into outgoing args.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21249 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 15:12:51 +00:00
Chris Lattner
ea6f770fb0 Make sure to realize that calls use their argument regs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21248 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 15:12:19 +00:00
Duraid Madina
ca494fddcd stop emitting IDEFs for args - change to using liveIn/liveOut
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21247 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 14:54:44 +00:00
Chris Lattner
30e82431b3 IA64 supports this operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21228 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 18:55:36 +00:00
Duraid Madina
21478e55db hmm, should probably change addImm() to take 64-bit arguments one day anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21224 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 07:16:39 +00:00
Duraid Madina
5ef2ec9929 assorted fixes:
* clean up immediates (we use 14, 22 and 64 bit immediates now. sane.)
  * fold r0/f0/f1 registers into comparisons against 0/0.0/1.0
  * fix nasty thinko - didn't use two-address form of conditional add
    for extending bools to integers, so occasionally there would be
    garbage in the result. it's amazing how often zeros are just
    sitting around in registers ;) - this should fix a bunch of tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21221 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-11 05:55:56 +00:00
Duraid Madina
e00e5ded51 ok, the "ia64 has a boatload of registers" joke stopped being funny today ;)
* fix overallocation of integer (stacked) registers: we can't allocate
  registers for local use if they are required as output registers

this fixes 'toast' in the test suite, and all sorts of larger programs
like bzip2 etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21178 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 11:53:00 +00:00
Chris Lattner
da4d4694a8 This target does not support/want ISD::BRCONDTWOWAY
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21164 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-09 03:22:37 +00:00
Duraid Madina
6dcceb5ecb fix bogus division-by-power-of-2 (was wrong for negative input, adds extr insn)
fix hack in division (clean up frcpa instruction)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21153 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-08 10:01:48 +00:00
Duraid Madina
e6a0b6cbda teach asmprinter to print s8/s14 operands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21131 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 12:34:36 +00:00
Duraid Madina
f55e403ef9 codegen immediate forms of add/sub/shift
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21130 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 12:33:38 +00:00
Duraid Madina
18c0c6bcc4 add immediate forms of add, sub, shift
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21129 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-07 12:32:24 +00:00
Duraid Madina
4826a0786d steal sampo's div-by-constant-power-of-2 stuff
thanks sampo!!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21113 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06 09:55:17 +00:00
Duraid Madina
b366a02ff2 add fms instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21112 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06 09:54:09 +00:00
Duraid Madina
b70c2f3ef7 lie a bit and say that r1/r12 (GP/SP) _aren't_ callee-save, as we take
care of this ourselves


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21110 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06 06:18:36 +00:00
Duraid Madina
4ee131ffa8 make sure 'special' registers don't get allocated
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21109 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-06 06:17:54 +00:00
Duraid Madina
6e02e6842a fix SREM/UREM, which gave incorrect results for x%y if x was zero. This is
an ugly hack, but it seems to work. I should fix this properly and add a test
as well.

fixes multisource/obsequi (maybe others)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21075 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04 05:05:52 +00:00
Duraid Madina
09c61b9c19 add implicit use op
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21074 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04 04:50:57 +00:00
Duraid Madina
162a837f63 .bss is no problem here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21061 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-03 14:52:01 +00:00
Duraid Madina
32c46f33b7 ia64 asmprinter fixes:
- turn off assembler's autoalignment
  - set FunctionAddrPrefix/Suffix so that .data8 entries pointing to
    functions have their value wrapped in @fptr(), so that a function
    descriptor will be materialized for that function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21025 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 12:30:47 +00:00
Duraid Madina
75c9fcbdcc support IDEF, fnegabs (thanks sampo)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21023 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 10:33:53 +00:00
Duraid Madina
5c156b7473 add fnegabs op
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21022 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 10:06:27 +00:00
Duraid Madina
a7ee8b8f04 add support FNEG and FABS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21012 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 05:18:38 +00:00
Chris Lattner
43fdea070c This target doesn't support fabs/fneg yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21010 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 05:03:24 +00:00
Duraid Madina
69c8e20aa1 repair mindless SELECT waste.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20982 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 10:35:00 +00:00
Duraid Madina
beeaab28a5 Assorted fixes:
* Stop being pessimistic about output register allocation
  * Start to handle function descriptors: compute target GPs and so on
  when doing indirect calls etc. Not there yet, though. For the moment,
  we try to use _indirect_ branches wherever possible, to stress test
  function descriptors.
  * FP divide-by-zero should work now
  * add varargs (it doesn't work, though)

At this point, all of SingleSource passes (modulo C++ tests that are due
to issues with the CFE, see note in the README.) Much of MultiSource also
passes although there's still a ton of bugs around. Something for me to
work on tomorrow, then. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20960 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-31 12:31:11 +00:00
Duraid Madina
1f867b103d * declare local common symbols as such (.lcomm, not merely .common)
* begin great adventure into correct function descriptor materialization


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20956 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-31 07:40:24 +00:00
Duraid Madina
290f64c1cb daintyness
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20955 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-31 07:36:43 +00:00
Duraid Madina
291e1266c1 add what we need to fudge a 'floating point conditional move', this is
used to get FP div-by-zero working properly (shunt the right answer
depending on how frcpa sets its predicate output)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20954 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-31 07:32:32 +00:00
Duraid Madina
ae8bd73634 Emit .global @function and .global @object entries so the Intel ias
assembler may be used; identify LLVM output as such.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20892 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-28 15:21:43 +00:00
Nate Begeman
8e21e71b24 Change interface to LowerCallTo to take a boolean isVarArg argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20842 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-26 01:29:23 +00:00
Chris Lattner
3c61f70dc1 fix a compilation error, patch contributed by Bill Wendling!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20807 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-24 05:12:48 +00:00