Commit Graph

7385 Commits

Author SHA1 Message Date
Devang Patel
e54abc90fe Introduce MetadataBase, a base class for MDString and MDNode.
Derive MDString directly from MetadataBase. 
Introduce new bitcode block to hold metadata.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76759 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 17:43:22 +00:00
Duncan Sands
ed4b2dc313 Revert commit 76707, it was breaking the llvm-gcc build
on linux platforms.  The binutils assembler does not
recognize the "s" flag, see for example
http://sourceware.org/binutils/docs/as/Section.html 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76733 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 10:35:05 +00:00
Chris Lattner
828f704c10 set the ELF "small" flag on objects that end up in .rodata.cst4 consistently,
updating a mips testcase to expect it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76707 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 00:41:56 +00:00
Dan Gohman
0f4b285a5b Replace the original ad-hoc code for determining whether (v pred w) implies
(x pred y) with more thorough code that does more complete canonicalization
before resorting to range checks. This helps it find more cases where
the canonicalized expressions match.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76671 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 23:03:19 +00:00
Evan Cheng
47b1e2afd0 Remove a big test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76669 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 22:52:04 +00:00
Bob Wilson
b2f8806fdf Fix ocaml tests for 64-bit MacOS systems. LLVM is currently built
as 32-bit code by default, and if gcc defaults to 64-bit code then ocamlc
requires a -cc "gcc -arch i386" option.  We were hardcoding -cc g++
and throwing away any other compiler options that were determined when
ocamlc was configured and built.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76658 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 21:56:46 +00:00
Evan Cheng
3ecadc816d Do not select tSXTB / tSXTH in thumb2 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76600 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 18:15:26 +00:00
Chris Lattner
74625023a8 convert this test to filecheck format, which is faster and avoids false matches of "st" -> "stdin"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76591 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 17:36:24 +00:00
Chris Lattner
99bd8bf8a2 add a testcase for the pic16 section handling stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76579 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 16:48:20 +00:00
Evan Cheng
5d885023fe Another rewriter bug exposed by recent coalescer changes. ReuseInfo::GetRegForReload() should make sure the "switched" register is in the desired register class. I'm surprised this hasn't caused more failures in the past.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76558 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 09:15:00 +00:00
Chris Lattner
634d61b135 remove a very large testcase for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76537 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 06:28:36 +00:00
Evan Cheng
d101a72d79 Fix a dagga combiner bug: avoid creating illegal constant.
Is this really a winning transformation?
fold (shl (srl x, c1), c2) -> (shl (and x, (shl -1, c1)), (sub c2, c1)) or                                                                              
                              (srl (and x, (shl -1, c1)), (sub c1, c2))


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76535 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 05:40:15 +00:00
Dan Gohman
126b56659c Add a testcase for PR2831.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76527 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 01:02:18 +00:00
Dan Gohman
19211b47cc Add a testcase for PR4569, which is now fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76526 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 00:50:52 +00:00
Evan Cheng
af9e7a7c20 Fix ARM isle code that optimize multiply by constants which are power-of-2 +/- 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76520 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 00:31:12 +00:00
Evan Cheng
c95be59371 Cross RC coalescing is now on by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76519 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 00:22:59 +00:00
Dan Gohman
746f3b1a9b The upper argument of ConstantRange is exclusive, not inclusive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76492 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 22:34:18 +00:00
David Greene
76081c4ef7 Re-apply 75490, 75806 and 76177 with fixes and tests. Efficiency comes
next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76486 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 22:02:59 +00:00
Evan Cheng
87faa1fc67 Forgot this test earlier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76485 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 21:46:42 +00:00
Dan Gohman
1224c38698 Assembly and Bitcode support for unsigned/signed overflow flags and
exact sdiv flags.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76475 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 21:19:07 +00:00
Evan Cheng
33d0474bf5 Use TII->findCommutedOpIndices to find the commute operands (rather than guessing).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76472 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 21:16:08 +00:00
Kevin Enderby
5026ae4514 Removed the DumpSymbolsandMacros and LoadSymbolsandMacros MCStreamer API as
the parsing of the .dump and .load should be done in the assembly parser and
not have any need for an MCStreamer API.  Changed the code for now so these
just produce an error saying these specific directives are not yet implemented
since they are likely no longer used and may never need to be implemented.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76462 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 20:25:37 +00:00
Evan Cheng
753480ad20 Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resulting interval's register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76458 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 19:47:55 +00:00
Dan Gohman
f241174421 Revert the addition of hasNoPointerOverflow to GEPOperator.
Getelementptrs that are defined to wrap are virtually useless to
optimization, and getelementptrs that are undefined on any kind
of overflow are too restrictive -- it's difficult to ensure that
all intermediate addresses are within bounds. I'm going to take
a different approach.

Remove a few optimizations that depended on this flag.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76437 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 17:43:30 +00:00
Evan Cheng
6aadc4d4dd xfail for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 15:33:09 +00:00
Chris Lattner
401e10c4fb implement a new magic global "llvm.compiler.used" which is like llvm.used, but
doesn't cause ".no_dead_strip" to be emitted on darwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76399 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 06:14:25 +00:00
Evan Cheng
ba8dc03935 Restore AsmWriterEmitter.cpp back to 74742. The recent changes broke Thumb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76398 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 06:10:07 +00:00
Daniel Dunbar
cc171839ad This test should be run with -m32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76382 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-19 22:44:03 +00:00
Jakob Stoklund Olesen
45d34fe358 Fix http://llvm.org/bugs/show_bug.cgi?id=4583
Inline asm instructions may have additional <imp-def,kill> register operands.
These operands are not marked with a flag like the normal asm operands, so we
must not assert that there is a flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76373 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-19 19:09:59 +00:00
Eli Friedman
2451a64687 Canonicalize bitcasts between types like <1 x i64> and i64 to
insertelement/extractelement.

I'm not entirely sure this is precisely what we want to do: should we 
prefer bitcast(insertelement) or insertelement(bitcast)?  Similarly. should we 
prefer extractelement(bitcast) or bitcast(extractelement)?



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76345 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 23:06:53 +00:00
Eli Friedman
76e7ba893f Back out 76300; apparently the preference is to canonicalize the other
way (bitcast -> insert/extractelement).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76325 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 19:04:16 +00:00
Eli Friedman
8be17397c0 Add combine: X sdiv (1 << Y) -> X udiv (1 << Y) when X doesn't have the
sign bit set.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76304 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 09:53:21 +00:00
Eli Friedman
fc21f8ff14 Canonicalize insert/extractelement from single-element vectors into
bitcasts.

It would also be possible to canonicalize the other way; does anyone 
have a preference?



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76300 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 09:07:47 +00:00
Eli Friedman
62bb413435 Fix simplifylibcalls memset recognition to work on 64-bit platforms
where int is 32 bits.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76293 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 08:34:51 +00:00
Evan Cheng
438d9900c0 Catch more coalescing opportunities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76282 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 04:52:23 +00:00
Evan Cheng
5248468473 Enable cross register class coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76281 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 02:10:10 +00:00
Evan Cheng
59959cd966 Fix pr4552. Stack slot coloring with register must take care not to generate illegal ams.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76258 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 22:42:51 +00:00
Daniel Dunbar
b4b53e5c13 llvm-mc: Add -triple, and start fetching the target asm printer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76257 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 22:38:58 +00:00
Evan Cheng
47e9fab158 Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q', i.e. EAX, EDX, ECX, EBX. In 64-bit mode, it just means all the i64r registers. Yeah, that makes sense.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76248 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 22:13:25 +00:00
Chris Lattner
a9af7e626c rename test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76197 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 18:05:55 +00:00
Duncan Sands
cbc6da628a Testcase for PR4214.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76174 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 11:44:20 +00:00
Eli Friedman
a64eb92fe3 Make promotion in operation legalization for SETCC work correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76153 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 05:16:04 +00:00
Anton Korobeynikov
b8e9ac834a Emit cross regclass register moves for thumb2.
Minor code duplication cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76124 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 23:26:06 +00:00
Dale Johannesen
423ccfe51d Assume an inline asm might be a call, so we get
stack alignment right when it is.  This is not
ideal but conservatively correct.  Adjust a test
to compensate for changed stack offset value.
gcc.apple/asm-block-57.c



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76120 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 22:34:45 +00:00
David Greene
3ac1ab835c Emit line numbers in asm comments when available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76117 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 22:24:20 +00:00
Jakob Stoklund Olesen
57e599a46b Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands.
The inline asm operands must be parsed from the first flag, you cannot assume
that an immediate operand preceeding a register use operand is the flag.
PowerPC "m" operands are represented as (flag, imm, reg) triples.
isRegTiedToDefOperand() would incorrectly interpret the imm as the flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76101 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 20:58:34 +00:00
Evan Cheng
5f15992b77 Changed my mind. We now allow remat of instructions whose defs have subreg indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76100 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 20:15:00 +00:00
Chris Lattner
dfce360306 this should be xfailed on darwin. Darwin doesn't use the libstdc++ in the llvm-gcc distro, it uses the system version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76095 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 18:45:51 +00:00
Evan Cheng
2b48ab947c With recent MC changes, RIP base register is explicitly modeled. Make sure we add it when x86 V_SET0 / V_SETALLONES (by transforming it into a constpool load) into the use instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76094 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 18:44:05 +00:00
Dan Gohman
850f791abc Fill in some holes in ScalarEvolution's loop iteration condition
analysis. This allows indvars to emit a simpler loop trip count
expression.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76085 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 17:34:36 +00:00