Commit Graph

25368 Commits

Author SHA1 Message Date
Dan Gohman
e7d238ea23 Make the NaN test come second, heuristically assuming
that NaNs are less common.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57871 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-21 03:12:54 +00:00
Dan Gohman
0db69dcc87 Use Function::getEntryBlock() instead of Function::front(), for clarity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57870 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-21 03:10:28 +00:00
Oscar Fuentes
7334b15210 CMake: updated lib/CodeGen/CMakeLists.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57869 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-21 02:37:50 +00:00
Dan Gohman
b9a31a15f9 Fix a bug that prevented llvm-extract -delete from working.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57864 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-21 01:08:07 +00:00
Chris Lattner
01426e1a27 Fix gcc.c-torture/compile/920520-1.c by inserting bitconverts
for strange asm conditions earlier.  In this case, we have a
double being passed in an integer reg class.  Convert to like
sized integer register so that we allocate the right number 
for the class (two i32's for the f64 in this case).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57862 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-21 00:45:36 +00:00
Evan Cheng
09e8ca8a58 Add skeleton for the pre-register allocation live interval splitting pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57847 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20 21:44:59 +00:00
Jim Grosbach
932a32d251 Update the stub and callback code to handle lazy compilation. The stub
is re-written by the callback to branch directly to the compiled code
in future invocations.

Added back in range-based memory permission functions for the updating of
the stub on Darwin.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57846 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20 21:39:23 +00:00
Dan Gohman
d659d50482 Fast-isel no longer an experiment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57845 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20 21:30:12 +00:00
Evan Cheng
11a26f3697 Add a register class -> virtual registers map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57844 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20 20:03:28 +00:00
Duncan Sands
d398672ddd Support operations like fp_to_uint with a vector
result type when the result type is legal but
not the operand type.  Add additional support
for EXTRACT_SUBVECTOR and CONCAT_VECTORS,
needed to handle such cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57840 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20 16:31:21 +00:00
Duncan Sands
b5f68e241f LegalizeTypes support for atomic operation promotion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57838 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20 16:17:42 +00:00
Duncan Sands
49c18cce97 Use DAG.getIntPtrConstant rather than DAG.getConstant
with TLI.getPointerTy for a small simplification.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57837 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20 16:14:43 +00:00
Duncan Sands
7e49822875 Always use either MVT::i1 or getSetCCResultType for
the condition of a SELECT node.  Make sure that the
correct extension type (any-, sign- or zero-extend)
is used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57836 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20 16:13:04 +00:00
Duncan Sands
ef5b199905 Formatting - no functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57834 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20 16:06:47 +00:00
Duncan Sands
f6e29499ac Don't use a random type for the select condition,
use an MVT::i1 and simplify the code while there.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57833 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20 16:04:57 +00:00
Duncan Sands
ed294c46da Have X86 custom lowering for LegalizeTypes use
LowerOperation if it doesn't know what else to do.
This methods should probably be factorized some,
but this is good enough for the moment.  Have
LowerATOMIC_BINARY_64 use EXTRACT_ELEMENT rather
than assuming the operand is a BUILD_PAIR (if it
is then getNode will automagically simplify the
EXTRACT_ELEMENT).  This way LowerATOMIC_BINARY_64
usable from LegalizeTypes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57831 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20 15:56:33 +00:00
Bill Wendling
a1dc602542 Set N->OperandList to 0 after deletion. Otherwise, it's possible that it will
be either deleted or referenced afterwards.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57786 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-19 20:51:12 +00:00
Bill Wendling
181b627f62 Fix comment. Other formatting changes. No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57785 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-19 20:34:04 +00:00
Duncan Sands
0e3da1def4 Vector shuffle mask elements may be "undef". Handle
this everywhere in LegalizeTypes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57783 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-19 15:00:25 +00:00
Duncan Sands
94989acaab Use a legal integer type for vector shuffle mask
elements.  Otherwise LegalizeTypes will, reasonably
enough, legalize the mask, which may result in it
no longer being a BUILD_VECTOR node (LegalizeDAG
simply ignores the legality or not of vector masks).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57782 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-19 14:58:05 +00:00
Chris Lattner
2a0b96c2c7 Reapply r57699 with a fix to not crash on asms with multiple results. Unlike
the previous patch this one actually passes make check.

"Fix PR2356 on PowerPC: if we have an input and output that are tied together
that have different sizes (e.g. i32 and i64) make sure to reserve registers for
the bigger operand."



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57771 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18 18:49:30 +00:00
Dan Gohman
668aff6623 Don't truncate GlobalAddress offsets to int in debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57770 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18 18:22:42 +00:00
Evan Cheng
4ed4329c37 By min, I mean max.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57766 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18 05:21:37 +00:00
Evan Cheng
99fe34b9b2 When creating intervals, leave min(1, numdefs) holes after each instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57765 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18 05:18:55 +00:00
Dan Gohman
6520e20e4f Teach DAGCombine to fold constant offsets into GlobalAddress nodes,
and add a TargetLowering hook for it to use to determine when this
is legal (i.e. not in PIC mode, etc.)

This allows instruction selection to emit folded constant offsets
in more cases, such as the included testcase, eliminating the need
for explicit arithmetic instructions.

This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
that attempted to achieve the same effect, but wasn't as effective.

Also, fix handling of offsets in GlobalAddressSDNodes in several
places, including changing GlobalAddressSDNode's offset from
int to int64_t.

The Mips, Alpha, Sparc, and CellSPU targets appear to be
unaware of GlobalAddress offsets currently, so set the hook to
false on those targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18 02:06:02 +00:00
Dan Gohman
95915730de Revert r57699. It's causing regressions in
test/CodeGen/X86/2008-09-17-inline-asm-1.ll
and a few others, and it breaks the llvm-gcc build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57747 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18 01:03:45 +00:00
Dan Gohman
cb747c558c This is now partly done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57734 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 21:39:27 +00:00
Dan Gohman
97b38270cf This is done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57733 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 21:38:40 +00:00
Dan Gohman
c227734855 Factor out the code for mapping LLVM IR condition opcodes to
ISD condition opcodes into helper functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57726 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 21:16:08 +00:00
Evan Cheng
109a5626e7 Add implicit defs of XMM8 to XMM15 on 32-bit call instructions. While this is not technically true, it tells tblgen that these instructions "clobber" the entire XMM register file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57723 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 21:02:22 +00:00
Evan Cheng
af42fe36ac Fix PR2898. Spiller delete a store for reuse before it knows for sure the reuse happened.
Patch by Lang Hames!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57720 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 20:56:41 +00:00
Chris Lattner
cfc14c153a add support for 128 bit aggregates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57715 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 19:59:51 +00:00
Bill Wendling
a9f0cc4ced The Dwarf writer was comparing mangled and unmangled names for C++ code when we
have an unreachable block in a function. This was triggering the assert. This is
a horrid hack to cover this up.

Oh! for a good debug info architecture!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57714 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 18:48:57 +00:00
Mon P Wang
c4d1021ead Added MemIntrinsicNode which is useful to represent target intrinsics that
touches memory and need an associated MemOperand


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57712 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 18:22:58 +00:00
Dan Gohman
8c1a6ca22a Factor out the code for mapping LLVM IR condition opcodes to
ISD condition opcodes into helper functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57710 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 18:18:45 +00:00
Chris Lattner
1fa7198f36 add support for 128 bit inputs on both x86-64 and x86-32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57709 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 18:15:05 +00:00
Chris Lattner
3d0c4c4657 Fix a bug where the x86 backend would reject 64-bit r constraints when
in 32-bit mode instead of assigning a register pair.  This has nothing to
do with PR2356, but I happened to notice it while working on it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57704 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 17:59:52 +00:00
Chris Lattner
0c52644cd8 Fix PR2356 on PowerPC: if we have an input and output that are tied together
that have different sizes (e.g. i32 and i64) make sure to reserve registers for
the bigger operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57699 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 17:52:49 +00:00
Evan Cheng
4b299d4ebd Fix lfence and mfence encoding. These look like MRM5r and MRM6r instructions except they do not have any operands. The RegModRM byte is encoded with register number 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57692 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 17:14:20 +00:00
Evan Cheng
244911bdee getX86RegNum has long been moved to X86RegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57691 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 17:12:18 +00:00
Chris Lattner
81249c95ce refactor some code into a helper method, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57690 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 17:05:25 +00:00
Chris Lattner
6bdcda3d3e Keep track of *which* input constraint matches an output
constraint.  Reject asms where an output has multiple
input constraints tied to it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57687 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 16:47:46 +00:00
Chris Lattner
58f15c482a add an assert so that PR2356 explodes instead of running off an
array.  Improve some minor comments, refactor some helpers in
AsmOperandInfo.  No functionality change for valid code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57686 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 16:21:11 +00:00
Evan Cheng
6784598895 Fix a very subtle spiller bug: UpdateKills should not forget to track defs of aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57673 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 06:16:07 +00:00
Chris Lattner
abec474236 add some simple hacky long double support for the CBE. This
should work for intel long double, but ppc long double aborts
in convert.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57672 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 06:11:48 +00:00
Dan Gohman
63f97201dc Fun x86 encoding tricks: when adding an immediate value of 128,
use a SUB instruction instead of an ADD, because -128 can be
encoded in an 8-bit signed immediate field, while +128 can't be.
This avoids the need for a 32-bit immediate field in this case.

A similar optimization applies to 64-bit adds with 0x80000000,
with the 32-bit signed immediate field.

To support this, teach tablegen how to handle 64-bit constants.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57663 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 01:33:43 +00:00
Dan Gohman
74feef261a Define patterns for shld and shrd that match immediate
shift counts, and patterns that match dynamic shift counts
when the subtract is obscured by a truncate node.

Add DAGCombiner support for recognizing rotate patterns
when the shift counts are defined by truncate nodes.

Fix and simplify the code for commuting shld and shrd
instructions to work even when the given instruction doesn't
have a parent, and when the caller needs a new instruction.

These changes allow LLVM to use the shld, shrd, rol, and ror
instructions on x86 to replace equivalent code using two
shifts and an or in many more cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57662 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 01:23:35 +00:00
Dan Gohman
a1fcd77ccf Use 0 instead of false to return a null pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57660 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 00:56:52 +00:00
Dan Gohman
f522068412 Trim #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57649 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-16 20:18:31 +00:00
Chris Lattner
cc4ba7834f fix typo noticed by sdt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57644 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-16 17:02:50 +00:00