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19476 Commits

Author SHA1 Message Date
Rafael Espindola
e81abfd30b Spelling and grammar fixes to problems found by Duncan. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138858 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 16:43:33 +00:00
Eli Friedman
ac86d43eae Make sure we don't crash when -miphoneos-version-min is specified on x86. Hopefully this will fix gcc testsuite failures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138856 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 16:19:51 +00:00
Eric Christopher
c967ad8c88 Rework this conditional a bit. 
Patch by Sanjoy Das


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138853 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 04:17:21 +00:00
Bruno Cardoso Lopes
57d6a5e491 - Move all MOVSS and MOVSD patterns close to their definitions 
- Duplicate some store patterns to their AVX forms!
- Catched a bug while restricting the patterns subtarget, fix it
  and update a testcase to check it properly

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138851 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 03:04:20 +00:00
Bruno Cardoso Lopes
fc646a6b06 Remove unnecessary AVX checks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138850 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 03:04:14 +00:00
Bruno Cardoso Lopes
5affa5196f Teach more places to use VMOVAPS,VMOVUPS instead of MOVAPS,MOVUPS, 
whenever AVX is enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138849 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 03:04:09 +00:00
Evan Cheng
0899f5c62d Fix (movhps load) lowering / pattern to match more cases. rdar://10050549 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138848 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 02:05:24 +00:00
Eli Friedman
3d93861c23 Some minor cleanups for r138845. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138846 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 00:41:05 +00:00
Eli Friedman
2bdffe4882 Some 64-bit atomic operations on ARM. 64-bit cmpxchg coming next. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138845 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-31 00:31:29 +00:00
Owen Anderson
eaca928a37 Fix issues with disassembly of IT instructions involving condition codes other the EQ/NE. Discovered by roundtrip testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138840 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 22:58:27 +00:00
Owen Anderson
21df36c57a Fix encoding of CBZ/CBNZ Thumb2 instructions with immediate offsets rather than labels. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138837 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 22:15:17 +00:00
Owen Anderson
a7710edd98 Fix encoding of PC-relative Thumb1 LDR's when using immediate offsets instead of labels. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138835 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 22:10:03 +00:00
Owen Anderson
391ac65377 Fix encoding of Thumb1 B instructions with immediate offsets, which is necessary for round-tripping. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138834 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 22:03:20 +00:00
Owen Anderson
10096dbdef Clean up whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138833 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 21:58:18 +00:00
Bill Wendling
e716124feb Fix off-by-one error Benjamin noticed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138832 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 21:23:24 +00:00
Bill Wendling
011a8e1684 Enable compact unwind info by default. This only applies to Darwin when CFI is 
disabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138826 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 20:54:11 +00:00
Jeffrey Yasskin
cda2a146d1 Fix C++0x narrowing errors when char is unsigned. 
In the case of EDInstInfo, this would actually cause a bug when -1 became 255
and was then compared >=0 in llvm-mc/Disassembler.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138825 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 20:53:29 +00:00
Rafael Espindola
151ab3e2f7 Adds support for variable sized allocas. For a variable sized alloca, 
code is inserted to first check if the current stacklet has enough
space. If so, space is allocated by simply decrementing the stack
pointer. Otherwise a runtime routine (__morestack_allocate_stack_space
in libgcc) is called which allocates the required memory from the
heap.

Patch by Sanjoy Das.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138818 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 19:47:04 +00:00
Rafael Espindola
d07b7ec772 Adds a SelectionDAG node X86SegAlloca which will be custom lowered 
from DYNAMIC_STACKALLOC.

Two new pseudo instructions (SEG_ALLOCA_32 and SEG_ALLOCA_64) which
will match X86SegAlloca (based on word size) are also added.  They
will be custom emitted to inject the actual stack handling code.

Patch by Sanjoy Das.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138814 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 19:43:21 +00:00
Rafael Espindola
76927d7586 Emit segmented-stack specific code into function prologues for 
X86. Modify the pass added in the previous patch to call this new
code.

This new prologues generated will call a libgcc routine (__morestack)
to allocate more stack space from the heap when required

Patch by Sanjoy Das.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138812 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 19:39:58 +00:00
Rafael Espindola
0f9827cd94 Command line option to enable support for segmented stacks: 
-segmented-stacks.
Patch by Sanjoy Das!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138811 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 19:29:02 +00:00
Evan Cheng
37fefc20d3 Follow up to r138791. 
Add a instruction flag: hasPostISelHook which tells the pre-RA scheduler to
call a target hook to adjust the instruction. For ARM, this is used to
adjust instructions which may be setting the 's' flag. ADC, SBC, RSB, and RSC
instructions have implicit def of CPSR (required since it now uses CPSR physical
register dependency rather than "glue"). If the carry flag is used, then the
target hook will *fill in* the optional operand with CPSR. Otherwise, the hook
will remove the CPSR implicit def from the MachineInstr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138810 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 19:09:48 +00:00
Roman Divacky
0aaa9195b5 Set CR1EQ only when lowering vararg floating arguments (not any vararg 
arguments as before), unset CR1EQ otherwise.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138802 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 17:04:16 +00:00
James Molloy
e7815c22fc Fix typos in SPUMCTargetDesc.h 
Patch supplied by Liu (projlc@gmail.com)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138799 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 07:27:02 +00:00
James Molloy
7e14b240a8 Fix typo in BlackfinFrameLowering.h 
Patch supplied by Liu (projlc@gmail.com)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138798 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 07:26:11 +00:00
James Molloy
4d8af4ee6e Fix typo in MSP430MCTargetDesc.h. 
Patch supplied by Liu (projlc@gmail.com)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138797 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 07:24:47 +00:00
James Molloy
afaf80a13b Fix typo in MipsMCTargetDesc.h; Patch supplied by Liu (proljc@gmail.com) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138796 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 07:23:29 +00:00
Evan Cheng
342e3161d9 Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical 
register dependency (rather than glue them together). This is general
goodness as it gives scheduler more freedom. However it is motivated by
a nasty bug in isel.

When a i64 sub is expanded to subc + sube.
  libcall #1
     \
      \        subc 
       \       /  \
        \     /    \
         \   /    libcall #2
          sube

If the libcalls are not serialized (i.e. both have chains which are dag
entry), legalizer can serialize them in arbitrary orders. If it's
unlucky, it can force libcall #2 before libcall #1 in the above case.

  subc
   |
  libcall #2
   |
  libcall #1
   |
  sube

However since subc and sube are "glued" together, this ends up being a
cycle when the scheduler combine subc and sube as a single scheduling
unit.

The right solution is to fix LegalizeType too chains the libcalls together.
However, LegalizeType is not processing nodes in order so that's harder than
it should be. For now, the move to physical register dependency will do.

rdar://10019576


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138791 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-30 01:34:54 +00:00
Jim Grosbach
d3765189bf Revert 138781. It's not playing nicely with the immediate forms for ADC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138782 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 23:24:15 +00:00
Jim Grosbach
e94a5b1218 Thumb2 assembler aliases for ADC/SBC w/o the .w suffix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138781 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 23:20:54 +00:00
Owen Anderson
694e0ffb8a Add missing encoding information for some of the GPR<->FP register moves. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138780 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 23:15:25 +00:00
Jim Grosbach
f8e1e3e729 Thumb2 parsing and encoding for IT blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138773 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 22:24:09 +00:00
Eli Friedman
f3704769bb Explicitly zero out parts of a vector which are required to be zero by the algorithm in LowerUINT_TO_FP_i32. This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly. Fixes PR10802. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138768 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 21:15:46 +00:00
Owen Anderson
acb274baac Apply the same fix for the change in LDR_PRE_IMM/LDRB_PRE_IMM operand encodings to the load-store optimizer that I applied to the instruction selector in r138758. Fixes ary3 from the nightly test suite. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138766 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 21:14:19 +00:00
Owen Anderson
1f26758510 Specify an additional fixed bit in the PLD/PLDW/PLI register-register encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138760 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 20:42:00 +00:00
Owen Anderson
c4e16de765 addrmode_imm12 and addrmode2_offset encode their immediate values differently. Update the manual instruction selection code that was encoding them the addrmode2 way even though LDR_PRE_IMM/LDRB_PRE_IMM had switched to addrmode_imm12. Should fix a number of nightly test failures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138758 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 20:16:50 +00:00
Owen Anderson
0da10cf44d Improve handling of #-0 offsets for many more pre-indexed addressing modes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138754 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 19:36:44 +00:00
Eli Friedman
4db5acaf48 Expand ATOMIC_LOAD and ATOMIC_STORE for architectures I don't know well enough to fix properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138751 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 18:23:02 +00:00
Owen Anderson
07700d486e Update the load-store optimizer for changes to the operands on LDR_PRE_IMM and LDRB_PRE_IMM in r138653. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138746 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 17:59:41 +00:00
Bruno Cardoso Lopes
41dfabb0e3 Move non-intruction patterns to a more appropriate place! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138744 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 17:51:24 +00:00
Owen Anderson
63553c77cd Add support for parsing #-0 on non-memory-operand immediate values, and add a testcase that necessitates it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138739 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-29 17:17:09 +00:00
Nicolas Geoffray
1c36ba50ac Remove premature previous commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138725 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-28 14:52:51 +00:00
Nicolas Geoffray
c98da24bed Encoding of instructions referencing segments has changed. Do what X86MCCodeEmitter does. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138723 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-28 13:07:57 +00:00
Benjamin Kramer
2753ae314f Silence GCC warnings and make an array const. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138706 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-27 17:36:14 +00:00
Owen Anderson
f1eab597b2 Improve encoding support for BLX with immediat eoperands, and fix a BLX decoding bug this uncovered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138675 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 23:32:08 +00:00
Owen Anderson
d7568e1c35 Correct encoding of BL with immediate offset. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138673 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 22:54:51 +00:00
Jim Grosbach
4af54a461f ARM assembly parsing tweak for pldw. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138669 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 22:21:51 +00:00
Owen Anderson
9f7e831994 Spelling fail. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138667 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 21:47:57 +00:00
Jim Grosbach
89df996ab2 Thumb2 assembler parsing and encoding of IT instruction. 
This handles only the handling of the IT instruction itself, not the
processing and validation of the instructions in the IT block. That's next,
and will include encoding tests for IT itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138665 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 21:43:41 +00:00
Eli Friedman
43f51aeca8 Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138660 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 21:21:21 +00:00