Commit Graph

86482 Commits

Author SHA1 Message Date
Akira Hatanaka
e90a3bcae1 [mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node.
Patch by Sasa Stankovic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167548 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 19:10:58 +00:00
Akira Hatanaka
7085221a59 Delete MipsFunctionInfo::NextStackOffset. No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167546 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 19:04:26 +00:00
Amara Emerson
162d91c1e0 Revert r167540 until regression tests are updated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167545 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 18:57:14 +00:00
Bill Wendling
bef6eb0027 Remove accidental commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167544 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 18:39:32 +00:00
Hans Wennborg
ab1b6c83ad Fix bad test IR in switch_to_lookup_table.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167543 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 18:38:24 +00:00
Amara Emerson
19a1fcf868 Improve ARM build attribute emission for architectures types.
This also changes the default architecture emitted for a generic CPU to "v7".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167540 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 18:01:03 +00:00
Pawel Wodnicki
e4f2116afc fix typo PR1476
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167536 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 17:00:18 +00:00
Pawel Wodnicki
d36e8e8b73 fix for PR1476
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167535 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 16:56:52 +00:00
Kostya Serebryany
7846c1c851 [asan] fix bug 14277 (asan needs to fail with fata error if an __asan interface function is being redefined. Before this fix asan asserts)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167529 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 12:42:18 +00:00
Andrew Trick
3b87f6204f misched: Heuristics based on the machine model.
misched is disabled by default. With -enable-misched, these heuristics
balance the schedule to simultaneously avoid saturating processor
resources, expose ILP, and minimize register pressure. I've been
analyzing the performance of these heuristics on everything in the
llvm test suite in addition to a few other benchmarks. I would like
each heuristic check to be verified by a unit test, but I'm still
trying to figure out the best way to do that. The heuristics are still
in considerable flux, but as they are refined we should be rigorous
about unit testing the improvements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167527 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 07:05:09 +00:00
Andrew Trick
881a05b46c misched: handle on-the-fly regpressure queries better for 2-addr
instructions without relying on liveintervals.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167526 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 07:05:05 +00:00
Bill Wendling
168c190c58 Add comment describing what's going on here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167525 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 05:19:04 +00:00
Bill Wendling
a4c7693118 When we're updating the subprogram scope DIE, we want to determine if we're
updating an abstract DIE or not. If we are, then we use that. Its children will
be added on later, as well as the object pointer attribute. Otherwise, this
function may be called with a concrete DIE twice and adding the children and
object pointer attribute to it twice.
<rdar://problem/12401423&12600340>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167524 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 04:42:18 +00:00
Eli Bendersky
796f2b02f7 Fix a broken sentence
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167521 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 01:52:41 +00:00
Eli Bendersky
c78bb707a5 Document the -input-file option of FileCheck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167517 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 01:41:30 +00:00
Chad Rosier
6aa6e5a285 [arm fast-isel] Appease the machine verifier by using the proper register
classes.  For my test case the number of errors drop from 356 to 21.
Part of rdar://12594152

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167508 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-07 00:13:01 +00:00
Jakub Staszak
dccd7f9187 Simplify code. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167505 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 23:52:19 +00:00
Nadav Rotem
d8eae8ba05 Make the helper functions static. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167501 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 23:36:00 +00:00
Chad Rosier
e7bd51980a Mark the Int_eh_sjlj_dispatchsetup pseudo instruction as clobbering all
registers.  Previously, the register we being marked as implicitly defined, but
not killed.  In some cases this would cause the register scavenger to spill a
dead register.

Also, use an empty register mask to simplify the logic and to reduce the memory
footprint.
rdar://12592448

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167499 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 23:05:24 +00:00
Chad Rosier
7979b24e5c [regallocfast] Make sure the MachineRegisterInfo is aware of clobbers from a
register masks.  This is an obvious and necessary fix for a soon to be committed
patch.  No test case possible at this time.  Reviewed by Jakob.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167498 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 22:52:42 +00:00
Nadav Rotem
a6fb97a49a CostModel: add another known vector trunc optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167488 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 21:17:17 +00:00
Argyrios Kyrtzidis
9d8c678658 [c-index-test] When building with BUILD_CLANG_ONLY=YES, include c-index-test.
It is part of libclang and has other uses besides running the clang tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167484 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 19:54:46 +00:00
Nadav Rotem
b042868c01 Cost Model: add tables for some avx type-conversion hacks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167480 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 19:33:53 +00:00
Andrew Kaylor
a082892fb7 Fix build error from previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167477 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 19:06:46 +00:00
Andrew Kaylor
776054dd93 Add interface for object-based JIT events.
This patch adds the interface to expose events from MCJIT when an object is emitted or freed and implements the MCJIT functionality to send those events.  The IntelJITEventListener implementation is left empty for now.  It will be fleshed out in a future patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167475 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 18:51:59 +00:00
Daniel Dunbar
64afe13a20 MemoryBuffer: Windows doesn't define S_IFIFO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167467 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 17:08:09 +00:00
Alexey Samsonov
4db4a71ffd docs: use code font for console commands in phabricator manual
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167459 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 15:04:37 +00:00
Michael Liao
0f6a599434 Remove tailing whitespaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167445 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 08:06:35 +00:00
Andrew Trick
8d4abb2446 misched: TargetSchedule interface for machine resources.
Expose the processor resources defined by the machine model to the
scheduler and other clients through the TargetSchedule interface.

Normalize each resource count with respect to other kinds of
resources. This allows scheduling heuristics to balance resources
against other kinds of resources and latency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167444 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 07:10:38 +00:00
Andrew Trick
2276453e2b misched: Rename RemainingCount to avoid confusion with remaining resources.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167443 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 07:10:34 +00:00
Andrew Trick
a78d3228e8 ScheduleDAG interface. Added OrderKind to distinguish nonregister dependencies.
This is in preparation for adding "weak" DAG edges, but generally
simplifies the design.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167435 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06 03:13:46 +00:00
Nadav Rotem
887c1fe701 Refactor the getTypeLegalizationCost interface. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167422 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 23:57:45 +00:00
Nadav Rotem
7ae3bcca45 CostModel: Add tables for the common x86 compares.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167421 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 23:48:20 +00:00
Nadav Rotem
2d1528b358 Code Model: Improve the accuracy of the zext/sext/trunc vector cost estimation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167412 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 22:20:53 +00:00
Richard Smith
e010eb3041 Suppress signed/unsigned comparison warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167410 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 22:01:44 +00:00
Kevin Enderby
32c1a82a6b Fix for PR14264 cause by commit r167237 which did not take into account a
possible buffer change with a .macro directive.

rdar://12637628


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167408 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 21:55:41 +00:00
Daniel Dunbar
7895353b75 MemoryBuffer: Support reading named pipes in getFile().
- We only support this when the client didn't claim to know the file size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167407 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 21:55:40 +00:00
Nadav Rotem
a4ab5290e6 Cost Model: Normalize the insert/extract index when splitting types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167402 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 21:12:13 +00:00
Nadav Rotem
75138f58b0 Cost Model: teach the cost model about expanding integers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167401 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 21:11:10 +00:00
Andrew Kaylor
28989889bf Add a method to indicate section address re-assignment is finished.
Prior to this patch RuntimeDyld attempted to re-apply relocations every time reassignSectionAddress was called (via MCJIT::mapSectionAddress).  In addition to being inefficient and redundant, this led to a problem when a section was temporarily moved too far away from another section with a relative relocation referencing the section being moved.  To fix this, I'm adding a new method (finalizeObject) which the client can call to indicate that it is finished rearranging section addresses so the relocations can safely be applied.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167400 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 20:57:16 +00:00
Ulrich Weigand
86aef0a4f0 On PowerPC64, integer return values (as well as arguments) are supposed
to be extended to a full register.   This is modeled in the IR by marking
the return value (or argument) with a signext or zeroext attribute.

However, while these attributes are respected for function arguments,
they are currently ignored for function return values by the PowerPC
back-end.  This patch updates PPCCallingConv.td to ask for the promotion
to i64, and fixes LowerReturn and LowerCallResult to implement it.

The new test case verifies that both arguments and return values are
properly extended when passing them; and also that the optimizers
understand incoming argument and return values are in fact guaranteed
by the ABI to be extended.

The patch caused a spurious breakage in CodeGen/PowerPC/coalesce-ext.ll,
since the test case used a "ret" instruction to create a use of an i32
value at the end of the function (to set up data flow as required for
what the test is intended to test).  Since there's now an implicit
promotion to i64, that data flow no longer works as expected.  To fix
this, this patch now adds an extra "add" to ensure we have an appropriate
use of the i32 value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167396 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 19:39:45 +00:00
Nadav Rotem
e623702c22 Implement the cost of abnormal x86 instruction lowering as a table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167395 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 19:32:46 +00:00
Jim Grosbach
6837232a60 lli: Initialize the native asm parser for inline assembly.
MCJIT supports inline assembly, but requires the asm parser to do so.
Make sure to link it in and initialize it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167392 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 19:06:05 +00:00
Hal Finkel
827b7a070d Add support for the PowerPC-specific inline asm Z constraint and y modifier.
The Z constraint specifies an r+r memory address, and the y modifier expands
to the "r, r" in the asm string. For this initial implementation, the base
register is forced to r0 (which has the special meaning of 0 for r+r addressing
on PowerPC) and the full address is taken in the second register. In the
future, this should be improved.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167388 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 18:18:42 +00:00
Adhemerval Zanella
cfe09ed28d [PATCH] PowerPC: Expand load extend vector operations
This patch expands the SEXTLOAD, ZEXTLOAD, and EXTLOAD operations for
vector types when altivec is enabled.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167386 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 17:15:56 +00:00
Rafael Espindola
08f9c8d776 Add missing this->. Fixes pr14238.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167383 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 14:57:21 +00:00
Richard Osborne
544533301e Don't infer whether a value is captured in the current function from the
'nocapture' attribute.

The nocapture attribute only specifies that no copies are made that
outlive the function. This isn't the same as there being no copies at all.
This fixes PR14045.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167381 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 10:48:24 +00:00
Chandler Carruth
e507fc6eea Add a couple of stubs to the release notes for things I noticed while
clearing out my backlog of commit mail.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167380 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 10:17:00 +00:00
Eli Bendersky
87a1af4380 PR14256: SelectionDAGLowering was renamed to SelectionDAGBuilder a long time ago. Fix references to it in documentation and comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167378 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 02:59:23 +00:00
NAKAMURA Takumi
db2b285225 ConstantFolding.cpp: Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167377 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 00:11:11 +00:00