Commit Graph

17572 Commits

Author SHA1 Message Date
Bill Wendling
7caebff83d Sort the register list based on the *actual* register numbers rather than the
enum values we give to them. <rdar://problem/8823730>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 21:20:59 +00:00
Matt Beaumont-Gay
5f8a917b65 Mostly undo r123297, but move the default case in EvaluateAsPCRel to the top
of the switch block to appease GCC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123317 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 18:02:55 +00:00
Nick Lewycky
e45f2dfde6 Add another note taken from the gcc bugzilla.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123315 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 09:06:19 +00:00
Venkatraman Govindaraju
860b64cb1e Implement RETURNADDR and FRAMEADDR lowering in SPARC backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123310 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 05:08:36 +00:00
Venkatraman Govindaraju
c178308b23 Remove SPARC backend getpcx instruction's Uses. Also, insert an assert to
ensure %o7 is not assigned as the destination of getpcx instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123304 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 03:52:59 +00:00
Venkatraman Govindaraju
7d29ffbe5b Fix SPARC backend call instruction so that arguments passed through registers
are correctly marked as used instead of passing all possible argument registers
as used.  


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123301 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 03:18:21 +00:00
Matt Beaumont-Gay
676943b31a Prefer llvm_unreachable to assert(0)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123297 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 01:42:42 +00:00
Jason W Kim
86a97f2e4d 1. Support ELF pcrel relocations for movw/movt:
R_ARM_MOVT_PREL and R_ARM_MOVW_PREL_NC.
2. Fix minor bug in ARMAsmPrinter - treat bitfield flag as a bitfield, not an enum.
3. Add support for 3 new elf section types (no-ops)




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123294 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 00:19:25 +00:00
Jason W Kim
9081b4b4cf Workaround for bug 8721.
.s Test added.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123292 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 23:53:41 +00:00
Venkatraman Govindaraju
f27df33b02 SPARC backend: correct ICC/FCC uses for ADDX and SELECT_CC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123281 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 22:38:28 +00:00
Evan Cheng
b72d2a92b7 Clean up ARM subtarget code by using Triple ADT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123276 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 21:46:47 +00:00
Daniel Dunbar
eb9f3f91c0 McARM: Fill in GetMnemonicAcceptInfo().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123253 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 19:06:29 +00:00
Bob Wilson
6c562f69fe Fix a comment: We now have intrinsics for vcvtr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123246 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 17:56:41 +00:00
Chris Lattner
3a5004dc3e Fix PR8946, a missing reg/reg form of movdqu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123242 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 17:04:55 +00:00
Daniel Dunbar
3771dd041f McARM: Sketch some logic for determining when to add carry set and predication code operands based on the "canonical mnemonic".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123239 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 15:59:53 +00:00
Daniel Dunbar
352e148cbe McARM: Add more hard coded logic to SplitMnemonicAndCC to also split out the
carry setting flag from the mnemonic.

Note that this currently involves me disabling a number of working cases in
arm_instructions.s, this is a hopefully short term evil which will be rapidly
fixed (and greatly surpassed), assuming my current approach flies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123238 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 15:59:50 +00:00
Kalle Raiskila
b9505f6bed Fix a thinko in 123226 that caused test failures on "other" platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123229 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 11:27:56 +00:00
Kalle Raiskila
76020ed6f3 Add a "nop filler" pass to SPU.
Filling no-ops is done just before emitting of assembly,
when the instruction stream is final. No-ops are inserted
to align the instructions so the dual-issue of the pipeline
is utilized. This speeds up generated code with a minimum of 
1% on a select set of algorithms.

This pass may be redundant if the instruction scheduler and 
all subsequent passes that modify the instruction stream 
(prolog+epilog inserter, register scavenger, are there others?)
are made aware of the instruction alignments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123226 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 09:07:54 +00:00
Chandler Carruth
15ed90c859 Teach constant folding to perform conversions from constant floating
point values to their integer representation through the SSE intrinsic
calls. This is the last part of a README.txt entry for which I have real
world examples.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123206 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 01:07:24 +00:00
Owen Anderson
da1c122da5 Fix a random missed optimization by making InstCombine more aggressive when determining which bits are demanded by
a comparison against a constant.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123203 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 00:36:45 +00:00
Eric Christopher
94bb7b561c Even if we don't have 7 bytes of stack space we may need to save and
restore the stack pointer from the frame pointer on thumbv6.

Fixes rdar://8819685


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123196 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11 00:16:04 +00:00
Eric Christopher
4dd312f233 Expand on the safeness of restoring the sp from the fp a bit more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123193 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 23:10:59 +00:00
Chris Lattner
4a6fb94c40 +0.0 vs -0.0 differences can be handled by looking at the user of the
operation in some cases.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123190 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 21:01:17 +00:00
Daniel Dunbar
8ab1112bdc McARM: Flush out hard coded known non-predicated mnemonic list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 21:01:03 +00:00
Daniel Dunbar
8d66b7852a McARM: Mark some T2 ...s instructions as codegen only, they aren't real
instructions but are restricted pseudo forms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123177 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 15:26:39 +00:00
Daniel Dunbar
238100aaa7 ARM/MC: Mark several '...S' instructions as codegen only, they aren't real
instructions but are restricted pseudo forms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123176 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 15:26:35 +00:00
Daniel Dunbar
6a5c22ed89 MC/ARM/AsmParser: Minor nitty fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123175 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 15:26:21 +00:00
Anton Korobeynikov
2c8bd754de Fix merge fallout
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123172 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 12:56:18 +00:00
Anton Korobeynikov
7af6fad0a7 Update CMake stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123171 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 12:39:23 +00:00
Anton Korobeynikov
16c29b5f28 Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123170 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 12:39:04 +00:00
Daniel Dunbar
badbd2fde9 MC/ARM/AsmParser: Split out SplitMnemonicAndCC().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123169 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 12:24:52 +00:00
Jakob Stoklund Olesen
c9df025e33 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
These functions not longer assert when passed 0, but simply return false instead.

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123155 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 02:58:51 +00:00
Chris Lattner
00a35d0f14 expand on a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123145 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10 00:33:01 +00:00
Chris Lattner
66d7a5793c typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123142 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 23:48:41 +00:00
Chris Lattner
7cc4e304a6 xref a PR #
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123141 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 23:42:22 +00:00
Chandler Carruth
fb00e2715b Add a note about the inability to model FP -> int conversions which
perform rounding other than truncation in the IR. Common C code for this
turns into really an LLVM intrinsic call that blocks a lot of further
optimizations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123135 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 22:36:18 +00:00
Jakob Stoklund Olesen
be97e906e0 Teach TargetRegisterInfo how to cram stack slot indexes in with the virtual and
physical register numbers.

This makes the hack used in LiveInterval official, and lets LiveInterval be
oblivious of stack slots.

The isPhysicalRegister() and isVirtualRegister() predicates don't know about
this, so when a variable may contain a stack slot, isStackSlot() should always
be tested first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123128 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 21:17:37 +00:00
Chandler Carruth
96b1b6c135 Add a note about a missed FP optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123126 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 21:00:19 +00:00
Chandler Carruth
694d753b09 Another missed memset in std::vector initialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123116 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 11:29:57 +00:00
Chandler Carruth
27a2a13b62 Fix a cut-paste-o so that the sample code is correct for my last note.
Also, switch to a more clear 'sink' function with its declaration to
avoid any confusion about 'g'. Thanks for the suggestion Frits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123113 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 10:10:59 +00:00
Chandler Carruth
e5ca494ae6 Another missed optimization of trivial vector code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123112 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 09:58:36 +00:00
Chandler Carruth
d8723a9b55 Add a note about vector's size-constructor producing dead stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 09:58:33 +00:00
Jakob Stoklund Olesen
4314268128 Replace TargetRegisterInfo::printReg with a PrintReg class that also works without a TRI instance.
Print virtual registers numbered from 0 instead of the arbitrary
FirstVirtualRegister. The first virtual register is printed as %vreg0.
TRI::NoRegister is printed as %noreg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123107 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 03:05:53 +00:00
Chandler Carruth
75fbd3793f Add a note about a missed memset optimization from std::fill.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123103 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09 01:32:55 +00:00
Jakob Stoklund Olesen
b258135301 Fix the last virtual register enumerations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123102 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-08 23:11:11 +00:00
Evan Cheng
55d4200336 Recognize inline asm 'rev /bin/bash, ' as a bswap intrinsic call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123048 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-08 01:24:27 +00:00
Evan Cheng
c36b7069b4 Do not model all INLINEASM instructions as having unmodelled side effects.
Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.

This allows memory instructions to be moved around INLINEASM instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123044 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 23:50:32 +00:00
Bob Wilson
70f85730b1 Add an explanatory message for an assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123042 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 23:40:46 +00:00
Matt Beaumont-Gay
697970286a Eliminate variable only used in debug builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123040 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 22:34:58 +00:00
Bob Wilson
11a1dfffc8 Lower some BUILD_VECTORS using VEXT+shuffle.
Patch by Tim Northover.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123035 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07 21:37:30 +00:00