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73 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
448d986858 The wrong relocation was being emitted for several SSSE3 instructions. 
This fixes PR10963. Thanks to Benjamin for finding the wrong tablegen
declaration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140184 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 21:39:21 +00:00
Bruno Cardoso Lopes
d91c6e058b Fix PR10949. Fix the encoding of VMOVPQIto64rr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140098 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 23:36:59 +00:00
Bruno Cardoso Lopes
0c9acfcb50 Re-write part of VEX encoding logic, to be more easy to read! Also fix 
a bug and add a testcase!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138123 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 22:27:29 +00:00
Bruno Cardoso Lopes
863e0f25b7 Fix PR10677. Initial patch and idea by Peter Cooper but I've changed the 
implementation!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138029 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 02:23:56 +00:00
Bruno Cardoso Lopes
1deddbbd56 Reorder declarations of vmovmskp* and also put the necessary AVX 
predicate and TB encoding fields. This fix the encoding for the
attached testcase. This fixes PR10625.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137684 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 23:36:45 +00:00
Evan Cheng
5de728cfe1 Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil. 
This can happen in cases where TableGen generated asm matcher cannot check
whether a register operand is in the right register class. e.g. mem operands.

rdar://8204588


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136292 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 23:22:03 +00:00
Kevin Enderby
c37d4bbf1f Fix llvm-mc handing of x86 instructions that take 8-bit unsigned immediates. 
llvm-mc gives an "invalid operand" error for instructions that take an unsigned
immediate which have the high bit set such as:
    pblendw $0xc5, %xmm2, %xmm1
llvm-mc treats all x86 immediates as signed values and range checks them.
A small number of x86 instructions use the imm8 field as a set of bits.
This change only changes those instructions and where the high bit is not
ignored.  The others remain unchanged.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136287 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 23:01:50 +00:00
Kevin Enderby
d521f2d2f1 Changed the X86 PUSH64i8 record to use the i64i8imm ParserMatchClass so that a 
push with a small constant produces a 2-byte push.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134501 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 17:23:46 +00:00
Eli Friedman
af45b3d8cb Add assembler/disassembler support for non-AVX pclmulqdq. While I'm here, use proper aliases for the pclmullqlqdq and friends. PR10269. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134424 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-05 18:21:20 +00:00
Joerg Sonnenberger
ca0ede7655 Recognize the xstorerng alias for VIA PadLock's xstore instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134126 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-30 01:38:03 +00:00
Eli Friedman
a390a1aa48 Add support for movntil/movntiq mnemonics. Reported on llvmdev. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133759 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-23 21:07:47 +00:00
Nick Lewycky
94d4c91bc5 Add support for assembling "movq" when it's correct to do so, while continuing 
to emit "movd" across the board to continue supporting a Darwin assembler bug.
This is the reincarnation of r133452.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133565 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-21 22:45:41 +00:00
Bob Wilson
38c892624b Revert r133452: "Emit movq for 64-bit register to XMM register moves..." 
This is breaking compiler-rt and llvm-gcc builds on MacOSX when not using
the integrated assembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133524 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-21 17:35:13 +00:00
Nick Lewycky
1bd15700a0 Emit movq for 64-bit register to XMM register moves, but continue to accept 
movd when assembling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133452 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-20 18:33:26 +00:00
Bill Wendling
393c4047c0 Improve the heuristic to emit the alias if the number of hard-coded registers 
are also greater than the alias.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133038 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-15 04:31:19 +00:00
Bill Wendling
740e5b3586 Heuristic: If the number of operands in the alias are more than the number of 
operands in the aliasee, don't print the alias.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132963 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-14 03:17:20 +00:00
Chris Lattner
d521d8bf92 add test from PR9164 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131876 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-22 22:35:34 +00:00
Chris Lattner
b8a21ad915 testcase for PR9378 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131875 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-22 22:32:53 +00:00
Eric Christopher
b65122c873 Remove some random comments that snuck in from somewhere. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130812 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-04 00:48:02 +00:00
Eric Christopher
2fc496fcf5 xmm0 is an implicit parameter in this and so shouldn't be in the 
string template.

Fixes rdar://8493866


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130747 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 01:28:32 +00:00
Joerg Sonnenberger
c25e8d8cea Add encoding tests for flds/filds 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129589 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-15 19:25:31 +00:00
Bill Wendling
d336de318e As Dan pointed out, movzbl, movsbl, and friends are nicer than their alias 
(movzx/movsx) because they give more information. Revert that part of the patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129498 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-14 01:46:37 +00:00
Bill Wendling
c6df9883da Have the X86 back-end emit the alias instead of what's being aliased. In most 
cases, it's much nicer and more informative reading the alias.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129497 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-14 01:11:51 +00:00
Chris Lattner
15f8951799 fix rdar://8735979 - "int 3" doesn't match to "int3". Unfortunately, 
InstAlias doesn't allow matching immediate operands, so we have to write
C++ code to do this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129223 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-09 19:41:05 +00:00
Joerg Sonnenberger
4a8ac8de1d Add support for the VIA PadLock instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128826 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-04 16:58:13 +00:00
Joerg Sonnenberger
96622aa063 Support explicit argument forms for the X86 string instructions. 
For now, only the default segments are supported.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127875 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-18 11:59:40 +00:00
Eli Friedman
86d822df6d Followup to r126970: add 64-bit encoding tests for str with reg operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126987 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-04 04:06:47 +00:00
Eli Friedman
ac39bd534b PR9377: Handle x86 str with register operand in a way consistent with gas. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126970 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-04 00:10:17 +00:00
Joerg Sonnenberger
00743c2218 Use the same (%dx) hack for in[bwl] as for out[bwl]. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126244 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-22 20:40:09 +00:00
Joerg Sonnenberger
d86f482e4a Recognize loopz and loopnz as aliases for loope and loopne. 
From Dimitry Andric.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126168 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-22 00:43:07 +00:00
Rafael Espindola
87ca0e077d Implement xgetbv and xsetbv. 
Patch by Jai Menon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126165 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-22 00:35:18 +00:00
Chris Lattner
824a9076ea implement PR9264: disambiguating 'bt mem, imm' as a btl. 
This is reasonable to do since all bt-mem forms do the
same thing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126047 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-19 21:06:36 +00:00
Joerg Sonnenberger
5ad596f9d2 Recognize monitor/mwait with explicit register arguments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125805 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-18 00:48:11 +00:00
Joerg Sonnenberger
97755a063e Recognize leavel and leaveq aliases for leave. 
Validate encoding of leave in 64bit mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125795 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-17 23:36:39 +00:00
Reid Kleckner
26f23100ac Add encodings and mnemonics for FXSAVE64 and FXRSTOR64. 
These are just FXSAVE and FXRSTOR with REX.W prefixes.  These versions use
64-bit pointer values instead of 32-bit pointer values in the memory map they
dump and restore.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125446 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-12 23:24:13 +00:00
Chris Lattner
3a5004dc3e Fix PR8946, a missing reg/reg form of movdqu. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123242 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-11 17:04:55 +00:00
Nick Lewycky
c00210cef2 Add another non-commutable instruction that gas accepts commuted forms for. 
Fixes PR8861.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122641 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-30 22:10:49 +00:00
Chris Lattner
7ab3cc32d6 Generalize a previous change, fixing PR8855 - an valid large immediate 
rejected by the mc assembler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122557 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-25 21:36:35 +00:00
Kevin Enderby
76331754d4 Allow a slash, '/', as a prefix separator for X86. rdar://8741045 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121320 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-08 23:57:59 +00:00
Chris Lattner
d8f717911d fix PR8686, accepting a 'b' suffix at the end of all the setcc 
instructions.  I choose to handle this with an asmparser hack,
though it could be handled by changing all the instruction definitions
to allow be "setneb" instead of "setne".  The asm parser hack is
better in this case, because we want the disassembler to produce
setne, not setneb.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120260 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-28 20:23:50 +00:00
Rafael Espindola
bfd2d26159 Implement the data16 prefix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120224 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 20:29:45 +00:00
Rafael Espindola
5c7106b2e3 Testcase for r120017. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120099 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-24 18:03:57 +00:00
Chris Lattner
cbf5d74e6a implement PR8524, apparently mainline gas accepts movq as an alias for movd 
when transfering between i64 gprs and mmx regs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119931 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 08:18:57 +00:00
Chris Lattner
269f10b316 accept lret as an alias for lretl, fixing the reopened part of PR8592 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118916 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 18:54:56 +00:00
Chris Lattner
6b5e3978e3 implement PR8592: empirically "lretq" is a "lret" with a rex.w prefix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118903 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-12 17:41:20 +00:00
Chris Lattner
689cf3cb62 implement aliases for div/idiv that have an explicit A register operand, 
implementing rdar://8431864


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118364 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-06 22:41:18 +00:00
Chris Lattner
04a75abe23 add aliases for movs between seg registers and mem. There are multiple 
different forms of this instruction (movw/movl/movq) which we reported
as being ambiguous.  Since they all do the same thing, gas just picks the
one with the shortest encoding.  Follow its lead here.

This implements rdar://8208615


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118362 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-06 22:35:34 +00:00
Chris Lattner
db28788e4a go to great lengths to work around a GAS bug my previous patch 
exposed:

GAS doesn't accept "fcomip %st(1)", it requires "fcomip %st(1), %st(0)"
even though st(0) is implicit in all other fp stack instructions.

Fortunately, there is an alias for fcomip named "fcompi" and gas does
accept the default argument for the alias (boggle!).

As such, switch the canonical form of this instruction to "pi" instead
of "ip".  This makes the code generator and disassembler generate pi,
avoiding the gas bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118356 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-06 21:37:06 +00:00
Chris Lattner
8c24b0c699 rework the rotate-by-1 instructions to be defined like the 
shift-by-1 instructions, where the asmstring doesn't contain
the implicit 1.  It turns out that a bunch of these rotate
instructions were completely broken because they used 1 
instead of $1.

This fixes assembly mismatches on "rclb	$1, %bl" and friends,
where we used to generate the 3 byte form, we now generate the
proper 2-byte form.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118355 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-06 21:23:40 +00:00
Chris Lattner
235705b9ca change the fp comparison instructions to not have %st0 explicitly 
listed in its asm string, for consistency with the other similar
instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118354 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-06 20:55:09 +00:00