6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-09-08 08:54:58 +00:00
Code Issues Projects Releases Wiki Activity
47,055 Commits 39 Branches 0 Tags 277 MiB
f194b0edc9
Commit Graph

981 Commits

Author SHA1 Message Date
Anton Korobeynikov
0eebf653a7 The attached patches implement most of the ARM AAPCS-VFP hard float 
ABI. The missing piece is support for putting "homogeneous aggregates"
into registers.

Patch by Sandeep Patel!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73095 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 22:53:56 +00:00
Anton Korobeynikov
fbbf1eeccf Separate V6 from V6T2 since the latter has some extra nice instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73085 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 21:20:36 +00:00
Anton Korobeynikov
a7b0ded2a2 Add helper for checking of Thumb1 mode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73080 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 20:31:02 +00:00
Dan Gohman
2392efef1b Add explicit keywords. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72969 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 23:05:51 +00:00
Evan Cheng
925492279a Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order change no longer make sense after the coalescing changes we have made since then. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72955 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 19:08:58 +00:00
Evan Cheng
87d59e49e9 When merging multiple load / store instructions. Use the DebugLoc of the first one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72952 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 18:19:23 +00:00
Evan Cheng
5ba71887f9 Code clean up: return vector by reference rather than by value. No functionality changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72950 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 17:56:14 +00:00
Dan Gohman
c965ee223c Remove some unnecessary #includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72948 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 16:32:58 +00:00
Evan Cheng
1488326156 Re-apply 72756 with fixes. One of those was introduced by we changed MachineInstrBuilder::addReg() interface. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72826 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 01:15:28 +00:00
Evan Cheng
70fd60bd57 Temporarily revert 72756 for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72757 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 07:40:47 +00:00
Evan Cheng
9d5fb981b0 Fold preceding / trailing base inc / dec into the single load / store as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72756 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 06:14:58 +00:00
Anton Korobeynikov
70459bef9c Implement review feedback. Make thumb2 'normal' subtarget feature 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72698 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 20:00:48 +00:00
Bruno Cardoso Lopes
434dd4fd94 Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron Gray 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72697 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 19:57:37 +00:00
Anton Korobeynikov
d260c248ab Do not emit "generic" CPU string. This fixes PR4291. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72696 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 19:03:17 +00:00
Bruno Cardoso Lopes
a3f99f9033 First patch in the direction of splitting MachineCodeEmitter in two subclasses: 
JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72631 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-30 20:51:52 +00:00
Bill Wendling
51b16f4737 Untabification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72604 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-30 01:09:53 +00:00
Anton Korobeynikov
d4022c3fbb Add placeholder for thumb2 stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72593 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-29 23:41:08 +00:00
Chris Lattner
0c85aabfdc fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72395 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-25 19:51:07 +00:00
Anton Korobeynikov
6d7d2aa38a Add ARMv7 architecture, Cortex processors and different FPU modes handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72337 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-23 19:51:43 +00:00
Anton Korobeynikov
88ce667003 Emit ARM Build Attributes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72336 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-23 19:51:20 +00:00
Anton Korobeynikov
41a024385f Propagate CPU string out of SubtargetFeatures 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72335 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-23 19:50:50 +00:00
Bob Wilson
2f95461ee2 Only 64-bit targets support TImode libcalls. Disable the TImode shift libcalls 
for ARM.  This fixes rdar://6908807.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72269 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-22 17:38:41 +00:00
Bob Wilson
261f2a2337 Minor formatting fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72172 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-20 16:30:25 +00:00
Bob Wilson
6aa219a18c Fix pr4227: Handle large immediate values in inline assembly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72138 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 21:27:57 +00:00
Bob Wilson
86c212e894 Follow up on new support for memory operands in ARM inline assembly. 
This fixes pr4233.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72115 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 18:33:02 +00:00
Bob Wilson
04746eae49 Fix pr4058 and pr4059. Do not split i64 or double arguments between r3 and 
the stack.  Patch by Sandeep Patel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72106 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 10:02:36 +00:00
Bob Wilson
224c244f56 Fix pr4091: Add support for "m" constraint in ARM inline assembly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72105 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 05:53:42 +00:00
Bob Wilson
e6abdffe06 Fix pr4202: Disable CodePlacementOpt for ARM. The ARMConstantIslandPass has 
to run last because it needs to know the exact size and position of every
basic block.  Currently CodePlacementOpt is set up to run last.  It might be
worthwhile to investigate reordering these passes, but for now, let's just
make it work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72037 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-18 20:55:32 +00:00
Jim Grosbach
f957012866 Update the names of the exception handling sjlj instrinsics to 
llvm.eh.sjlj.* for better clarity as to their purpose and scope. Add
a description of llvm.eh.sjlj.setjmp to ExceptionHandling.html.
(llvm.eh.sjlj.longjmp documentation coming when that implementation is
added).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71758 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-14 00:46:35 +00:00
Jim Grosbach
6aa7197fb5 Spelling correction s/builting/builtin/ and remove trailing whitespace in a few places 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71735 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-13 22:32:43 +00:00
Evan Cheng
6ebf7bc740 Run code placement optimization for targets that want it (arm and x86 for now). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71726 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-13 21:42:09 +00:00
Bill Wendling
587daedce2 Change MachineInstrBuilder::addReg() to take a flag instead of a list of 
booleans. This gives a better indication of what the "addReg()" is
doing. Remembering what all of those booleans mean isn't easy, especially if you
aren't spending all of your time in that code.

I took Jakob's suggestion and made it illegal to pass in "true" for the
flag. This should hopefully prevent any unintended misuse of this (by reverting
to the old way of using addReg()).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71722 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-13 21:33:08 +00:00
Jim Grosbach
0e0da734bb Add support for GCC compatible builtin setjmp and longjmp intrinsics. This is 
a supporting preliminary patch for GCC-compatible SjLJ exception handling. Note that these intrinsics are not designed to be invoked directly by the user, but
rather used by the front-end as target hooks for exception handling.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71610 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 23:59:14 +00:00
Jim Grosbach
c93f961874 correct register class for tADDspi to GPR since the register will always be SP 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71602 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 22:30:18 +00:00
Bob Wilson
39bf051ec2 Fix up a few minor typos in comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71563 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 17:35:29 +00:00
Bob Wilson
8494526a23 Fix 80-col violations and remove trailing whitespace. No functional changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71562 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 17:09:30 +00:00
Duncan Sands
777d2306b3 Rename PaddedSize to AllocSize, in the hope that this 
will make it more obvious what it represents, and stop
it being confused with the StoreSize.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71349 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-09 07:06:46 +00:00
Bill Wendling
98a366d547 Instead of passing in an unsigned value for the optimization level, use an enum, 
which better identifies what the optimization is doing. And is more flexible for
future uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-29 23:29:43 +00:00
Bill Wendling
be8cc2a3de Second attempt: 
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-29 00:15:41 +00:00
Bill Wendling
c69d56f115 r70270 isn't ready yet. Back this out. Sorry for the noise. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-28 01:04:53 +00:00
Bill Wendling
2e9d5f912a Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to 
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70270 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-28 00:21:31 +00:00
Bob Wilson
8091524d98 Change LowerCallResult method so that CCValAssign::BCvt can be used with 
f64 types.  This is not used for anything yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70006 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-25 00:33:20 +00:00
Bob Wilson
d55bd51f31 Adjust a comment to reflect what the code does. Splitting a 64-bit argument 
between registers and the stack may be required with the APCS ABI, but it
isn't tied to using a particular version of the ARM architecture.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69978 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-24 17:05:01 +00:00
Bob Wilson
4d59e1d666 Fix up some problems with getCopyToReg and getCopyFromReg nodes being 
chained and "flagged" together.  I also made a few changes to handle the
chain and flag values more consistently.  I found these problems by
inspection so I'm not aware of anything that breaks because of them
(thus no testcase).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69977 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-24 17:00:36 +00:00
Bob Wilson
1c2c462d0f Remove unnecessary references to f32 types. After specifying that f32 
should be bit-converted to i32, it is sufficient to list only i32 in
subsequent definitions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69973 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-24 16:55:25 +00:00
Bob Wilson
998e125a87 Move duplicated AddLiveIn function from X86 and ARM backends to be a method 
in the MachineFunction class, renaming it to addLiveIn for consistency with
the same method in MachineBasicBlock.  Thanks for Anton for suggesting this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69615 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-20 18:36:57 +00:00
Bob Wilson
e3fa9ef936 Move the AddLiveIn function definition closer to its uses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69382 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 20:42:34 +00:00
Bob Wilson
e65586b37b Rearrange code to reduce indentation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69381 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 20:40:45 +00:00
Bob Wilson
dee46d7f6d Clean up formatting, remove trailing whitespace, fix comment typos and 
punctuation.  No functional changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69378 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 20:35:10 +00:00
Bob Wilson
1f595bb429 Use CallConvLower.h and TableGen descriptions of the calling conventions 
for ARM.  Patch by Sandeep Patel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69371 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 19:07:39 +00:00