Commit Graph

102834 Commits

Author SHA1 Message Date
Adrian Prantl
f28f471f16 Debug info for optimized code: Support variables that are on the stack and
described by DBG_VALUEs during their lifetime.

Previously, when a variable was at a FrameIndex for any part of its
lifetime, this would shadow all other DBG_VALUEs and only a single
fbreg location would be emitted, which in fact is only valid for a small
range and not the entire lexical scope of the variable. The included
dbg-value-const-byref testcase demonstrates this.

This patch fixes this by
Local
- emitting dbg.value intrinsics for allocas that are passed by reference
- dropping all dbg.declares (they are now fully lowered to dbg.values)
SelectionDAG
- renamed constructors for SDDbgValue for better readability.
- fix UserValue::match() to handle indirect values correctly
- not inserting an MMI table entries for dbg.values that describe allocas.
- lowering dbg.values that describe allocas into *indirect* DBG_VALUEs.
CodeGenPrepare
- leaving dbg.values for an alloca were they are (see comment)
Other
- regenerated/updated instcombine-intrinsics testcase and included source


rdar://problem/16679879
http://reviews.llvm.org/D3374

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207130 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 17:41:45 +00:00
Andrea Di Biagio
35f9e1aa49 [X86] Add support for Read Time Stamp Counter x86 builtin intrinsics.
This patch:
- Adds two new X86 builtin intrinsics ('int_x86_rdtsc' and
   'int_x86_rdtscp') as GCCBuiltin intrinsics;
- Teaches the backend how to lower the two new builtins;
- Introduces a common function to lower READCYCLECOUNTER dag nodes
  and the two new rdtsc/rdtscp intrinsics;
- Improves (and extends) the existing x86 test 'rdtsc.ll'; now test 'rdtsc.ll'
  correctly verifies that both READCYCLECOUNTER and the two new intrinsics
  work fine for both 64bit and 32bit Subtargets.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207127 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 17:18:27 +00:00
Matt Arsenault
2dbbd17394 R600/SI: Use address space in allowsUnalignedMemoryAccesses
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207126 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 17:08:26 +00:00
David Blaikie
45966fa1f1 Spread some const around for non-mutating uses of MCSymbolData.
I discovered this const-hole while attempting to coalesnce the Symbol
and SymbolMap data structures. There's some pending issues with that,
but I figured this change was easy to flush early.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207124 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 16:59:40 +00:00
Matheus Almeida
25fb047609 [mips] Remove non-ascii character.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207123 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 16:31:10 +00:00
Tim Northover
d8b6fe2c41 AArch64/ARM64: add ARM64 runs to more MC tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207120 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 15:04:26 +00:00
Tim Northover
7b59710b6f AArch64/ARM64: run AArch64 NEON MC tests through ARM64 too.
This skips a couple of compare ones due to the different syntaxt for
floating-point 0.0. AArch64 does it more canonically, and we'll need to fiddle
ARM64 to make it work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207119 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 15:04:20 +00:00
David Blaikie
344569a651 Fix memory leak of MCSymbolData in MCAsmStreamer.
Leak identified by LSan and reported by Kostya Serebryany.

Let's get a bit experimental here... in theory our minimum compiler
versions support unordered_map.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207118 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 14:33:36 +00:00
Tim Northover
a05d37e1f4 AArch64: print NEON lists with a space.
This matches ARM64 behaviour, which I think is clearer. It also puts all the
churn from that difference into one easily ignored commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207116 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 14:06:20 +00:00
Evgeniy Stepanov
23a4885f59 [asan] Use MCInstrInfo in inline asm instrumentation.
Patch by Yuri Gorshenin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207115 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 13:29:34 +00:00
Tim Northover
c80e56729b AArch64/ARM64: enable remaining MC elf tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207112 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 12:56:41 +00:00
Tim Northover
d4daf1762d AArch64/ARM64: allow negative addends, at least on ELF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207111 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 12:56:38 +00:00
Tim Northover
421c65b9b4 ARM64: support relocated "TBZ/TBNZ" instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207110 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 12:56:34 +00:00
Tim Northover
332497fc56 AArch64/ARM64: support relocated ADR instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207109 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 12:56:30 +00:00
Tim Northover
4fec4077fc AArch64/ARM64: add support for :abs_gN_s: MOVZ modifiers
We only need assembly support, so it's fairly easy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207108 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 12:56:27 +00:00
Tim Northover
f909da2bec ARM64: shut up warning about variable only used in assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207106 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 12:22:12 +00:00
Tim Northover
d4b4f400e8 AArch64/ARM64: disentangle the "B.CC" and "LDR lit" operands
These can have different relocations in ELF. In particular both:

    b.eq global
    ldr x0, global

are valid, giving different relocations. The only possible way to distinguish
them is via a different fixup, so the operands had to be separated throughout
the backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207105 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 12:12:10 +00:00
Tim Northover
92f4b34653 AArch64/ARM64: enable some MC tests on ARM64
This will also (as with CodeGen) disable testing when the ARM64 backend is not
present.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207104 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 12:12:01 +00:00
Tim Northover
00b214a406 AArch64/ARM64: port bitfield test to ARM64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207103 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 12:11:56 +00:00
Tim Northover
b62ba5eca0 AArch64/ARM64: implement BFI optimisation
ARM64 was not producing pure BFI instructions for bitfield insertion
operations, unlike AArch64. The approach had to be a little different (in
ISelDAGToDAG rather than ISelLowering), and the outcomes aren't identical but
hopefully this gives it similar power.

This should address PR19424.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207102 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 12:11:53 +00:00
Tim Northover
fe6f4e4d31 AArch64/ARM64: port more tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207101 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 12:11:46 +00:00
Chandler Carruth
befdb1a642 [LCG] Incorporate the core trick of improvements on the naive Tarjan's
algorithm here: http://dl.acm.org/citation.cfm?id=177301.

The idea of isolating the roots has even more relevance when using the
stack not just to implement the DFS but also to implement the recursive
step. Because we use it for the recursive step, to isolate the roots we
need to maintain two stacks: one for our recursive DFS walk, and another
of the nodes that have been walked. The nice thing is that the latter
will be half the size. It also fixes a complete hack where we scanned
backwards over the stack to find the next potential-root to continue
processing. Now that is always the top of the DFS stack.

While this is a really nice improvement already (IMO) it further opens
the door for two important simplifications:

1) De-duplicating some of the code across the two different walks. I've
   actually made the duplication a bit worse in some senses with this
   patch because the two are starting to converge.
2) Dramatically simplifying the loop structures of both walks.

I wanted to do those separately as they'll be essentially *just* CFG
restructuring. This patch on the other hand actually uses different
datastructures to implement the algorithm itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207098 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 11:05:20 +00:00
Chandler Carruth
6c7af1bde8 [LCG] Rotate logic applied to the top of the DFSStack to instead be
applied prior to pushing a node onto the DFSStack. This is the first
step toward avoiding the stack entirely for leaf nodes. It also
simplifies things a bit and I think is pointing the way toward factoring
some more of the shared logic out of the two implementations.

It is also making it more obvious how to restructure the loops
themselves to be a bit easier to read (although no different in terms of
functionality).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207095 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 09:59:59 +00:00
Chandler Carruth
9e9ec34760 [LCG] Re-order expectations to provide more useful output when debugging
an issue. This way you see that the number of nodes was wrong before
a crash due to accessing too many nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207094 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 09:59:56 +00:00
Evgeniy Stepanov
fd46b84ddd [asan] Fix instrumentation of x86 intel syntax inline assembly.
Patch by Yuri Gorshenin.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207092 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 09:56:15 +00:00
Chandler Carruth
bcb39a444b [LCG] Switch the parent SCC tracking from a SmallSetVector to
a SmallPtrSet. Currently, there is no need for stable iteration in this
dimension, and I now thing there won't need to be going forward.

If this is ever re-introduced in any form, it needs to not be
a SetVector based solution because removal cannot be linear. There will
be many SCCs with large numbers of parents. When encountering these, the
incremental SCC update for intra-SCC edge removal was quadratic due to
linear removal (kind of).

I'm really hoping we can avoid having an ordering property here at all
though...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207091 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 09:22:31 +00:00
Chandler Carruth
9e65c46345 [LCG] We don't actually need a set in each SCC to track the nodes. We
can use the node -> SCC mapping in the top-level graph to test this on
the rare occasions we need it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 08:55:36 +00:00
Zinovy Nis
25209ab486 [CLNUP] Test commit. Remove newline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207089 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 08:42:58 +00:00
Benjamin Kramer
f43438b6c3 X86: Emit test instead of constant shift + compare if the shift result is unused.
This allows us to compile
  return (mask & 0x8 ? a : b);
into
  testb $8, %dil
  cmovnel %edx, %esi
instead of
  andl  $8, %edi
  shrl  $3, %edi
  cmovnel %edx, %esi

which we formed previously because dag combiner canonicalizes setcc of and into shift.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207088 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 08:15:31 +00:00
Chandler Carruth
63ed439ab5 [LCG] Switch the SCC's parent iterators to be value iterators rather
than pointer iterators.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207086 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 07:48:18 +00:00
Karthik Bhat
0698b2b6cc Allow vectorization of few missed llvm intrinsic calls in BBVectorizor by handling them in isVectorizableIntrinsic function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207085 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 07:29:55 +00:00
Chandler Carruth
3c1f8e0054 [ADT] Attempt to appease another MSVC oddity by moving the injected
class name usage into a context we can put typename on it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207084 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 06:59:50 +00:00
Craig Topper
e703fcb975 [C++] Use 'nullptr'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207083 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 06:44:33 +00:00
Chandler Carruth
2c0470e781 [ADT] Try to appease MSVC by sinking the enable_if from a default
template argument to a default argument to the constructor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207082 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 06:16:12 +00:00
Stepan Dyatkovskiy
5c025f2f6e Fix for PR18921, "vmov" part.
Added support for bytes replication feature, so it could be GAS compatible.

E.g. instructions below:
"vmov.i32 d0, 0xffffffff"
"vmvn.i32 d0, 0xabababab"
"vmov.i32 d0, 0xabababab"
"vmov.i16 d0, 0xabab"
are incorrect, but we could deal with such cases.

For first one we should emit:
"vmov.i8 d0, 0xff"
For second one ("vmvn"):
"vmov.i8 d0, 0x54"
For last two instructions it should emit:
"vmov.i8 d0, 0xab"

P.S.: In ARMAsmParser.cpp I have also fixed few nearby style issues in old code.
Just for keeping method bodies in harmony with themselves.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207080 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 06:03:01 +00:00
Chandler Carruth
f627b1e554 Use the shiny new iterator adaptor tool to implement the
value_op_iterator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207078 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 05:33:53 +00:00
Chandler Carruth
18cd5b1585 [ADT] Factor out the facade aspect of the iterator_adaptor_base into its
own CRTP base class for more general purpose use. Add some clarifying
comments for the exact way in which the adaptor uses it. Hopefully this
will help us write increasingly full featured iterators. This is
becoming important as they start to be used heavily inside of ranges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207072 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 04:07:06 +00:00
Chandler Carruth
beee61d3e6 [ADT] Add a generic iterator utility for adapting iterators much like
Boost's iterator_adaptor, and a specific adaptor which iterates over
pointees when wrapped around an iterator over pointers.

This is the result of a long discussion on IRC with Duncan Smith, Dave
Blaikie, Richard Smith, and myself. Essentially, I could use some subset
of the iterator facade facilities often used from Boost, and everyone
seemed interested in having the functionality in a reasonably generic
form. I've tried to strike a balance between the pragmatism and the
established Boost design. The primary differences are:

1) Delegating to the standard iterator interface names rather than
   special names that then make up a second iterator-like API.
2) Using the name 'pointee_iterator' which seems more clear than
   'indirect_iterator'. The whole business of calling the '*p' operation
   'pointer indirection' in the standard is ... quite confusing. And
   'dereference' is no better of a term for moving from a pointer to
   a reference.

Hoping Duncan, and others continue to provide comments on this until
we've got a nice, minimal abstraction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207069 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 03:31:23 +00:00
David Blaikie
c118614379 Remove unused parameter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207061 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 01:25:10 +00:00
David Blaikie
a0d6bcc183 Remove the intermediate AccelTypes maps in DWARF units.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207060 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 01:23:49 +00:00
David Blaikie
e33575f577 Remove the intermediate AccelNamespace maps in DWARF units.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207059 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 01:02:42 +00:00
Michael J. Spencer
96363d5001 [InstCombine][x86] Constant fold psll intrinsics.
This excludes avx512 as I don't have hardware to verify. It excludes _dq
variants because they are represented in the IR as <{2,4} x i64> when it's
actually a byte shift of the entire i{128,265}.

This also excludes _dq_bs as they aren't at all supported by the backend.
There are also no corresponding instructions in the ISA. I have no idea why
they exist...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207058 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 00:58:18 +00:00
David Blaikie
b53610141c Remove the intermediate AccelObjC maps in DWARF units
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207057 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 00:53:32 +00:00
Filipe Cabecinhas
cd9f6b870e Optimize some special cases for SSE4a insertqi
Summary:
Since the upper 64 bits of the destination register are undefined when
performing this operation, we can substitute it and let the optimizer
figure out that only a copy is needed.

Also added range merging, if an instruction copies a range that can be
merged with a previous copied range.

Added test cases for both optimizations.

Reviewers: grosbach, nadav

CC: llvm-commits

Differential Revision: http://reviews.llvm.org/D3357

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207055 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 00:38:14 +00:00
Matt Arsenault
8bd9405026 Handle addrspacecast when looking at memcpys from globals
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207054 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-24 00:01:09 +00:00
Chandler Carruth
9f2150c046 [LCG] Normalize the post-order SCC iterator to just iterate over the SCC
values rather than having pointers in weird places.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207053 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-23 23:51:07 +00:00
Chandler Carruth
e3273c50a2 [LCG] Remove two unused typedefs from the iterators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207052 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-23 23:51:02 +00:00
David Blaikie
23615f8f5c And actually use the DwarfDebug::AccelNames to emit the names.
Fix for r207049 which would've emitted no accelerated names at all...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207051 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-23 23:46:25 +00:00
David Blaikie
b8ebb28c65 More formatting...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207050 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-23 23:38:39 +00:00
David Blaikie
c8bd54be97 Remove intermediate accelerator table for names.
(similar changes coming for the other accelerator tables)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207049 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-23 23:37:35 +00:00