Evan Cheng
8b19e56051
Add X86 target hook to implement load (even from GlobalAddress).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55693 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 06:44:39 +00:00
Evan Cheng
f45261fb9b
If TargetSelectInstruction returns true, move to next instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55692 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 06:43:41 +00:00
Nick Lewycky
23c04309fb
Don't apply this transform to vectors. Fixes PR2756.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55690 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 06:24:21 +00:00
Nick Lewycky
83c05e5d30
Don't crash when trying to constant fold a vector with some elements that can't
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be folded. Instead, fail to fold the entire vector.
We could also return a vector with some elements folded and some not. If anyone
thinks that's a better approach, please speak up!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55689 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 05:54:33 +00:00
Ted Kremenek
b388eb82fb
Fix capitalization in #include of FastISel.h. This unbreaks the build on case-sensitive filesystems.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55687 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 02:54:11 +00:00
Evan Cheng
88e3041ca6
Unbreak fast isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55685 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 01:04:47 +00:00
Devang Patel
e925ccc553
Add additional check to ensure that iv is canonicalized.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55682 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 00:29:13 +00:00
Devang Patel
a9348dc7ac
Check iteration count.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55680 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 00:10:56 +00:00
Evan Cheng
c3f44b0d63
Let tblgen only generate fastisel routines, not the class definition. This makes it easier for targets to define its own fastisel class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55679 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 00:03:49 +00:00
Devang Patel
c72139134c
While removing PHI, use basicblock to identify incoming value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55678 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 00:02:42 +00:00
Devang Patel
cb7f483d8c
s/FP_AlwaysInline/FN_NOTE_AlwaysInline/g
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55676 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 22:43:57 +00:00
Devang Patel
108f92e376
If all IV uses are extending integer IV then change the type of IV itself, if possible.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55674 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 22:18:08 +00:00
Devang Patel
691e52445e
respect inline=never and inline=always notes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55673 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 22:16:13 +00:00
Evan Cheng
36fd941fc0
80 col violations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55668 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 21:59:13 +00:00
Devang Patel
7ad033c9e7
Read and write function notes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55657 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 21:47:13 +00:00
Devang Patel
1b47e48a64
Use bitwise AND.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55656 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 21:46:44 +00:00
Devang Patel
94bdae14ba
Print function notes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55647 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 20:56:33 +00:00
Devang Patel
d49808184f
Parse function notes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55646 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 20:52:40 +00:00
Devang Patel
81b2ab8a24
Initialize function notes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55645 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 20:51:15 +00:00
Dale Johannesen
a619d012c1
Fix some bugs in the code sequences for atomics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55643 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 20:30:23 +00:00
Dan Gohman
d2ff647964
Ensure that HandlePHINodesInSuccessorBlocks is run for all blocks,
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even in FastISel mode in the case where FastISel successfully
selects all the instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55641 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 20:17:56 +00:00
Nuno Lopes
6e95d90b4c
plug a little memleak in verifyFunction()
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# first commit to llvm, so whatch out :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55631 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 11:30:10 +00:00
Evan Cheng
252ddfbdbc
MMI may be null.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55626 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 08:14:01 +00:00
Evan Cheng
95ce1178e4
Add Mac OS X compatible JIT callback routine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55625 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 07:49:03 +00:00
Evan Cheng
7602e11c32
Revamp ARM JIT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55624 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 06:52:38 +00:00
Evan Cheng
acff339e39
Change getBinaryCodeForInstr prototype. First operand MachineInstr& should be const. Make corresponding changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55623 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 06:51:36 +00:00
Gabor Greif
ed63214fcb
Provide two overloads of AnalyzeNewNode.
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The first can update the SDNode in an SDValue
while the second is called with SDNode* and
returns a possibly updated SDNode*.
This patch has no intended functional impact,
but helps eliminating ugly temporary SDValues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55608 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 15:10:19 +00:00
Duncan Sands
1189f3ac3b
Even though no caller actually uses the new value
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(what matters is that it is added to the worklist),
it seems more logical to return it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55606 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 13:11:13 +00:00
Duncan Sands
3cd652d530
Add a small pass that sets the readnone/readonly
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attributes on functions, based on the result of
alias analysis. It's not hardwired to use
GlobalsModRef even though this is the only (AFAIK)
alias analysis that results in this pass actually
doing something. Enable as follows:
opt ... -globalsmodref-aa -markmodref ...
Advantages of this pass: (1) records the result
of globalsmodref in the bitcode, meaning it is
available for use by later passes (currently
the pass manager isn't smart enough to magically
make an advanced alias analysis available to all
later passes), which may expose more optimization
opportunities; (2) hopefully speeds up compilation
when code is optimized twice, for example when a
file is compiled to bitcode, then later LTO is done
on it: marking functions readonly/readnone when
producing the initial bitcode should speed up alias
analysis during LTO; (3) good for discovering that
globalsmodref doesn't work very well :)
Not currently turned on by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55604 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 11:40:11 +00:00
Evan Cheng
3aac788365
Control flow instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55601 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 08:25:56 +00:00
Evan Cheng
3c2ee4939b
ldm / stm instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55599 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 07:48:18 +00:00
Evan Cheng
5d2c1cf74d
AXI2 and AXI3 instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55598 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 07:34:13 +00:00
Evan Cheng
4bbd5f8a9c
Reorganize instruction formats again; AXI1 encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55597 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 07:19:00 +00:00
Evan Cheng
840917be2c
addrmode3 instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55596 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 07:00:14 +00:00
Evan Cheng
0d14fc8cd5
Reorganize some instruction format definitions. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55594 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 01:51:14 +00:00
Evan Cheng
93912739c9
Rest of addrmode2 instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55593 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 01:27:33 +00:00
Evan Cheng
17222df0ec
Addr2 word / byte load encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55591 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 19:02:21 +00:00
Evan Cheng
b7880ac470
Addr1 instructions opcodes are encoded in bits 21-24; encode S bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55590 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 18:32:16 +00:00
Gabor Greif
93c53e5583
fix a bunch of 80-col violations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55588 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 15:37:04 +00:00
Bill Wendling
9440e35b98
Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTR
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instructions in CellSPU as "Expand" so that they won't be generated. I added a
"FIXME" so that this hack can be addressed and reverted once ISD::ROTR is
supported in the .td files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55582 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 02:59:23 +00:00
Bill Wendling
3156b62855
Expand for ROTR with MVT::i64.
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Dale, Could you please review this?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55581 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 02:53:19 +00:00
Bill Wendling
acb04ec427
Cosmetic changes to Machine LICM. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55578 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 02:30:23 +00:00
Bill Wendling
2692d59574
Another situation where ROTR is cheaper than ROTL.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55577 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 01:13:31 +00:00
Bill Wendling
353dea2f0a
For this pattern, ROTR is the cheaper option.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55576 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 01:04:56 +00:00
Bill Wendling
c5cbda12e9
- Fix comment so that it describes how the code really works:
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// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
// (rotl x, y)
// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
// (rotr x, (sub 32, y))
Example: (x == 0xDEADBEEF and y == 4)
(x << 4) | (x >> 28)
=> 0xEADBEEF0 | 0x0000000D
=> 0xEADBEEFD
(rotl x, 4)
=> 0xEADBEEFD
(rotr x, 28)
=> 0xEADBEEFD
- Fix comment and code for second version. It wasn't using the rot* propertly.
// fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
// (rotr x, y)
// fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
// (rotl x, (sub 32, y))
(x << 28) | (x >> 4)
=> 0xD0000000 | 0x0DEADBEE
=> 0xDDEADBEE
(rotl x, 4)
=> 0xEADBEEFD
(rotr x, 28)
=> (0xEADBEEFD)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55575 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 00:37:27 +00:00
Gabor Greif
dc71563794
typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55574 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 22:16:05 +00:00
Gabor Greif
12632d2222
fix some 80-col violations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55571 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 19:29:20 +00:00
Gordon Henriksen
07cabf6102
PR2731: C and Ocaml bindings for setTailCall and isTailCall.
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Based on patch by Giorgos Korfiatis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55570 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 16:34:54 +00:00
Gordon Henriksen
699609cf91
Fix ConstantExpr::getInsertElement.
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Breakage was exposed in the Ocaml bindings tests after Chris
uncommented an assertion in r55084.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55566 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 15:41:51 +00:00
Gabor Greif
92362680c1
fix some 80-col violations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55565 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 10:09:02 +00:00
Evan Cheng
cd04708f59
Re-apply 55467 with fix. If copy is being replaced by remat'ed def, transfer the implicit defs onto the remat'ed instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55564 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 09:09:33 +00:00
Evan Cheng
3689ff450a
Fold isRematerializable checks into isSafeToReMat.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55563 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 09:07:18 +00:00
Evan Cheng
b18ae3cb63
For now, can't mark XOR64rr isAsCheapAsAMove. It's technically correct. But various passes cannot handle remating these.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55562 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 08:54:22 +00:00
Evan Cheng
eb9f89287e
Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55558 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 02:03:58 +00:00
Owen Anderson
cc54e76cc6
Fix an issue where a use might be selected before a def, and then we didn't respect the pre-chosen vreg
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assignment when selecting the def. This is the naive solution to the problem: insert a copy to the pre-chosen
vreg. Other solutions might be preferable, such as:
1) Passing the dest reg into FastEmit_. However, this would require the higher level code to know about reg classes, which they don't currently.
2) Selecting blocks in reverse postorder. This has some compile time cost for computing the order, and we'd need to measure its impact.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55555 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 00:38:46 +00:00
Dale Johannesen
ea9eedb787
Add ppc partial-word ATOMIC_CMP_SWAP.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55554 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 00:08:53 +00:00
Evan Cheng
456704476f
Swap fp comparison operands and change predicate to allow load folding (safely this time).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55553 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 23:22:12 +00:00
Evan Cheng
97af60b3ae
Use static_cast instead of C style cast.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55552 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 23:21:31 +00:00
Evan Cheng
4529966d99
Fix 80 col. violations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55551 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 23:20:46 +00:00
Evan Cheng
17a568b668
Back out 55498. It broken Apple style bootstrapping.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55549 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 22:21:44 +00:00
Evan Cheng
94a50da93c
Backing out 55521. Not safe.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55548 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 22:13:21 +00:00
Dale Johannesen
0e55f0678c
Add partial word version of ATOMIC_SWAP.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55546 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 18:29:46 +00:00
Owen Anderson
667d8f7607
Add initial support for fast isel of instructions that have inputs pinned to physical registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55545 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 17:45:56 +00:00
Chris Lattner
15bd095aa5
regenerate
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 17:20:18 +00:00
Chris Lattner
828db8a2f9
Asmprint nameless instructions as:
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%4 = add ...
instead of:
add ... ; 4
This makes opt -print-cfg output actually usable and makes .ll files
generally easier to read. This fixes PR2480
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55541 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 17:19:30 +00:00
Chris Lattner
6ac28095c2
Add support for parsing .ll files that have numbers in front of
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nameless values, such as:
%3 = add i32 4, 2
This fixes the first half of PR2480
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55539 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 17:12:13 +00:00
Evan Cheng
ba705f62b1
TableGen'ing instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55533 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 07:42:03 +00:00
Evan Cheng
612b79edc9
addrmode1 (data processing) instruction encoding: bits 5-6 are 0, bits 7-10 encode the opcode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55531 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 07:40:52 +00:00
Evan Cheng
3924f78a96
MVN is addrmode1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55530 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 07:36:24 +00:00
Evan Cheng
130966411f
More refactoring.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55528 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 06:41:12 +00:00
Evan Cheng
4d46d0af58
Swap fp comparison operands and change predicate to allow load folding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55521 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 23:48:31 +00:00
Evan Cheng
37f25d989a
Refactor ARM instruction format definitions into a separate file. No functionality changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55518 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 23:39:26 +00:00
Dan Gohman
99b218218c
Add a target callback for FastISel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55512 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 23:21:34 +00:00
Gabor Greif
327ef031ed
remove tabs, fix > 80 cols
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55511 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 23:19:51 +00:00
Chris Lattner
db57ef1cb3
rename destroy -> releaseMemory to properly hook into passmgr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55508 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 22:56:53 +00:00
Nicolas Geoffray
d046fc61ac
Add support for JIT exceptions on Darwin. Since we're dealing with libgcc,
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whose darwin code was written after the ability to dynamically register frames,
we need to do special hacks to make things work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55507 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 22:34:49 +00:00
Gabor Greif
ba36cb5242
erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 21:40:38 +00:00
Dan Gohman
205d92589b
Implement null and undef values for FastISel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55500 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 21:19:07 +00:00
Mon P Wang
5ad0bf658a
In lowering SELECT_CC, removed cases where we can't flip the true and false when the compare value has a NaN
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55499 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 21:04:05 +00:00
Dan Gohman
a3f8b7a4ce
Optimize DAGCombiner's worklist processing. Previously it started
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its work by putting all nodes in the worklist, requiring a big
dynamic allocation. Now, DAGCombiner just iterates over the AllNodes
list and maintains a worklist for nodes that are newly created or
need to be revisited. This allows the worklist to stay small in most
cases, so it can be a SmallVector.
This has the side effect of making DAGCombine not miss a folding
opportunity in alloca-align-rounding.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55498 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 21:01:56 +00:00
Dan Gohman
9ffd8b5720
Move CaseBlock, JumpTable, and BitTestBlock to be members of
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SelectionDAGLowering instead of being in an anonymous namespace.
This fixes warnings about SelectionDAGLowering having fields
using anonymous namespaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55497 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 20:38:18 +00:00
Dan Gohman
5edd361497
Fix a FastISel bug where the instructions from lowering the arguments
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were being emitted after the first instructions of the entry block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55496 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 20:28:56 +00:00
Rafael Espindola
833a990c26
Use resize instead of reserve. Reserve doesn't change size().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55486 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 18:32:53 +00:00
Rafael Espindola
91ee5454ae
Reduce the size of the Parts vector.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55483 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 18:29:58 +00:00
Owen Anderson
c0bb68b982
Hook up support for fast-isel of trunc instructions, using the newly working support for EXTRACT_SUBREG.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55482 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 18:26:01 +00:00
Dale Johannesen
97efa36586
Implement partial-word binary atomics on ppc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55478 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 17:53:09 +00:00
Owen Anderson
40a468f249
FastEmitInst_extractsubreg doesn't need to be passed the register class. It can get it from MachineRegisterInfo instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55476 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 17:47:37 +00:00
Dan Gohman
f641395435
Revert r55467; it causes regressions in UnitTests/Vector/divides,
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Benchmarks/sim/sim, and others on x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55475 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 17:22:54 +00:00
Rafael Espindola
c748ffa4e4
Correctly resize the Parts array.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55471 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 14:24:45 +00:00
Evan Cheng
9242cb8b82
If a copy isn't coalesced, but its src is defined by trivial computation. Re-materialize the src to replace the copy.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55467 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 07:53:51 +00:00
Evan Cheng
66e13153bd
FsFLD0S{S|D} and V_SETALLONES are as cheap as moves.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55466 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 07:52:25 +00:00
Chris Lattner
cad208b8bc
Make the verifier reject instructions which have null pointers
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for operands: rdar://6179606. no testcase, because I can't write
a .ll file that is this broken ;-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55460 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 04:02:44 +00:00
Chris Lattner
1e1ef3e2bd
Clear the intervals list in "destroy", patch by
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Prakash Prabhu!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55458 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 03:33:03 +00:00
Dale Johannesen
e00a8a2a2e
Split the ATOMIC NodeType's to include the size, e.g.
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ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD.
Increased the Hardcoded Constant OpActionsCapacity to match.
Large but boring; no functional change.
This is to support partial-word atomics on ppc; i8 is
not a valid type there, so by the time we get to lowering, the
ATOMIC_LOAD nodes looks the same whether the type was i8 or i32.
The information can be added to the AtomicSDNode, but that is the
largest SDNode; I don't fully understand the SDNode allocation,
but it is sensitive to the largest node size, so increasing
that must be bad. This is the alternative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55457 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 02:44:49 +00:00
Dan Gohman
7c3234c6be
Reorganize the lifetimes of the major objects SelectionDAGISel
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works with.
SelectionDAG, FunctionLoweringInfo, and SelectionDAGLowering
objects now get created once per SelectionDAGISel instance, and
can be reused across blocks and across functions. Previously,
they were created and destroyed each time they were needed.
This reorganization simplifies the handling of PHI nodes, and
also SwitchCases, JumpTables, and BitTestBlocks. This
simplification has the side effect of fixing a bug in FastISel
where successor PHI nodes weren't being updated correctly.
This is also a step towards making the transition from FastISel
into and out of SelectionDAG faster, and also making
plain SelectionDAG faster on code with lots of little blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55450 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-27 23:52:12 +00:00
Owen Anderson
8970f00def
Add a helper method that will be used to support EXTRACT_SUBREG for selecting trunc's in fast-isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55439 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-27 22:30:02 +00:00
Bill Wendling
1dd0086b06
Make "movdq2q" and "movq2dq" dependent upon having SSE2 because they use the
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SSE2 registers as well as the MMX registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55436 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-27 21:32:04 +00:00
Bill Wendling
d64d956f3d
Put file scoped constants in an anonymous namespace. Use the "using namespace
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llvm" for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55435 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-27 21:10:13 +00:00
Evan Cheng
8763c1c544
Move the check whether it's worth remating to caller.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55434 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-27 20:58:54 +00:00
Devang Patel
18bb2788a0
Do not apply the transformation if the target does not support DestTy natively.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55433 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-27 20:55:23 +00:00