process up to a higher level. This allows FastISel to leverage
more of SelectionDAGISel's infastructure, such as updating Machine
PHI nodes.
Also, implement transitioning from SDISel back to FastISel in
the middle of a block, so it's now possible to go back and
forth. This allows FastISel to hand individual CallInsts and other
complicated things off to SDISel to handle, while handling the rest
of the block itself.
To help support this, reorganize the SelectionDAG class so that it
is allocated once and reused throughout a function, instead of
being completely reallocated for each block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55219 91177308-0d34-0410-b5e6-96231b3b80d8
and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55156 91177308-0d34-0410-b5e6-96231b3b80d8
class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.
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subregister query, and by increasing the size of the subregister hashtable so
that there are fewer collisions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54781 91177308-0d34-0410-b5e6-96231b3b80d8
the comments in FastISelEmitter.cpp for details on what this is.
This is currently experimental and unusable.
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to different address spaces. This alters the naming scheme for those
intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32
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they appear in words. This would cause things like the "128" in "VR128"
to be highlighted. This patch fixes the highlighting by only recognizing
constants when they have word breaks around them.'
Patch by Stefanus Du Toit!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53944 91177308-0d34-0410-b5e6-96231b3b80d8
replacement of multiple values. This is slightly more efficient
than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically
could be optimized even further. However, an important property of this
new function is that it handles the case where the source value set and
destination value set overlap. This makes it feasible for isel to use
SelectNodeTo in many very common cases, which is advantageous because
SelectNodeTo avoids a temporary node and it doesn't require CSEMap
updates for users of values that don't change position.
Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to
handle operand lists more efficiently, and to correctly handle a number
of corner cases to which its new wider use exposes it.
This commit also includes a change to the encoding of post-isel opcodes
in SDNodes; now instead of being sandwiched between the target-independent
pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel
opcodes are now represented as negative values. This makes it possible
to test if an opcode is pre-isel or post-isel without having to know
the size of the current target's post-isel instruction set.
These changes speed up llc overall by 3% and reduce memory usage by 10%
on the InstructionCombining.cpp testcase with -fast and -regalloc=local.
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getTargetNode and SelectNodeTo to reduce duplication, and to
make some of the getTargetNode code available to SelectNodeTo.
Use SelectNodeTo instead of getTargetNode in several new
interesting cases, as it mutates nodes in place instead of
creating new ones.
This triggers some scheduling behavior differences due to nodes
being presented to the scheduler in a different order. Some of the
arbitrary scheduling decisions it makes are now arbitrarily made
differently. This is visible in CodeGen/PowerPC/LargeAbsoluteAddr.ll,
where a trivial scheduling difference led to a trivial register
allocation difference.
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SelectionDAG::SelectNodeTo in the instruction selector. This
updates existing nodes in place instead of creating new ones.
Go back to selecting ISD::DBG_LABEL nodes into
TargetInstrInfo::DBG_LABEL nodes instead of leaving them
unselected, now that SelectNodeTo allows us to update them
in place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53057 91177308-0d34-0410-b5e6-96231b3b80d8
- Use a more accurate heuristic for the size of the hashtable.
- Use bitwise and instead of modulo since the size is a power of two.
- Use new[] instead of malloc().
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the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.
Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.
This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.
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and fix the bug that it uncovers: inlining a pattern fragment could bring
in other pattern fragments if the inlinee hadn't already been inlined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52888 91177308-0d34-0410-b5e6-96231b3b80d8
<16 x float> is 64-byte aligned (for some reason),
which gets us into the stack realignment code. The
computation changing FP-relative offsets to SP-relative
was broken, assiging a spill temp to a location
also used for parameter passing. This
fixes it by rounding up the stack frame to a multiple
of the largest alignment (I concluded it wasn't fixable
without doing this, but I'm not very sure.)
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Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub
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and better control the abstraction. Rename the type
to MVT. To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits(). Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).
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in DAGISelEmitter output. This bug was recently uncovered by the
addition of patterns for CALL32m and CALL64m, which are nodes
that now have both MemOperands and variadic_ops.
This bug was especially visible with PIC in various configurations,
because the new patterns are matching the indirect call code used
in many PIC configurations.
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index for the input pattern in terms of the output pattern. Instead
keep track of how many fixed operands the input pattern actually
has, and have the input matching code pass the output-emitting
function that index value. This simplifies the code, disentangles
variables_ops from the support for predication operations, and
makes variable_ops more robust.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51808 91177308-0d34-0410-b5e6-96231b3b80d8
It can be handy to have all information about options gathered in a single place
to provide an overview of all supported options. This patch allows the following:
def Options : OptionList<[
(switch_option "E", (help "Help string")),
(alias_option "quiet", "q")
...
]>;
Tool-specific option properties (like 'append_cmd') have (obviously) no meaning in
this context, so the only properties that are allowed are 'help' and 'required'.
See usage example in examples/Clang.td.
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The following is now allowed:
(case (not_empty "o"), do_something, ...)
This didn't work previously because "-o" is built-in.
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The following is now legal:
(case (in_language "c"),
(case (switch_on "E"), "gcc -x c -E $INFILE", (default), "gcc -x c $INFILE"),
(default),
"gcc $INFILE $OUTFILE")
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For instance, the following command:
llvmc2 -E hello.c
now generates a file with the correct suffix (hello.i).
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Used like this: (cmd_line "$CALL(MyHook) --option -o $ENV(VARIABLE) $CALL(AnotherHook)")
Also works with case expressions.
Hook declarations are auto-generated, the definitions should be provided by the user
(just drop a .cpp file in the tools/llvmc2 directory).
Hooks should live in the "hooks" namespace and have type std::string hooks::Hook(void).
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cases due to an isel deficiency already noted in
lib/Target/X86/README.txt, but they can be matched in this fold-call.ll
testcase, for example.
This is interesting mainly because it exposes a tricky tblgen bug;
tblgen was incorrectly computing the starting index for variable_ops
in the case of a complex pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51706 91177308-0d34-0410-b5e6-96231b3b80d8
definitions. This adds a new construct, "discard", for indicating
that a named node in the input matching pattern is to be discarded,
instead of corresponding to a node in the output pattern. This
allows tblgen to know where the arguments for the varaible_ops are
supposed to begin.
This fixes "rdar://5791600", whatever that is ;-).
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instruction to execute. This can be used for transformations (like two-address
conversion) to remat an instruction instead of generating a "move"
instruction. The idea is to decrease the live ranges and register pressure and
all that jazz.
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and bitcode support for the extractvalue and insertvalue
instructions and constant expressions.
Note that this does not yet include CodeGen support.
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DAG instruction selectors. Introudce a dedicated header file for this part:
include/llvm/CodeGen/DAGISelHeader.h
TableGen now only generates the include preprocessor directive to include this
new header.
This is a preparation for supporting multiple implementations of instruction
selectors in the future.
Reviewed and approved by Evan and Dan.
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Makes it possible to use options with names like "Wa,".
Also fixes the -Wall option handling as a side-effect.
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