6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-11-15 04:08:07 +00:00
Code Issues Projects Releases Wiki Activity
34,534 Commits 39 Branches 0 Tags 277 MiB
ff11026575
Commit Graph

60 Commits

Author SHA1 Message Date
Evan Cheng
ff11026575 - Added MRegisterInfo::getCrossCopyRegClass() hook. For register classes where reg to reg copies are not possible, this returns another register class which registers in the specified register class can be copied to (and copy back from). 
- X86 copyRegToReg() now supports copying between EFLAGS and GR32 / GR64 registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42372 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 21:31:07 +00:00
Evan Cheng
9efce638d3 Allow copyRegToReg to emit cross register classes copies. 
Tested with "make check"!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 06:25:56 +00:00
Evan Cheng
f4c3a59dba Added support to fold X86 load / store instructions. This allow rematerialized loads to be folded into their uses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41599 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-30 05:54:07 +00:00
Duncan Sands
ee46574931 Move getX86RegNum into X86RegisterInfo and use it 
in the trampoline lowering.  Lookup the jump and
mov opcodes for the trampoline rather than hard
coding them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41577 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-29 19:01:20 +00:00
Evan Cheng
64d80e3387 Change instruction description to split OperandList into OutOperandList and 
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-19 01:14:50 +00:00
Evan Cheng
7e7bbf8271 Only adjust esp around calls in presence of alloca. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40028 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-19 00:42:05 +00:00
Evan Cheng
89d1659cf2 Use push / pop for prologues and epilogues. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39967 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-17 07:59:08 +00:00
Anton Korobeynikov
2365f51ed0 Long live the exception handling! 
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.

In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.

After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be 
thought as 'finished': I expect many small and not so small glitches
everywhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39855 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-14 14:06:15 +00:00
Evan Cheng
97de913821 eliminateFrameIndex() change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36626 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-01 09:13:03 +00:00
Evan Cheng
bf2c8b3c96 Added MRegisterInfo hook to re-materialize an instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35205 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 08:09:38 +00:00
Evan Cheng
5e6df4647e PEI now passes a RegScavenger ptr to eliminateFrameIndex. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34707 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 00:21:17 +00:00
Jim Laskey
62819f3144 Support to provide exception and selector registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34482 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-21 22:54:50 +00:00
Evan Cheng
b371f457b0 Re-apply my liveintervalanalysis changes. Now with PR1207 fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34428 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-19 21:49:54 +00:00
Reid Spencer
a284cbf667 For PR1207: 
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34399 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-19 03:20:00 +00:00
Evan Cheng
eceada6728 Added getReservedRegs(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34376 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-17 11:06:00 +00:00
Jim Laskey
0e41094d49 Call frames for intel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33490 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-24 19:15:24 +00:00
Evan Cheng
dc77540d95 hasFP() is now a virtual method of MRegisterInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33455 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-23 00:57:47 +00:00
Evan Cheng
c2b861da18 Fix naming inconsistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32823 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-02 21:33:40 +00:00
Jeff Cohen
d41b30def3 Unbreak VC++ build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31464 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-05 19:31:28 +00:00
Evan Cheng
25ab690a43 Committing X86-64 support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30177 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 06:48:29 +00:00
Chris Lattner
2926869b4a Fix a long-standing wart in the code generator: two-address instruction lowering 
actually *removes* one of the operands, instead of just assigning both operands
the same register.  This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.

Changing this also gets rid of a bunch of hacky code in various places.

This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30108 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 02:12:02 +00:00
Evan Cheng
0f3ac8d8d4 getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28378 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-18 00:12:58 +00:00
Evan Cheng
8f7f7125e9 Better implementation of truncate. ISel matches it to a pseudo instruction 
that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28119 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 05:40:20 +00:00
Jim Laskey
4188699f80 Foundation for call frame information. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27491 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-07 16:34:46 +00:00
Jim Laskey
a99791886d Expose base register for DwarfWriter. Refactor code accordingly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27225 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 13:48:33 +00:00
Jim Laskey
f1d78e8335 Add support to locate local variables in frames (early version.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26994 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 18:12:57 +00:00
Chris Lattner
4083960147 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25913 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 20:12:32 +00:00
Chris Lattner
1d6ecd03ea add a method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25910 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 19:57:16 +00:00
Chris Lattner
97d5e6461a Pass extra regclasses into spilling code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23537 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 01:29:42 +00:00
Chris Lattner
a92aab74dd Implement the isLoadFromStackSlot interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23387 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-19 05:23:44 +00:00
Chris Lattner
2505d6b727 The simple isel being gone makes this dead! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22914 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:32:03 +00:00
Misha Brukman
0e0a7a45d3 * Remove trailing whitespace 
* Convert tabs to spaces


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21426 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-21 23:38:14 +00:00
Chris Lattner
01d0efba39 Code insertion methods now return void instead of an int. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15780 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-15 22:15:11 +00:00
Chris Lattner
57f1b67c34 These methods no longer take a TargetRegisterClass* operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15774 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-15 21:56:44 +00:00
Nate Begeman
f8be5e94aa Eliminate MachineFunction& argument from eliminateFrameIndex in x86 Target. Get MachineFunction from MachineInstruction's parent's parent 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15739 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-14 22:05:10 +00:00
Alkis Evlogimenos
a1a7148c4d Another API change to MRegisterInfo::foldMemoryOperand. Instead of a 
MachineBasicBlock::iterator take a MachineInstr*.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12392 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-14 20:14:27 +00:00
Alkis Evlogimenos
39354c99a1 Change MRegisterInfo::foldMemoryOperand to return the folded 
instruction to make the API more flexible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12386 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-14 07:19:51 +00:00
Chris Lattner
5a051f65d3 Change to match the newer, simpler, interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11525 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 05:54:57 +00:00
Alkis Evlogimenos
b499866c05 Add API to check and fold memory operands into instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11519 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 04:33:18 +00:00
Chris Lattner
bb07ef97cf The prologue/epilogue related method calls have no reason to return a value, 
make them return void.

This allows us to avoid some costly MBB.size() calls


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11448 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-14 19:49:54 +00:00
Alkis Evlogimenos
024126ee23 Change interface so that we can add to the end of a basic block 
without getting an assertion from ilist that we are dereferencing
ilist<T>::end().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11345 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-12 08:11:04 +00:00
Alkis Evlogimenos
c0b9dc5be7 Change MachineBasicBlock's vector of MachineInstr pointers into an 
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11340 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-12 02:27:10 +00:00
Brian Gaeke
d0fde30ce8 Put all LLVM code into the llvm namespace, as per bug 109. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9903 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-11-11 22:41:34 +00:00
Alkis Evlogimenos
e668dab5b3 Change all machine basic block modifier functions in MRegisterInfo to 
return the number of instructions added to/removed from the basic block
passed as their first argument.

Note: This is only needed because we use a std::vector instead of an
ilist to keep MachineBasicBlock instructions. Inserting an instruction
to a MachineBasicBlock invalidates all iterators to the basic
block. The return value can be used to update an index to the machine
basic block instruction vector and circumvent the iterator elimination
problem but this is really not needed if we move to a better
representation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9704 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-11-04 22:57:09 +00:00
John Criswell
856ba76200 Added LLVM copyright header. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9321 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-10-21 15:17:13 +00:00
Chris Lattner
7ad3e063f5 Switch over to TableGen generated register file description 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7511 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-08-03 15:48:14 +00:00
Chris Lattner
7296fb0421 This method is long dead 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7460 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-08-01 03:48:42 +00:00
Chris Lattner
128aff4f95 Changes to match new MRegisterInfo api 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5187 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-28 20:32:54 +00:00
Chris Lattner
6811c6e1d7 Adjustments to match new simpler spill interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5147 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-25 05:06:43 +00:00
Chris Lattner
79de6319b1 Update to use new interface for register info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5098 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-17 04:19:17 +00:00