Lang Hames 02e08d5b4d PR11868. The previous loop in LiveIntervals::join would sometimes fall over if ... more than two adjacent ranges needed to be merged. The new version should be able to handle an arbitrary sequence of adjancent ranges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149588 91177308-0d34-0410-b5e6-96231b3b80d8		2012-02-02 05:37:34 +00:00
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ARM	Rewrite instruction operands in AdjustCopiesBackFrom. Fixes PR11861.	2012-01-27 00:05:42 +00:00
CBackend	Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.	2011-11-27 06:54:59 +00:00
CellSPU	Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT.	2012-01-17 21:44:01 +00:00
CPP
Generic	PR11868. The previous loop in LiveIntervals::join would sometimes fall over if	2012-02-02 05:37:34 +00:00
Hexagon	VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA).	2012-02-01 22:13:57 +00:00
MBlaze	Change the default scheduler from Latency to ILP, since Latency	2011-10-24 17:45:02 +00:00
Mips	Remove all references to the old EH.	2012-01-31 02:09:07 +00:00
MSP430	Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.	2011-11-27 06:54:59 +00:00
PowerPC	AggressiveAntiDepBreaker needs to skip debug values because a debug value does not have a corresponding SUnit	2012-01-16 22:53:41 +00:00
PTX	PTX: Continue to fix up the register mess.	2011-12-06 17:39:48 +00:00
SPARC	Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() since	2011-12-03 21:24:48 +00:00
Thumb	Fix more places which should be checking for iOS, not darwin.	2012-01-04 01:55:04 +00:00
Thumb2	After r147827 and r147902, it's now possible for unallocatable registers to be	2012-01-14 01:53:46 +00:00
X86	Instruction scheduling itinerary for Intel Atom.	2012-02-01 23:20:51 +00:00
XCore	FileCheck hygiene.	2012-01-05 00:43:34 +00:00